coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/rex/var/rex0: Configure I2C timing for I2C devices
by Ivy Jian (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Ivy Jian, Kapil Porwal, Subrata Banik, Tarun Tuli. Ivy Jian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75150?usp=email ) Change subject: mb/google/rex/var/rex0: Configure I2C timing for I2C devices ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/75150?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5421e4fe68e856bbe9f19544954a94670c895a47 Gerrit-Change-Number: 75150 Gerrit-PatchSet: 4 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 19 Jun 2023 01:40:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: device/resource_allocator_v4: Remove "ERROR: " from log message
by Eric Lai (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Elyes Haouas. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75876?usp=email ) Change subject: device/resource_allocator_v4: Remove "ERROR: " from log message ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75876?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ff2081d38f94556481efa02f242795bbfc77517 Gerrit-Change-Number: 75876 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Mon, 19 Jun 2023 00:30:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mainboard/google/rex: Enable crashlog
by Eric Lai (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Kapil Porwal, Pratikkumar V Prajapati, Subrata Banik, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74770?usp=email ) Change subject: mainboard/google/rex: Enable crashlog ...................................................................... Patch Set 18: (1 comment) Patchset: PS18: > Why need two sram? One is for IOE? In this case I would suggest update device tree by CPU in variant […] if not, just ignore this -- To view, visit https://review.coreboot.org/c/coreboot/+/74770?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d3a9fb41d1293f021ad9de9b29c756cb7559373 Gerrit-Change-Number: 74770 Gerrit-PatchSet: 18 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Mon, 19 Jun 2023 00:24:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mainboard/google/rex: Enable crashlog
by Eric Lai (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Kapil Porwal, Pratikkumar V Prajapati, Subrata Banik, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74770?usp=email ) Change subject: mainboard/google/rex: Enable crashlog ...................................................................... Patch Set 18: Code-Review+2 (1 comment) Patchset: PS18: Why need two sram? One is for IOE? In this case I would suggest update device tree by CPU in variant.c -- To view, visit https://review.coreboot.org/c/coreboot/+/74770?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d3a9fb41d1293f021ad9de9b29c756cb7559373 Gerrit-Change-Number: 74770 Gerrit-PatchSet: 18 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Mon, 19 Jun 2023 00:22:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Print crashlog size info in hex
by Eric Lai (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Pratikkumar V Prajapati, Subrata Banik, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75910?usp=email ) Change subject: soc/intel/common: Print crashlog size info in hex ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75910?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb5498e702497bfbc2b4d5396d5b760a0010f5de Gerrit-Change-Number: 75910 Gerrit-PatchSet: 4 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Mon, 19 Jun 2023 00:20:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: ec/google/chromeec: Use mux_conn to get the right USB port
by Eric Lai (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Kapil Porwal, Tarun Tuli, Tim Wawrzynczak. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75824?usp=email ) Change subject: ec/google/chromeec: Use mux_conn to get the right USB port ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75824/comment/e4c08ada_bff9a100 : PS2, Line 9: get_usb_port_references > Can't we use PLD to fix this issue? Does PLD report the port number? PLD is report the position right? -- To view, visit https://review.coreboot.org/c/coreboot/+/75824?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I058c6cc0fea6758bfaafdd163b5da2c7f75daf8a Gerrit-Change-Number: 75824 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Sun, 18 Jun 2023 23:58:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: acpi/acpi.c: Return function argument when bailing out
by Lean Sheng Tan (Code Review) 19 Jun '23

19 Jun '23

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75903?usp=email ) Change subject: acpi/acpi.c: Return function argument when bailing out ...................................................................... acpi/acpi.c: Return function argument when bailing out Returning a constant value makes the function easier to read and think about. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Ifdf7acec38a7c958aac2cf1f3bbf16c27fa90b8c Reviewed-on: https://review.coreboot.org/c/coreboot/+/75903 Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/acpi/acpi.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index ce14538..cfc388b 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1931,7 +1931,7 @@ dsdt_file = cbfs_map(CONFIG_CBFS_PREFIX "/dsdt.aml", &dsdt_size); if (!dsdt_file) { printk(BIOS_ERR, "No DSDT file, skipping ACPI tables\n"); - return current; + return start; } if (dsdt_file->length > dsdt_size @@ -1939,7 +1939,7 @@ || memcmp(dsdt_file->signature, "DSDT", 4) != 0) { printk(BIOS_ERR, "Invalid DSDT file, skipping ACPI tables\n"); cbfs_unmap(dsdt_file); - return current; + return start; } slic_file = cbfs_map(CONFIG_CBFS_PREFIX "/slic", &slic_size); -- To view, visit https://review.coreboot.org/c/coreboot/+/75903?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdf7acec38a7c958aac2cf1f3bbf16c27fa90b8c Gerrit-Change-Number: 75903 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: acpi/acpi.c: Change signature of write_acpi_tables
by Lean Sheng Tan (Code Review) 19 Jun '23

19 Jun '23

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75902?usp=email ) Change subject: acpi/acpi.c: Change signature of write_acpi_tables ...................................................................... acpi/acpi.c: Change signature of write_acpi_tables The argument is copied into current and is never modified. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I3084e43ccbe9749bc726af3120decfe8b52e1709 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75902 Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/acpi/acpi.c M src/include/acpi/acpi.h 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: Lean Sheng Tan: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 78135d7..ce14538 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1854,7 +1854,7 @@ printk(BIOS_SPEW, "\n"); } -unsigned long write_acpi_tables(unsigned long start) +unsigned long write_acpi_tables(const unsigned long start) { unsigned long current; acpi_rsdp_t *rsdp; diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 09e1211..d3f209a 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -1335,7 +1335,7 @@ /* These are implemented by the target port or north/southbridge. */ void preload_acpi_dsdt(void); -unsigned long write_acpi_tables(unsigned long addr); +unsigned long write_acpi_tables(const unsigned long addr); unsigned long acpi_fill_madt(unsigned long current); void acpi_fill_fadt(acpi_fadt_t *fadt); -- To view, visit https://review.coreboot.org/c/coreboot/+/75902?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3084e43ccbe9749bc726af3120decfe8b52e1709 Gerrit-Change-Number: 75902 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable devicetree ...
by Felix Singer (Code Review) 19 Jun '23

19 Jun '23

Attention is currently required from: Arthur Heymans, Elyes Haouas, Eric Lai, Jan Samek, Mario Scheithauer, Michael Niewöhner, Michał Żygowski, Nico Huber, Piotr Król, Subrata Banik. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75871?usp=email ) Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable devicetree option ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > Suggestion: replace true/false by enabled/disabled everywhere in coreboot code where it sounds more […] So I think we all like the idea and we just have some differences in the details, but I think it's not too much a problem. I will make this one ready tomorrow and I will start pushing more patches then. I won't change the variable names, just change the values and types. Changing names is a very different topic IMO. Please help reviewing these. There will be some. -- To view, visit https://review.coreboot.org/c/coreboot/+/75871?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I372dfb65e6bbfc79c3f036ce34bc399875d5ff16 Gerrit-Change-Number: 75871 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Sun, 18 Jun 2023 22:29:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/intel/mtlrvp: disable acpi timer for xtal shutdown
by Sukumar Ghorai (Code Review) 18 Jun '23

18 Jun '23

Attention is currently required from: Nico Huber, Paul Menzel. Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75898?usp=email ) Change subject: mb/intel/mtlrvp: disable acpi timer for xtal shutdown ...................................................................... Patch Set 4: Code-Review+1 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75898/comment/d8156e97_9eac9eb4 : PS3, Line 7: mainboard > mb Acknowledged https://review.coreboot.org/c/coreboot/+/75898/comment/d6f445c2_73837126 : PS3, Line 9: acpi timer need to disable for xtal shutdown > Do you mean: “needs to be disabled”? Acknowledged https://review.coreboot.org/c/coreboot/+/75898/comment/c3ef47dd_80bebc19 : PS3, Line 9: acpi timer need to disable for xtal shutdown, requirement for : platform to enter deepest sleep s0i2.2. > Please reference the source. https://review.coreboot.org/c/coreboot/+/75822/3/src/soc/intel/meteorlake/p… -- To view, visit https://review.coreboot.org/c/coreboot/+/75898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib87b7555217b6954fca98f95b86d03016cd9b783 Gerrit-Change-Number: 75898 Gerrit-PatchSet: 4 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 18 Jun 2023 21:34:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit June 2023