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Change subject: util/cbmem: add parsing of TPM logs per specs
......................................................................
util/cbmem: add parsing of TPM logs per specs
CBMEM can contain log in different forms (at most one is present):
- coreboot-specific format (CBMEM_ID_TPM_CB_LOG exported as
LB_TAG_TPM_CB_LOG)
- TPM1.2 format (CBMEM_ID_TCPA_TCG_LOG)
- TPM2 format (CBMEM_ID_TPM2_TCG_LOG)
The last two follow specifications by Trusted Computing Group, but until
now cbmem couldn't print them. (They were added not so long ago in
4191dbf0c9a57088e7a7323d8bf02a8708eacdb9 and
53db677586e3e7c4a874f1ef16f34a6d01c269a0.)
These changes make cbmem utility check for existence of TPM1.2/TPM2 logs
in CBMEM and add code necessary for parsing and printing of their
entries.
TEST=`cbmem -L` for CONFIG_TPM1=y case
TCPA log:
Specification: 1.21
Platform class: PC Client
TCPA log entry 1:
PCR: 2
Event type: Action
Digest: 5622416ea417186aa1ac32b32c527ac09009fb5e
Event data: FMAP: FMAP
TEST=`cbmem -L` for CONFIG_TPM2=y case
TPM2 log:
Specification: 2.00
Platform class: PC Client
TPM2 log entry 1:
PCR: 2
Event type: Action
Digests:
SHA256: 68d27f08cb261463a6d004524333ac5db1a3c2166721785a6061327b6538657c
Event data: FMAP: FMAP
Change-Id: Ib76dc7dec56dd1789a219539a1ac05a958f47a5c
Ticket: https://ticket.coreboot.org/issues/425
Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M src/commonlib/bsd/include/commonlib/bsd/tpm_log_defs.h
M util/cbmem/cbmem.c
2 files changed, 300 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/68749/21
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Hello Subrata Banik, Tarun Tuli,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/common: Print crashlog size info in hex
......................................................................
soc/intel/common: Print crashlog size info in hex
Print crashlog size information in hex to be consistent with
other prints.
Bug=b:262501347
TEST=values printed in hex
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com>
Change-Id: Ieb5498e702497bfbc2b4d5396d5b760a0010f5de
---
M src/soc/intel/common/block/acpi/acpi_bert.c
1 file changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/75910/2
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Change subject: mainboard/google/rex: Enable crashlog
......................................................................
Patch Set 17:
(3 comments)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/coreboot/+/74770/comment/57a7fc2c_980fd04b :
PS6, Line 9: DO NOT MERGE
> what is this ?
Done
https://review.coreboot.org/c/coreboot/+/74770/comment/2bef3196_dfedb27f :
PS6, Line 11: This patch is added to test crashlog.
> Please use a proper TEST msg and bug id?
Done
Patchset:
PS16:
> Lets move this into the rex common for now
Done
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Change subject: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75816/comment/c1e93900_f7473bff :
PS4, Line 7: Correct FPDT timestamp unit and macro name
Maybe: Correct FPDT timestamp unit from ms to us
https://review.coreboot.org/c/coreboot/+/75816/comment/a827ebdc_0bee6f08 :
PS4, Line 9: This patch is to
: correct
Imperative is shorter: Correct the unit …
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Change subject: soc/intel/meteorlake: Add support for crashlog
......................................................................
Patch Set 24:
(5 comments)
Patchset:
PS23:
> > couple of questions […]
1. I don’t see any redundant entries.
in crashlog.h
#define CRASHLOG_DESCRIPTOR_TABLE_TAG_SOC 0x0
#define CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE 0x1
We parse descriptor table to learn about crashlog records in SOC PMC, and OIE PMC SRAM. Both data has different tags. Tag=7 contain BDF info for IOE PMC SRAM device, but since we already define it in header (#define PCI_DEV_IOE_SRAM) i don’t parse the tag=7. We parse descriptor table entries with tag=0 and tag=1 only. In first pass we collect SOC PMC crashlog records and also count IOE PMC records. This is needed to allocate right size of cbmem for IOE crashlog data. After this parsing i allocate CBMEM for IOE crashlog and parse descriptor table again to collect IOE crashlog data.
2. while copying data from SRAM, we ignore invalid crashlog entries. So the final size of crashlog is adjusted.
3. that is coming from common code, pushed another patch.
File src/soc/intel/meteorlake/crashlog.c:
https://review.coreboot.org/c/coreboot/+/74769/comment/33f89360_321599ff :
PS23, Line 81: BIOS_ERROR
> BIOS_ERR
Done
https://review.coreboot.org/c/coreboot/+/74769/comment/c3e719a8_ebd7ab14 :
PS23, Line 86: BIOS_ERROR
> BIOS_ERR
Done
https://review.coreboot.org/c/coreboot/+/74769/comment/27b98e29_e3db8073 :
PS23, Line 91: BIOS_ERROR
> BIOS_ERR
Done
File src/soc/intel/meteorlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/74769/comment/b69390aa_ff2d35cf :
PS23, Line 63: TMT
> I don't believe TMT is a good short form of `telemetry` […]
Done
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I'd like you to reexamine a change. Please visit
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Verified+1 by build bot (Jenkins)
Change subject: soc/intel/meteorlake: Add support for crashlog
......................................................................
soc/intel/meteorlake: Add support for crashlog
Capture crashlog records from CPU PUNIT SRAM, SOC PMC SRAM and,
IOE SRAM. Crashlog records for IOE SRAM is discovered by
parsing SOC PMC SRAM records.
Bug=b:262501347
TEST=Able to trigger Crashlog, BERT table gets generated and decodes
as expected.
Change-Id: Ib0abd697fba35edf1c03d2a3a325b7785b985cd5
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com>
---
M src/soc/intel/meteorlake/Makefile.inc
A src/soc/intel/meteorlake/crashlog.c
A src/soc/intel/meteorlake/include/soc/crashlog.h
M src/soc/intel/meteorlake/include/soc/pci_devs.h
4 files changed, 528 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/74769/24
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Change subject: util/cbmem: add parsing of TPM logs per specs
......................................................................
Patch Set 20: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68749/comment/2dbe4a76_e304f31d :
PS20, Line 16: print them (they were added not so long ago).
Two dots/periods: … print them. (They were added not so long ago.)
If you could add the commit adding them, that’d be grant.
https://review.coreboot.org/c/coreboot/+/68749/comment/0cf51465_d0a9094a :
PS20, Line 32: (wrapped digest here manually)
Pastes can be longer than 72 characters.
Patchset:
PS20:
Thank you for the update!
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Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable devicetree option
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS3:
> I like the idea, though it feels like overengineering. […]
Suggestion: replace true/false by enabled/disabled everywhere in coreboot code where it sounds more natural. PLEASE DON'T! 😄 SCNR
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75898?usp=email )
Change subject: mainboard/intel/mtlrvp/Kconfig: disable acpi timer for xtal shutdown
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75898/comment/583e1ad2_e18f6514 :
PS3, Line 9: acpi timer need to disable for xtal shutdown
Do you mean: “needs to be disabled”?
https://review.coreboot.org/c/coreboot/+/75898/comment/81389f0b_d4b71919 :
PS3, Line 9: acpi timer need to disable for xtal shutdown, requirement for
: platform to enter deepest sleep s0i2.2.
Please reference the source.
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