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Change subject: mb/google/brya/var/vell: update FW_config to sync config.star
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/google/nissa/var/gothrax: Add GPIO table for gothrax
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Change subject: smm: Invalid the smm handler region instead of the whole
......................................................................
Patch Set 5:
(1 comment)
File src/soc/amd/common/block/cpu/smm/smm_relocate.c:
https://review.coreboot.org/c/coreboot/+/69783/comment/86eb70fe_4cdee859 :
PS4, Line 85: tseg_valid();
: lock_smm();
> > https://review.coreboot.org/c/coreboot/+/64871/comments/42ed8bbb_f4efd5eb […]
changed.
It should be changed all the time instead of resumming.
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I'd like you to reexamine a change. Please visit
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Change subject: smm: Invalid the smm handler region instead of the whole
......................................................................
smm: Invalid the smm handler region instead of the whole
The S3 data needs to be put to smm cache region. If the whole smm
regions are invalid, the header information will be lost and the data
saving will fail.
Change-Id: I1cd422f35b3dfa25ae8ed8034f05f8d47350fd6e
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/soc/amd/common/block/cpu/smm/smm_relocate.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/69783/5
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Change subject: util/docker: Update dockerfiles
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/64655/comment/8d5db0d8_e903f50b :
PS2, Line 13: Add jinja2 version 3.0.3 to the docs Dockerfile - The latest version
: breaks with the error:
: "exception: cannot import name 'contextfunction' from 'jinja2'"
is it still true with python3-jinja2 (3.1.2-1) ?
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Hello Felix Singer, build bot (Jenkins),
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Verified+1 by build bot (Jenkins)
Change subject: [WIP] include/post_code: Reorganize POST code to range specific header
......................................................................
[WIP] include/post_code: Reorganize POST code to range specific header
Relocate POST code macros to a main post_code folder with multiple
header files. In each is a description of the header and POST code
ranges proposed by Martin Roth.
This is an initial implementation and highly work in progress. Hence,
critiques, opinions and ideas are welcome!
Change-Id: Ic140f6bd46f6de2ba31db453aac5cbfd3bd4be84
Signed-off-by: lilacious <yuchenhe126(a)gmail.com>
---
A src/include/post_code/acpi.h
A src/include/post_code/bootstage.h
A src/include/post_code/coreboot.h
A src/include/post_code/debug.h
A src/include/post_code/driver.h
A src/include/post_code/error.h
A src/include/post_code/mainboard.h
A src/include/post_code/post_code_unregulated.h
A src/include/post_code/soc.h
A src/include/post_code/vendorcode.h
10 files changed, 148 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/76099/3
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Change subject: util/docker/coreboot-sdk: Drop subversion package
......................................................................
Patch Set 3: Code-Review+2
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Change subject: util/docker/coreboot-sdk: Do system update before installing packages
......................................................................
Patch Set 2:
(3 comments)
File util/docker/coreboot-sdk/Dockerfile:
https://review.coreboot.org/c/coreboot/+/76081/comment/572f6ed2_b5b804c1 :
PS2, Line 20: upgrade
dist-upgrade
while on it, maybe run "apt-get autoremove" at line #87
https://review.coreboot.org/c/coreboot/+/76081/comment/60fc401a_c0fff2b8 :
PS2, Line 39: gnat-12
This is already the default version for debian sid.
so change it back to "gnat"
(we'll need it to upgrade to 13 for gcc13)
https://review.coreboot.org/c/coreboot/+/76081/comment/60be2b16_7effc261 :
PS2, Line 86: \
: && update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
: && ln -s /usr/bin/automake /usr/bin/automake-1.15 \
: && ln -s /usr/bin/aclocal /usr/bin/aclocal-1.15
I think that those are not needed.
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Hello Felix Singer, build bot (Jenkins),
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to look at the new patch set (#2).
Change subject: [WIP] include/post_code: Reorganize POST code to range specific header
......................................................................
[WIP] include/post_code: Reorganize POST code to range specific header
Relocate POST code macros to a main post_code folder with multiple
header files. In each is a description of the header and POST code
ranges proposed by Martin Roth.
This is an initial implementation and highly work in progress. Hence,
critiques, opinions and ideas are welcome!
Change-Id: Ic140f6bd46f6de2ba31db453aac5cbfd3bd4be84
Signed-off-by: lilacious <yuchenhe126(a)gmail.com>
---
A src/include/post_code/acpi.h
A src/include/post_code/bootstage.h
A src/include/post_code/coreboot.h
A src/include/post_code/debug.h
A src/include/post_code/driver.h
A src/include/post_code/error.h
A src/include/post_code/mainboard.h
A src/include/post_code/post_code_unregulated.h
A src/include/post_code/soc.h
A src/include/post_code/vendorcode.h
10 files changed, 148 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/76099/2
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Change subject: [WIP] include/post_code: Reorganize POST code to range specific header
......................................................................
[WIP] include/post_code: Reorganize POST code to range specific header
Relocate POST code macros to a main post_code folder with multiple
header files. In each is a description of the header and POST code
ranges proposed by Martin Roth.
This is an initial implementaion and highly work in progress. Hence,
critiques, opinions and ideas are welcome!
Change-Id: Ic140f6bd46f6de2ba31db453aac5cbfd3bd4be84
Signed-off-by: lilacious <yuchenhe126(a)gmail.com>
---
A src/include/post_code/acpi.h
A src/include/post_code/bootstage.h
A src/include/post_code/coreboot.h
A src/include/post_code/debug.h
A src/include/post_code/driver.h
A src/include/post_code/error.h
A src/include/post_code/mainboard.h
A src/include/post_code/post_code_unregulated.h
A src/include/post_code/soc.h
A src/include/post_code/vendorcode.h
10 files changed, 148 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/76099/1
diff --git a/src/include/post_code/acpi.h b/src/include/post_code/acpi.h
new file mode 100644
index 0000000..0f46d95
--- /dev/null
+++ b/src/include/post_code/acpi.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains ACPI related POST codes.
+ *
+ * ACPI POST code range is:
+ * 0x80 to 0x87
+ */
+#ifndef _ACPI_H_
+#define _ACPI_H_
+
+#endif
diff --git a/src/include/post_code/bootstage.h b/src/include/post_code/bootstage.h
new file mode 100644
index 0000000..7b2801f
--- /dev/null
+++ b/src/include/post_code/bootstage.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains POST codes related to various coreboot stages.
+ *
+ * POST codes ranges of these stages are:
+ * 0x10 to 0x1f - bootblock
+ * 0x20 to 0x2f - romstage
+ * 0x30 to 0x33 - postcar
+ * 0x34 to 0x3f - ramstage
+ * 0x40 to 0x4f - ramstage hardwaremain boot stages
+ * 0xf0 to 0xf7 - SMM
+ */
+#ifndef _BOOTSTAGE_H_
+#define _BOOTSTAGE_H_
+
+#endif
diff --git a/src/include/post_code/coreboot.h b/src/include/post_code/coreboot.h
new file mode 100644
index 0000000..4792c51
--- /dev/null
+++ b/src/include/post_code/coreboot.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains coreboot POST codes excluding Stages.
+ *
+ * Coreboot POST code ranges are:
+ * 0x01 to 0x07 - coreboot startup code & common
+ * 0x08 to 0x0b - coreboot console
+ * 0xcb - coreboot identifier
+ * 0xf8 to 0xfe - end of coreboot code
+ * 0xff - coreboot finished, jump to payload
+ */
+
+#ifndef _COREBOOT_H_
+#define _COREBOOT_H_
+
+#endif
diff --git a/src/include/post_code/debug.h b/src/include/post_code/debug.h
new file mode 100644
index 0000000..b9e3296
--- /dev/null
+++ b/src/include/post_code/debug.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains POST codes related to debugging.
+ * These are never enabled by default.
+ *
+ * Debug POST code range is:
+ * 0xd0 to 0xdf
+ */
+
+#ifndef _DEBUG_H_
+#define _DEBUG_H_
+
+#endif
diff --git a/src/include/post_code/driver.h b/src/include/post_code/driver.h
new file mode 100644
index 0000000..61f2f66
--- /dev/null
+++ b/src/include/post_code/driver.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains Driver/SuperIO specific POST codes and ID.
+ *
+ * Driver/SuperIO ID is:
+ * 0x70 - is followed by an ID byte
+ *
+ * Driver/SuperIO POST code is:
+ * 0x71 to 7f
+ */
+
+#ifndef _DRIVER_H_
+#define _DRIVER_H_
+
+
+#endif
diff --git a/src/include/post_code/error.h b/src/include/post_code/error.h
new file mode 100644
index 0000000..f6dc857
--- /dev/null
+++ b/src/include/post_code/error.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains error related POST codes.
+ *
+ * Error POST code range is:
+ * 0xe0 to 0xef
+ */
+#ifndef _SMM_H_
+#define _SMM_H_
+
+#endif
diff --git a/src/include/post_code/mainboard.h b/src/include/post_code/mainboard.h
new file mode 100644
index 0000000..930124f
--- /dev/null
+++ b/src/include/post_code/mainboard.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains mainboard specific POST codes.
+ *
+ * Mainboard POST code range is:
+ * 0x50 to 0x5f
+ */
+
+#ifndef _MAINBOARD_H_
+#define _MAINBOARD_H_
+
+#endif
diff --git a/src/include/post_code/post_code_unregulated.h b/src/include/post_code/post_code_unregulated.h
new file mode 100644
index 0000000..94ad38b
--- /dev/null
+++ b/src/include/post_code/post_code_unregulated.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains unregulated POST codes.
+ *
+ * Unregulated POST code ranges are:
+ * 0x00 - Clears up port 0x80
+ * 0x88 to 0x8f - May be used anywhere for any purpose
+ */
+
+#ifndef _POST_CODE_UNREGULATED_H_
+#define _POST_CODE_UNREGULATED_H_
+
+/**
+ * \brief Not an actual post-code - used to clear port80h
+ *
+ */
+#define POSTCODE_CODE_CLEAR 0x00
+
+#endif
diff --git a/src/include/post_code/soc.h b/src/include/post_code/soc.h
new file mode 100644
index 0000000..e863647
--- /dev/null
+++ b/src/include/post_code/soc.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains SoC specific POST codes.
+ *
+ * SoC POST code range is.
+ * 0x60 to 0x6f
+ */
+#ifndef _SOC_H_
+#define _SOC_H_
+
+#endif
diff --git a/src/include/post_code/vendorcode.h b/src/include/post_code/vendorcode.h
new file mode 100644
index 0000000..f7122e0
--- /dev/null
+++ b/src/include/post_code/vendorcode.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file contains vendorcode call relating POST codes such as
+ * FSP, AGESA, etc.
+ *
+ * Vendorcode POST code range is:
+ * 0x90 to 0x9f
+ */
+
+#ifndef _VENDORCODE_H_
+#define _VENDORCODE_H_
+
+#endif
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ic140f6bd46f6de2ba31db453aac5cbfd3bd4be84
Gerrit-Change-Number: 76099
Gerrit-PatchSet: 1
Gerrit-Owner: Yuchen He <yuchenhe126(a)gmail.com>
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