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Change subject: ec/google/chromeec: Use host command API
......................................................................
Patch Set 2:
(1 comment)
File src/ec/google/chromeec/ec.c:
https://review.coreboot.org/c/coreboot/+/73325/comment/81ce6f8f_25471347
PS1, Line 523: struct chromeec_command cmd = {
> I see. […]
the variable size param/response cases i'm referring to aren't
implemented in ec_cmd_api.h, so this file isn't in an intermediate
state.
not sure if we can eliminate `struct chromeec_command`.
i think it'll take a fair bit of refactoring of coreboot chromeec support.
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Change subject: ec/google/chromeec: Use host command API
......................................................................
Patch Set 2:
(2 comments)
File src/ec/google/chromeec/ec.c:
https://review.coreboot.org/c/coreboot/+/73325/comment/1a722d64_712cfdb0
PS1, Line 20: (h) == NULL
> > callers would simply pass H (maybe choose a better name) instead of NULL? […]
Done
https://review.coreboot.org/c/coreboot/+/73325/comment/b4c645a7_1dd957ba
PS1, Line 469: _v1
> > doing so exposes the caller to semantic changes because simply updating ec_commands. […]
ya, `EC_VER_*` should not be used for aforementioned reasons.
i'm not sure how to enforce an update of ec_cmd_api.h to track
ec_commands.h... at least not without adding some pretty complex
presubmit checks. hopefully, reviewers will comment and authors
will notice that functions they're about to implement will be
provided by updating ec_cmd_api.h.
we do have some automated EC code coverage tests and metrics,
so at least people will be reminded to update the unit tests
when adding new code. it still won't ensure people update
ec_cmd_api.h to track ec_commands.h, but there are many
examples in the unit tests where ec_cmd_api.h is used
as intended, so there should be plenty of good examples
to follow.
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Change subject: mb/google/dedede/var/boxy: Update devicetree and GPIO table
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Boxy usb3 port config is same with baseboard devicetree.cb, it don't need to override it
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Hello build bot (Jenkins), Subrata Banik, Nick Vaccaro, Yu-Ping Wu, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/73325
to look at the new patch set (#2).
Change subject: ec/google/chromeec: Use host command API
......................................................................
ec/google/chromeec: Use host command API
Update the chromeec driver to use the EC host command API. Large blocks
of repetitive code to set up EC calls are replaced with single function
calls to perform the same operation.
BUG=b:258126464
BRANCH=none
TEST=booted on rex
Change-Id: I0317405b1ed0c58568078133c17c8cfbc7c21d80
Signed-off-by: Caveh Jalali <caveh(a)chromium.org>
---
M src/ec/google/chromeec/ec.c
1 file changed, 106 insertions(+), 430 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/73325/2
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Change subject: mb/google/dedede/var/boxy: Update devicetree and GPIO table
......................................................................
Patch Set 9:
(1 comment)
File src/mainboard/google/dedede/variants/boxy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/74626/comment/0ce720dd_2b3df334
PS9, Line 56: USB Port Configuration
No usb3 port?
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Change subject: mb/google/dedede/var/boxy: Add EXT_VR for boxy
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/dedede/variants/boxy/ramstage.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175422):
https://review.coreboot.org/c/coreboot/+/74889/comment/95140abb_30da0b8e
PS1, Line 1: / SPDX-License-Identifier: GPL-2.0-or-later /
spaces required around that ':' (ctx:VxW)
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Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74577 )
Change subject: soc/intel/cse_lite: Back up PSR data during CSE FW downgrade
......................................................................
Patch Set 29:
(1 comment)
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/74577/comment/9040c060_20e9d058
PS29, Line 462: if (cse_data_clear_request(cse_bp_info) != CB_SUCCESS)
> In this sequence, can we ignore backing up the PSR data safely?
yes. during data failure error, we do not care about backing up of the PSR data .
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