coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex
by build bot (Jenkins) (Code Review) 28 Apr '23

28 Apr '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Tarun Tuli, Jamie Ryu, Wonkyu Kim, Paul Menzel, Kapil Porwal, Jay Patel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73192 ) Change subject: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex ...................................................................... Patch Set 11: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175168): https://review.coreboot.org/c/coreboot/+/73192/comment/2a390b23_11f15e59 PS11, Line 12: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263103 Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/73192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0b773fb4c7abfcb3c3ab061d970327987536fb2 Gerrit-Change-Number: 73192 Gerrit-PatchSet: 11 Gerrit-Owner: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 22:33:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex
by Jay Patel (Code Review) 28 Apr '23

28 Apr '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Tarun Tuli, Jamie Ryu, Wonkyu Kim, Paul Menzel, Kapil Porwal, Jay Patel. Hello Bora Guvendik, build bot (Jenkins), Hannah Williams, Tarun Tuli, Jamie Ryu, Subrata Banik, Wonkyu Kim, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73192 to look at the new patch set (#11). Change subject: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex ...................................................................... mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex Enables feature to record pre-reset boot time using EC boot timestamps. Additional patch required in EC to enable the feature: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4263103 In EC, it is also required to enable the feature in program config file using SYSTEM_BOOT_TIME_LOGGING flag. BUG=b:271012752 TEST=Pre-reset boot timestamps added to the timestamp table, verified using cbmem -t Signed-off-by: Jay Patel <jay2.patel(a)intel.com> Change-Id: Id0b773fb4c7abfcb3c3ab061d970327987536fb2 --- M src/mainboard/google/rex/Kconfig 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/73192/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/73192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0b773fb4c7abfcb3c3ab061d970327987536fb2 Gerrit-Change-Number: 73192 Gerrit-PatchSet: 11 Gerrit-Owner: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: [WIP] mb/google/link: Use chromeec_smi_sleep()
by Kyösti Mälkki (Code Review) 28 Apr '23

28 Apr '23

Attention is currently required from: Caveh Jalali, Matt DeVillier, Boris Mittelberg. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74603 ) Change subject: [WIP] mb/google/link: Use chromeec_smi_sleep() ...................................................................... Patch Set 1: (1 comment) File src/ec/google/chromeec/smihandler.c: https://review.coreboot.org/c/coreboot/+/74603/comment/a5274370_47358554 PS1, Line 67: ACPI_S4 > changes to this file seem unintentional It's intentional here in the sense it should be discussed. While it may be that Chromebooks in their original ChromeOS installation do not support S4 suspend-to-disk, is there a reason why S4 could not be supported? If we advertise S4 as an allowed sleepstate, we would want the EC and USB port powers to behave here the same way as in S5 ? -- To view, visit https://review.coreboot.org/c/coreboot/+/74603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54c7d7455a6737f731c65e57c91b6457643c7cb2 Gerrit-Change-Number: 74603 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 22:19:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Add support for K3KL6L60GM-MGCT
by Martin L Roth (Code Review) 27 Apr '23

27 Apr '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74740 ) Change subject: mb/google/skyrim/var/winterhold: Add support for K3KL6L60GM-MGCT ...................................................................... mb/google/skyrim/var/winterhold: Add support for K3KL6L60GM-MGCT Update Samsung 4G K3KL6L60GM-MGCT support BRANCH=None BUG=b:243337816 TEST=emerge-skyrim coreboot Change-Id: I89b9798c16635a32dff12f1c0b65737d3c16cd59 Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74740 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc M src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt M src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt 3 files changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc index 1b6fb35..0d1eed2 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc @@ -12,3 +12,4 @@ SPD_SOURCES += spd/lp5/set-1/spd-6.hex # ID = 5(0b0101) Parts = K3LKCKC0BM-MGCP, H58G66AK6BX070 SPD_SOURCES += spd/lp5/set-1/spd-4.hex # ID = 6(0b0110) Parts = MT62F2G32D8DR-031 WT:B SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 7(0b0111) Parts = MT62F2G32D4DS-026 WT:B, K3KL9L90CM-MGCT, H58G66BK7BX067 +SPD_SOURCES += spd/lp5/set-1/spd-9.hex # ID = 8(0b1000) Parts = K3KL6L60GM-MGCT diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt index f3f8850..1316326 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt @@ -19,3 +19,4 @@ K3KL9L90CM-MGCT 7 (0111) H58G56BK7BX068 4 (0100) H58G66BK7BX067 7 (0111) +K3KL6L60GM-MGCT 8 (1000) diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt index eda02b8..fba1085 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt @@ -13,3 +13,4 @@ K3KL9L90CM-MGCT, H58G56BK7BX068, H58G66BK7BX067, +K3KL6L60GM-MGCT, -- To view, visit https://review.coreboot.org/c/coreboot/+/74740 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89b9798c16635a32dff12f1c0b65737d3c16cd59 Gerrit-Change-Number: 74740 Gerrit-PatchSet: 6 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: util/ifdtool/ifdtool.c: Fix default FMAP generation
by Martin L Roth (Code Review) 27 Apr '23

27 Apr '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74735 ) Change subject: util/ifdtool/ifdtool.c: Fix default FMAP generation ...................................................................... util/ifdtool/ifdtool.c: Fix default FMAP generation According to SPI programming guide, a region limit of 0 as well as region base of 7FFFh indicates an unused/reserved region. Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I790d7f5631ecef3043b2c17c41430dc4fd854f72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74735 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M util/ifdtool/ifdtool.c 1 file changed, 26 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 625b4cf..ada120b 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -457,8 +457,11 @@ for (unsigned int i = 0; i < max_regions; i++) { struct region region = get_region(frba, i); - /* is region invalid? */ - if (region.size < 1) + + /* A region limit of 0 is an indicator of an unused region + * A region base of 7FFFh is an indicator of a reserved region + */ + if (region.limit == 0 || region.base == 0x07FFF000) continue; char buf[LAYOUT_LINELEN]; @@ -1027,8 +1030,11 @@ struct region sorted_regions[MAX_REGIONS] = { 0 }; for (unsigned int i = 0; i < max_regions; i++) { struct region region = get_region(frba, i); - /* is region invalid? */ - if (region.size < 1) + + /* A region limit of 0 is an indicator of an unused region + * A region base of 7FFFh is an indicator of a reserved region + */ + if (region.limit == 0 || region.base == 0x07FFF000) continue; /* Here we decide to use the coreboot generated FMAP BIOS region, instead of -- To view, visit https://review.coreboot.org/c/coreboot/+/74735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I790d7f5631ecef3043b2c17c41430dc4fd854f72 Gerrit-Change-Number: 74735 Gerrit-PatchSet: 6 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: src/mainboard/rex: Perform CSE FW update in RAMSTAGE
by Subrata Banik (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74764 ) Change subject: src/mainboard/rex: Perform CSE FW update in RAMSTAGE ...................................................................... Patch Set 5: Code-Review-1 (1 comment) Patchset: PS5: There are boot time regression. Plus impact on end-user experience (100ms extra). need to clarify both before landing -- To view, visit https://review.coreboot.org/c/coreboot/+/74764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Gerrit-Change-Number: 74764 Gerrit-PatchSet: 5 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 19:57:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise
by Subrata Banik (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74805 ) Change subject: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/cannonlake/Kconfig: https://review.coreboot.org/c/coreboot/+/74805/comment/2f8d800d_183608c6 PS2, Line 115: if SOC_INTEL_CSE_LITE_SKU > > When CSE Lite FW update should happen is board choice, i don't think this should part of SoC Kconfig list. This was discussed earlier with Googlers (Furquan) so we pushed it to board configuration. > > Are you referring below change which selects CSE lite from mainboard ? as I mentioned/showed there instances already in SoC Kconfig where SOC_INTEL_CSE_LITE_SKU is used as decision point to select other config. For low maintenance it's better to keep it inside SoC (knowing there are 100+ boards to move the romstage section). > > ``` > select SOC_INTEL_CSE_LITE_SKU > ``` > > let me think if there are any better ways. I believe there are still some way. check the new patchset. -- To view, visit https://review.coreboot.org/c/coreboot/+/74805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f5017fbcf917201eaf8233089050bd31c3d1917 Gerrit-Change-Number: 74805 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 19:54:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Allow option to perform CSE sync at romstage
by build bot (Jenkins) (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal, Sridhar Siricilla. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74763 ) Change subject: soc/intel/meteorlake: Allow option to perform CSE sync at romstage ...................................................................... Patch Set 9: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175161): https://review.coreboot.org/c/coreboot/+/74763/comment/8203ea99_6d631090 PS9, Line 9: The change 'commit 248dbe0908f1b ("Trigger cse_fw_sync before Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 248dbe0908f1 ("soc/intel/alderlake: Trigger cse_fw_sync before DRAM Init")' -- To view, visit https://review.coreboot.org/c/coreboot/+/74763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 Gerrit-Change-Number: 74763 Gerrit-PatchSet: 9 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Thu, 27 Apr 2023 19:54:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/mainboard/rex: Perform CSE FW update in RAMSTAGE
by Subrata Banik (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has uploaded a new patch set (#5) to the change originally created by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/74764 ) Change subject: src/mainboard/rex: Perform CSE FW update in RAMSTAGE ...................................................................... src/mainboard/rex: Perform CSE FW update in RAMSTAGE TEST=Build and boot google/rex board. Check CSE FW update is successful. BRANCH=None BUG=b:273207144 Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> --- M src/mainboard/google/rex/Kconfig 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/74764/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/74764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Gerrit-Change-Number: 74764 Gerrit-PatchSet: 5 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/meteorlake: Allow option to perform CSE sync at romstage
by Subrata Banik (Code Review) 27 Apr '23

27 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal, Sridhar Siricilla. Subrata Banik has uploaded a new patch set (#9) to the change originally created by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/74763 ) Change subject: soc/intel/meteorlake: Allow option to perform CSE sync at romstage ...................................................................... soc/intel/meteorlake: Allow option to perform CSE sync at romstage The change 'commit 248dbe0908f1b ("Trigger cse_fw_sync before DRAM Init")' adds change to enable CSE FW sync in ROMSTAGE i.e. before DRAM initialization. Although the goal is to perform CSE sync in Meteor Lake using ramstage to avoid doing more intensive operations like CS sync at pre-memory stage. Hence, Meteor Lake SoC selects config option SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE to perform CSE sync from ramstage. BUG=b:273207144 BRANCH=none Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 --- M src/soc/intel/meteorlake/romstage/romstage.c 1 file changed, 23 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74763/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/74763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 Gerrit-Change-Number: 74763 Gerrit-PatchSet: 9 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2023