coreboot-gerrit April 2023

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[S] Change in coreboot[master]: mb/intel/adlrvp: Enable RTD3 root port mutex for WWAN
by Paul Menzel (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Anil Kumar K, Cliff Huang, Sridhar Siricilla. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73383 ) Change subject: mb/intel/adlrvp: Enable RTD3 root port mutex for WWAN ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/73383/comment/468ea295_33ba2db7 PS5, Line 11: For more details, please reference the commit message in: : https://review.coreboot.org/c/coreboot/+/73380 : https://review.coreboot.org/c/coreboot/+/73381/comments/d32ae39c_c41b9664 Please add a blank line between paragraphs. Commit messages should be self contained. Please copy the explanation or summarize it. https://review.coreboot.org/c/coreboot/+/73383/comment/9bdb4300_6e2448e4 PS5, Line 14: No BUG=? -- To view, visit https://review.coreboot.org/c/coreboot/+/73383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I809eb84cb1a09deb168040e83041b65237a1b576 Gerrit-Change-Number: 73383 Gerrit-PatchSet: 5 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Sat, 01 Apr 2023 09:22:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add ACPI support for Sapphire Rapids
by Lean Sheng Tan (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Marc Jones, Patrick Rudolph, Jonathan Zhang, Simon Chou, TimLiu-SMCI, Johnny Lin, Paul Menzel, Arthur Heymans, Shuming Chu (Shuming), Shelly Chang, Elyes Haouas. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71967 ) Change subject: soc/intel/xeon_sp/spr: Add ACPI support for Sapphire Rapids ...................................................................... Patch Set 29: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2a9be0222e122ae087b9cc8e1859d257e3411d6 Gerrit-Change-Number: 71967 Gerrit-PatchSet: 29 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: TimLiu-SMCI <timliu(a)supermicro.com.tw> Gerrit-CC: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: TimLiu-SMCI <timliu(a)supermicro.com.tw> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Apr 2023 09:07:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/intel: add Archer City CRB support
by Paul Menzel (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Patrick Rudolph, Simon Chou, Johnny Lin, Shuming Chu (Shuming), Arthur Heymans, Juan Sanchez. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 ) Change subject: mb/intel: add Archer City CRB support ...................................................................... Patch Set 28: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71968/comment/26bb5e1d_532a1c54 PS28, Line 11: LiuxBoot LinuxBoot -- To view, visit https://review.coreboot.org/c/coreboot/+/71968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17 Gerrit-Change-Number: 71968 Gerrit-PatchSet: 28 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Juan Sanchez Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Juan Sanchez Gerrit-Comment-Date: Sat, 01 Apr 2023 09:04:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/intel: add Archer City CRB support
by Paul Menzel (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Patrick Rudolph, Simon Chou, Johnny Lin, Shuming Chu (Shuming), Arthur Heymans, Juan Sanchez. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 ) Change subject: mb/intel: add Archer City CRB support ...................................................................... Patch Set 28: (2 comments) File src/mainboard/intel/archercity_crb/romstage.c: https://review.coreboot.org/c/coreboot/+/71968/comment/f771c530_0b414a94 PS27, Line 83: mupd->FspmConfig.DelayAfterPCIeLinkTraining = 2000; > I think the above comment already has mentioned ms. I meant remove the redundant comment, and just put the unit as a comment on the same line. https://review.coreboot.org/c/coreboot/+/71968/comment/d4d44114_d2c9a8b9 PS27, Line 96: "SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT); > Ack. Put into online would exceed 96 characters. Exceeding the limit is allowed for print strings. The reasoning is, that it’s easier to grep. -- To view, visit https://review.coreboot.org/c/coreboot/+/71968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17 Gerrit-Change-Number: 71968 Gerrit-PatchSet: 28 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Juan Sanchez Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Juan Sanchez Gerrit-Comment-Date: Sat, 01 Apr 2023 09:04:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Johnny Lin <Johnny_Lin(a)wiwynn.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Add fmd for debug FSP
by Subrata Banik (Code Review) 01 Apr '23

01 Apr '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74140 ) Change subject: mb/google/rex: Add fmd for debug FSP ...................................................................... mb/google/rex: Add fmd for debug FSP Debug FSP is ~920KiB larger than release FSP and we don't have sufficient space for rex flash layout. Remove RW_LEGACY and split them into RW_SECTION_A/B so we can have a room for it. Note: This fmd will only used for internal testing/debugging and not for the firmware in released devices. BUG=b:262868089 TEST=Build google/rex with CONFIG_BUILDING_WITH_DEBUG_FSP. Change-Id: I58b0af9c43c5d096dc80084497b39f13f67c25cd Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74140 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/mainboard/google/rex/Kconfig A src/mainboard/google/rex/chromeos-debug-fsp.fmd 2 files changed, 85 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 9d8a7cd..1a052a6 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -65,6 +65,11 @@ config DEVICETREE default "variants/baseboard/\$(CONFIG_BASEBOARD_DIR)/devicetree.cb" +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-debug-fsp.fmd" if CHROMEOS && BUILDING_WITH_DEBUG_FSP + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS + + config MAINBOARD_DIR default "google/rex" diff --git a/src/mainboard/google/rex/chromeos-debug-fsp.fmd b/src/mainboard/google/rex/chromeos-debug-fsp.fmd new file mode 100644 index 0000000..e57b4dd --- /dev/null +++ b/src/mainboard/google/rex/chromeos-debug-fsp.fmd @@ -0,0 +1,54 @@ +FLASH 32M { + SI_ALL 9M { + SI_DESC 16K + SI_ME + } + SI_BIOS 23M { + RW_SECTION_A 7M { + VBLOCK_A 64K + FW_MAIN_A(CBFS) + RW_FWID_A 64 + ME_RW_A(CBFS) 3008K + } + RW_MISC 1M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + # The RW_SPD_CACHE region is only used for rex variants that use DDRx memory. + # It is placed in the common `chromeos.fmd` file because it is only 4K and there + # is free space in the RW_MISC region that cannot be easily reclaimed because + # the RW_SECTION_B must start on the 16M boundary. + RW_SPD_CACHE(PRESERVE) 4K + RW_VPD(PRESERVE) 8K + RW_NVRAM(PRESERVE) 24K + } + # This section starts at the 16M boundary in SPI flash. + # MTL does not support a region crossing this boundary, + # because the SPI flash is memory-mapped into two non- + # contiguous windows. + RW_SECTION_B 7M { + VBLOCK_B 64K + FW_MAIN_B(CBFS) + RW_FWID_B 64 + ME_RW_B(CBFS) 3008K + } + # Make WP_RO region align with SPI vendor + # memory protected range specification. + WP_RO 8M { + RO_VPD(PRESERVE) 16K + RO_GSCVD 8K + RO_SECTION { + FMAP 2K + RO_FRID 64 + GBB@4K 12K + COREBOOT(CBFS) + } + } + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58b0af9c43c5d096dc80084497b39f13f67c25cd Gerrit-Change-Number: 74140 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/meteorlake: Add BUILDING_WITH_DEBUG_FSP
by Subrata Banik (Code Review) 01 Apr '23

01 Apr '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74139 ) Change subject: soc/intel/meteorlake: Add BUILDING_WITH_DEBUG_FSP ...................................................................... soc/intel/meteorlake: Add BUILDING_WITH_DEBUG_FSP Intel FSP has "debug" build which is not public, used for debugging by approved developers. Add a Kconfig to indicate that coreboot is building with debug version of FSP so we can adjust few things (i.e. flash layout) in the case. BUG=b:262868089 TEST=Able to build and boot google/rex. Change-Id: I5555a2ab4182ad0036c42be6fea3d934ffd0db8c Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74139 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/soc/intel/meteorlake/Kconfig 1 file changed, 28 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index e114a67..b29b3bc 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -358,4 +358,10 @@ This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. Disabling it for the platforms, which do not use MBP HOB, can improve the boot time. +config BUILDING_WITH_DEBUG_FSP + bool "Debug FSP is used for the build" + default n + help + Set this option if debug build of FSP is used. + endif -- To view, visit https://review.coreboot.org/c/coreboot/+/74139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5555a2ab4182ad0036c42be6fea3d934ffd0db8c Gerrit-Change-Number: 74139 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/meteorlake: Fix PortUsb30Enable configuration
by Subrata Banik (Code Review) 01 Apr '23

01 Apr '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74143 ) Change subject: soc/intel/meteorlake: Fix PortUsb30Enable configuration ...................................................................... soc/intel/meteorlake: Fix PortUsb30Enable configuration PortUsb30Enable has been overridden unexpectedly, this patch fixed it. BUG=b:276181378 Test=boot to rex and check USB3 ports are working. Signed-off-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/74143 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/soc/intel/meteorlake/fsp_params.c 1 file changed, 20 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 041429d..d345f1b 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -487,7 +487,6 @@ max_port = get_max_tcss_port(); for (i = 0; i < max_port; i++) { - s_cfg->PortUsb30Enable[i] = config->tcss_ports[i].enable; if (config->tcss_ports[i].enable) s_cfg->CpuUsb3OverCurrentPin[i] = config->tcss_ports[i].ocpin; } -- To view, visit https://review.coreboot.org/c/coreboot/+/74143 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e Gerrit-Change-Number: 74143 Gerrit-PatchSet: 3 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/meteorlake: Fix PortUsb30Enable configuration
by Eric Lai (Code Review) 31 Mar '23

31 Mar '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Ivy Jian. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74143 ) Change subject: soc/intel/meteorlake: Fix PortUsb30Enable configuration ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Patchset: PS2: > Yes, this is what I mean, we should check USB3/USB2 device tree node to create the bitmap too. but not relate to this CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/74143 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e Gerrit-Change-Number: 74143 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Apr 2023 05:53:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Fix PortUsb30Enable configuration
by Eric Lai (Code Review) 31 Mar '23

31 Mar '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Ivy Jian. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74143 ) Change subject: soc/intel/meteorlake: Fix PortUsb30Enable configuration ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > UsbTcPortEn has been checked by is_dev_enabled in fill_fsps_tcss_paramsand. […] Yes, this is what I mean, we should check USB3/USB2 device tree node to create the bitmap too. -- To view, visit https://review.coreboot.org/c/coreboot/+/74143 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e Gerrit-Change-Number: 74143 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Apr 2023 05:51:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Enable 'struct cpu_info' update for MTL
by Sridhar Siricilla (Code Review) 31 Mar '23

31 Mar '23

Sridhar Siricilla has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74130 ) Change subject: soc/intel/meteorlake: Enable 'struct cpu_info' update for MTL ...................................................................... soc/intel/meteorlake: Enable 'struct cpu_info' update for MTL The patch enables addition of core_type member to 'struct cpu_info' for MeteorLake platform. TEST=Build and verify the code for Rex Change-Id: I01abed6b87bec2f8eb39bfc941faff070b83abe6 Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74130 Reviewed-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/meteorlake/cpu.c 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Ronak Kanabar: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c index a778381..31b7ef2 100644 --- a/src/soc/intel/meteorlake/cpu.c +++ b/src/soc/intel/meteorlake/cpu.c @@ -127,6 +127,9 @@ /* Enable Turbo */ enable_turbo(); + /* Set core type in struct cpu_info */ + set_dev_core_type(); + if (CONFIG(INTEL_TME) && is_tme_supported()) set_tme_core_activate(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/74130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01abed6b87bec2f8eb39bfc941faff070b83abe6 Gerrit-Change-Number: 74130 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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