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Change subject: soc/mediatek/mt8188: Set pin drive strength to 8mA for NOR
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74064/comment/dd7d4b2f_92546c41
PS6, Line 10:
What drive strength was used before this change?
https://review.coreboot.org/c/coreboot/+/74064/comment/158353aa_e93fc47f
PS6, Line 15: TEST=build pass
If you run it, please paste the new debug messages.
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Change subject: soc/mediatek/mt8188: Reduce lastbus configuration size
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74061/comment/c3d142d7_77f33a4e
PS2, Line 7: soc/mediatek/mt8188: Reduce lastbus configuration size
ā¦ by 1280 bytes
https://review.coreboot.org/c/coreboot/+/74061/comment/dd670d08_69beba26
PS2, Line 9: consumes constant memory size
ā¦ by allocating 16 and 8 members arrays?
https://review.coreboot.org/c/coreboot/+/74061/comment/51c14ac2_13aa45ad
PS2, Line 10: memory
Do you mean memory or flash ROM size?
https://review.coreboot.org/c/coreboot/+/74061/comment/2f3b433b_ec524f95
PS2, Line 15:
Isnāt the bootblock compressed? How big is the difference in CBFS?
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Change subject: soc/mediatek/mt8186: Reduce GPIO code size in bootblock
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74062/comment/e456548b_3f1ad998
PS3, Line 2: jason-ch chen
Is your name written jason-ch? You could also use a capital first letter.
https://review.coreboot.org/c/coreboot/+/74062/comment/47bd6f2e_f3cb2e12
PS3, Line 8:
Please describe the problem, and mention the sizes before and after.
https://review.coreboot.org/c/coreboot/+/74062/comment/1e141120_1cf70cfb
PS3, Line 13: jason-ch chen
Ditto.
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Change subject: mb/google/sarien: Add method to set GPIOs in romstage
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Patch Set 1: Code-Review+2
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Change subject: 3rdparty/fsp: Update pointer from 6f2f17f3d339 to cf40b9ec6c7b
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74242/comment/fe380fc9_98a4ee1e
PS1, Line 8:
Please add a summary.
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Change subject: mb/google/sarien: Implement touchscreen power sequencing
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Patch Set 1: Code-Review+2
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Change subject: mb/google/sarien: Set touchpad/screen IRQs to LEVEL vs EDGE
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Patch Set 1: Code-Review+2
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Change subject: mb/google/sarien: Set touchpad/screen IRQs to LEVEL vs EDGE
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Not sure is this correct for elan touch-pad, actually it is I2C inbox driver not HID. https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thiā¦
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