coreboot-gerrit April 2023

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[M] Change in coreboot[master]: mb/google/nissa/var/yaviks: Update GPIOs to support yavilla
by Shon Wang (Code Review) 07 Apr '23

07 Apr '23

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74264 ) Change subject: mb/google/nissa/var/yaviks: Update GPIOs to support yavilla ...................................................................... mb/google/nissa/var/yaviks: Update GPIOs to support yavilla Yavilla is an additional nissa reference board which is almost identical to yaviks, so is reusing the yaviks coreboot variant. so update the GPIO tables to handle these based on fw_config. BUG=b:277148122 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I831b199055c931e7a4a393eeb9e75e83c8ae3c3a --- M src/mainboard/google/brya/variants/yaviks/fw_config.c M src/mainboard/google/brya/variants/yaviks/gpio.c 2 files changed, 118 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/74264/1 diff --git a/src/mainboard/google/brya/variants/yaviks/fw_config.c b/src/mainboard/google/brya/variants/yaviks/fw_config.c index 800fc1f..071af13 100644 --- a/src/mainboard/google/brya/variants/yaviks/fw_config.c +++ b/src/mainboard/google/brya/variants/yaviks/fw_config.c @@ -5,6 +5,17 @@ #include <console/console.h> #include <fw_config.h> +static const struct pad_config lte_disable_pads_yavilla[] = { + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_NC(GPP_A8, NONE), + /* D6 : WWAN_EN */ + PAD_NC(GPP_D6, NONE), + /* F12 : WWAN_RST_L */ + PAD_NC(GPP_F12, NONE), + /* H23 : WWAN_SAR_DETECT_ODL */ + PAD_NC(GPP_H23, NONE), +}; + static const struct pad_config emmc_disable_pads[] = { /* I7 : EMMC_CMD */ PAD_NC(GPP_I7, NONE), @@ -39,4 +50,9 @@ gpio_padbased_override(padbased_table, emmc_disable_pads, ARRAY_SIZE(emmc_disable_pads)); } + if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { + printk(BIOS_INFO, "Disable LTE-related GPIO pins on nirwen.\n"); + gpio_configure_pads(lte_disable_pads_yavilla, + ARRAY_SIZE(lte_disable_pads_yavilla)); + } } diff --git a/src/mainboard/google/brya/variants/yaviks/gpio.c b/src/mainboard/google/brya/variants/yaviks/gpio.c index b6f95dd..9a6b8f6 100644 --- a/src/mainboard/google/brya/variants/yaviks/gpio.c +++ b/src/mainboard/google/brya/variants/yaviks/gpio.c @@ -4,6 +4,7 @@ #include <baseboard/variants.h> #include <commonlib/helpers.h> #include <soc/gpio.h> +#include <fw_config.h> /* Pad configuration in ramstage */ static const struct pad_config override_gpio_table[] = { @@ -57,6 +58,47 @@ PAD_NC(GPP_R7, NONE), }; +/* Pad configuration in ramstage for yavilla */ +static const struct pad_config override_gpio_table_yavilla[] = { + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_CFG_GPO(GPP_A8, 1, DEEP), + /* A18 : NC ==> HDMI_HPD_SRC */ + PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), + /* A21 : GPP_A21 ==> USB_C1_AUX_DC_P */ + PAD_CFG_GPO(GPP_A21, 0, DEEP), + /* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */ + PAD_CFG_GPO(GPP_A22, 1, DEEP), + + /* D6 : WWAN_EN */ + PAD_CFG_GPO(GPP_D6, 1, DEEP), + /* D8 : SD_CLKREQ_ODL ==> NC */ + PAD_NC(GPP_D8, NONE), + + /* F6 : CNV_PA_BLANKING ==> NC */ + PAD_NC(GPP_F6, NONE), + /* F12 : WWAN_RST_ODL */ + PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), + /* F23 : V1P05EXT_CTRL ==> NC */ + PAD_NC(GPP_F23, NONE), + + /* H8 : CNV_MFUART2_RXD ==> NC */ + PAD_NC(GPP_H8, NONE), + /* H9 : CNV_MFUART2_TXD ==> NC */ + PAD_NC(GPP_H9, NONE), + /* H12 : SD_PERST_L ==> NC */ + PAD_NC(GPP_H12, NONE), + /* H13 : EN_PP3300_SD_X ==> NC */ + PAD_NC(GPP_H13, NONE), + /* H15 : HDMI_SRC_SCL */ + PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), + /* H17 : HDMI_SRC_SDA */ + PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), + /* H19 : SRCCLKREQ4# ==> NC */ + PAD_NC(GPP_H19, NONE), + /* H23 : WWAN_SAR_DETECT_ODL */ + PAD_CFG_GPO(GPP_H23, 1, DEEP), +}; + /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { /* H12 : UART0_RTS# ==> SD_PERST_L */ @@ -83,6 +125,32 @@ PAD_CFG_GPO(GPP_H13, 1, DEEP), }; +/* Early pad configuration in bootblock for yavilla */ +static const struct pad_config early_gpio_table_yavilla[] = { + /* D6 : WWAN_EN */ + PAD_CFG_GPO(GPP_D6, 0, DEEP), + /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ + PAD_CFG_GPO(GPP_H20, 0, DEEP), + /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */ + PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP), + /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ + PAD_CFG_GPI(GPP_F18, NONE, DEEP), + /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */ + PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), + /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */ + PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), + /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */ + PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), + /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ + PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), + /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */ + PAD_CFG_GPO(GPP_B11, 1, DEEP), + /* F12 : WWAN_RST_ODL */ + PAD_CFG_GPO(GPP_F12, 0, DEEP), +}; + static const struct pad_config romstage_gpio_table[] = { /* H12 : UART0_RTS# ==> SD_PERST_L */ PAD_CFG_GPO(GPP_H12, 1, DEEP), @@ -90,20 +158,37 @@ PAD_CFG_GPO(GPP_H20, 1, DEEP), }; +static const struct pad_config romstage_gpio_table_yavilla[] = { + /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ + PAD_CFG_GPO(GPP_H20, 1, DEEP), +}; + const struct pad_config *variant_gpio_override_table(size_t *num) { + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1C)) || fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { + *num = ARRAY_SIZE(override_gpio_table_yavilla); + return override_gpio_table_yavilla; + } *num = ARRAY_SIZE(override_gpio_table); return override_gpio_table; } const struct pad_config *variant_early_gpio_table(size_t *num) { + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1C)) || fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { + *num = ARRAY_SIZE(early_gpio_table_yavilla); + return early_gpio_table_yavilla; + } *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } const struct pad_config *variant_romstage_gpio_table(size_t *num) { + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1C)) || fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { + *num = ARRAY_SIZE(romstage_gpio_table_yavilla); + return romstage_gpio_table_yavilla; + } *num = ARRAY_SIZE(romstage_gpio_table); return romstage_gpio_table; } -- To view, visit https://review.coreboot.org/c/coreboot/+/74264 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I831b199055c931e7a4a393eeb9e75e83c8ae3c3a Gerrit-Change-Number: 74264 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: rex: add variant gpio tables for variant creation
by Subrata Banik (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: YH Lin, Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74257 ) Change subject: rex: add variant gpio tables for variant creation ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: The implementation is little different in Rex in terms GPIO (compared to the Brya) where we allow each variant to have their own variant_gpio_table() for bootblock/romstage/ramstage without bothering about an override from the baseboard. This would make things simple enough. Please find more details here: https://github.com/coreboot/coreboot/commit/7c5a9c7cb0cf6605435aa4c885c6372… -- To view, visit https://review.coreboot.org/c/coreboot/+/74257 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebc098f8d480ac3e1835b00861fd844d97f281a8 Gerrit-Change-Number: 74257 Gerrit-PatchSet: 1 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 06:51:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/amd/spi: Add xlate_windows to mmap 32M flash
by build bot (Jenkins) (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74260 ) Change subject: soc/amd/spi: Add xlate_windows to mmap 32M flash ...................................................................... Patch Set 3: (1 comment) File src/soc/amd/common/block/spi/spi_map_big.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173649): https://review.coreboot.org/c/coreboot/+/74260/comment/fd1785fd_6e46ffe1 PS3, Line 181: _Static_assert(ROM_PAGES <= (sizeof(boot_dev) / sizeof(struct mem_region_device)), \ Avoid unnecessary line continuations -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 07 Apr 2023 06:44:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/amd/spi: Add xlate_windows to mmap 32M flash
by Bao Zheng (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74260 to look at the new patch set (#3). Change subject: soc/amd/spi: Add xlate_windows to mmap 32M flash ...................................................................... soc/amd/spi: Add xlate_windows to mmap 32M flash Use SPI ROM page to switch pages. We need to switch back to page 0 in munmap. This is one of series of patches to support 32/64M flash. BUG=b:255374782 Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/spi/Kconfig M src/soc/amd/common/block/spi/Makefile.inc A src/soc/amd/common/block/spi/spi_map_big.c 3 files changed, 266 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/74260/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: fmap/region: Call the munmap of access_dev in xlate_windows
by Bao Zheng (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Jason Glenesk, Aaron Durbin, Furquan Shaikh, Marshall Dawson, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74259 ) Change subject: fmap/region: Call the munmap of access_dev in xlate_windows ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: https://review.coreboot.org/c/coreboot/+/74260 In this CL, the munmap is needed every time the mmap is called to switch back to page 0. From the region device and mapping, we can not know which windows we are going to munmap. Now it is a workaround to call the first windows's munmap. -- To view, visit https://review.coreboot.org/c/coreboot/+/74259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f2f78d64a521b6da613228339e09065e37be88 Gerrit-Change-Number: 74259 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 07 Apr 2023 06:29:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/omnigul: Add usb_lpm_incapable for DB Type-C port
by Ron Lee (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Dtrain Hsu, Subrata Banik, Kapil Porwal. Ron Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74246 ) Change subject: mb/google/brya/var/omnigul: Add usb_lpm_incapable for DB Type-C port ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I618cd09f45ede0a76cf46b3e467ba87775dd5d9d Gerrit-Change-Number: 74246 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ron Lee <ron.lee(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 06:25:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: WIP: Add xlate_windows to mmap 32M flash
by build bot (Jenkins) (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74260 ) Change subject: WIP: Add xlate_windows to mmap 32M flash ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/block/spi/spi_map_big.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173648): https://review.coreboot.org/c/coreboot/+/74260/comment/897843ed_9aa81920 PS2, Line 193: for (page_index = 0; page_index < ROM_PAGES; page_index ++) { space prohibited before that '++' (ctx:WxB) -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 07 Apr 2023 06:25:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: WIP: Add xlate_windows to mmap 32M flash
by Bao Zheng (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74260 to look at the new patch set (#2). Change subject: WIP: Add xlate_windows to mmap 32M flash ...................................................................... WIP: Add xlate_windows to mmap 32M flash Use SPI ROM page to switch pages. This is one of series of patches to support 32/64M flash. BUG=b:255374782 Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/spi/Kconfig M src/soc/amd/common/block/spi/Makefile.inc A src/soc/amd/common/block/spi/spi_map_big.c 3 files changed, 265 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/74260/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Enable RTD3 root port mutex for WWAN
by Cliff Huang (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Anil Kumar K, Cliff Huang, Jamie Ryu. Hello Bora Guvendik, build bot (Jenkins), Hannah Williams, Anil Kumar K, Jamie Ryu, Jérémy Compostella, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73384 to look at the new patch set (#6). Change subject: mb/intel/mtlrvp: Enable RTD3 root port mutex for WWAN ...................................................................... mb/intel/mtlrvp: Enable RTD3 root port mutex for WWAN This adds RTD3 RPMX mutex to the root port. It is shared between RTD3 and WWAN. The purpose of using this mutex is to prevent OSPM from calling _ON and _OFF methods while WWAN kernel driver is calling _RST, which accesses the GPIO pins. BUG=NA TEST=boot to OS and check the generated SSDT table for the root port. The RPMX mutex should be generated under the root port. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I5b53765453bac0fc96e9651ab347069c7c8bf058 --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/73384/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/73384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b53765453bac0fc96e9651ab347069c7c8bf058 Gerrit-Change-Number: 73384 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: mb/intel: Add 2 SPR sockets CRB Archer City
by Shelly Chang (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Patrick Rudolph, Simon Chou, Johnny Lin, Paul Menzel, Shuming Chu (Shuming), Arthur Heymans, Lean Sheng Tan, Juan Sanchez. Shelly Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 ) Change subject: mb/intel: Add 2 SPR sockets CRB Archer City ...................................................................... Patch Set 31: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71968/comment/d3013331_82df1b7e PS29, Line 7: add Archer City CRB support > Done Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17 Gerrit-Change-Number: 71968 Gerrit-PatchSet: 31 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Daocheng Bu <daocheng.bu(a)intel.com> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Juan Sanchez Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Juan Sanchez Gerrit-Comment-Date: Fri, 07 Apr 2023 05:27:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-MessageType: comment

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