coreboot-gerrit April 2023

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[M] Change in coreboot[master]: amdfwtool: Add --fsp-version option
by Grzegorz Bernacki (Code Review) 07 Apr '23

07 Apr '23

Grzegorz Bernacki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74266 ) Change subject: amdfwtool: Add --fsp-version option ...................................................................... amdfwtool: Add --fsp-version option This version tells amdfwtool to create a text file which contains versions of following blobs: PSP bootloader (type 0x01), SMU firmware (type 0x08), AGESA bootloader 0 (type 0x30). BUG=b:224780134 TEST=Tested on Skyrim device Change-Id: Idaa3a02ace524f44cfa656e34308bd896016dff6 Signed-off-by: Grzegorz Bernacki <bernacki(a)google.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 2 files changed, 68 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/74266/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 4d821bd..fba9ff2 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -211,6 +211,7 @@ printf("--sharedmem Location of PSP/FW shared memory\n"); printf("--sharedmem-size Maximum size of the PSP/FW shared memory\n"); printf(" area\n"); + printf("--fsp-version <FILE> Stores version of FSP blobs in the file\n"); printf("\nEmbedded Firmware Structure options used by the PSP:\n"); printf("--spi-speed <HEX_VAL> SPI fast speed to place in EFS Table\n"); printf(" 0x0 66.66Mhz\n"); @@ -842,6 +843,42 @@ } } +static void dump_fsp_version(char *fsp_file, amd_fw_entry *fw_table) +{ + struct amd_fw_header hdr; + amd_fw_entry *index; + FILE *version_file; + int blob_fd; + + version_file = fopen(fsp_file, "w"); + if (version_file == NULL) { + fprintf(stderr, "Error: Creating fsp version file failed\n"); + return; + } + + for (index = fw_table; index->type != AMD_FW_INVALID; index++) { + if (!(index->filename)) + continue; + + switch (index->type) { + case AMD_FW_PSP_BOOTLOADER: + case AMD_FW_PSP_SMU_FIRMWARE: + case AMD_ABL0: + blob_fd = open(index->filename, O_RDONLY); + read(blob_fd, &hdr, sizeof(hdr)); + fprintf(version_file, "type: 0x%02x ver:%02x.%02x.%02x.%02x\n", + index->type, hdr.version[3], hdr.version[2], + hdr.version[1], hdr.version[0]); + close(blob_fd); + break; + default: + break; + } + } + + fclose(version_file); +} + /* For debugging */ static void dump_psp_firmwares(amd_fw_entry *fw_table) { @@ -1469,6 +1506,7 @@ AMDFW_OPT_SPL_TABLE, AMDFW_OPT_VERSTAGE, AMDFW_OPT_VERSTAGE_SIG, + AMDFW_OPT_FSP_VERSION_SIG, AMDFW_OPT_INSTANCE, AMDFW_OPT_APCB, @@ -1526,6 +1564,7 @@ {"spl-table", required_argument, 0, AMDFW_OPT_SPL_TABLE }, {"verstage", required_argument, 0, AMDFW_OPT_VERSTAGE }, {"verstage_sig", required_argument, 0, AMDFW_OPT_VERSTAGE_SIG }, + {"fsp-version", required_argument, 0, AMDFW_OPT_FSP_VERSION_SIG }, /* BIOS Directory Table items */ {"instance", required_argument, 0, AMDFW_OPT_INSTANCE }, {"apcb", required_argument, 0, AMDFW_OPT_APCB }, @@ -1857,6 +1896,7 @@ amd_cb_config cb_config = { 0 }; int debug = 0; + char *fsp_file = NULL; ctx.current_pointer_saved = 0xFFFFFFFF; @@ -2003,6 +2043,9 @@ register_fw_filename(AMD_FW_VERSTAGE_SIG, sub, optarg); sub = instance = 0; break; + case AMDFW_OPT_FSP_VERSION_SIG: + fsp_file = optarg; + break; case AMDFW_OPT_SIGNED_OUTPUT: signed_output_file = optarg; sub = instance = 0; @@ -2099,6 +2142,9 @@ open_process_config(config, &cb_config, debug); + if (fsp_file) { + dump_fsp_version(fsp_file, amd_psp_fw_table); + } if (!fuse_defined) register_fw_fuse(DEFAULT_SOFT_FUSE_CHAIN); diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 03cc056..ee5f874 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -375,7 +375,9 @@ uint32_t comp_size; /* Starting MDN fw_id is populated instead of fw_type. */ uint16_t fw_id; - uint8_t reserved_5a[18]; + uint8_t reserved_5a[6]; + uint8_t version[4]; + uint8_t reserved_64[8]; uint32_t size_total; uint8_t reserved_70[12]; /* Starting MDN fw_id is populated instead of fw_type. fw_type will still be around -- To view, visit https://review.coreboot.org/c/coreboot/+/74266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idaa3a02ace524f44cfa656e34308bd896016dff6 Gerrit-Change-Number: 74266 Gerrit-PatchSet: 1 Gerrit-Owner: Grzegorz Bernacki Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/common: Order the different types of cores based on APIC IDs
by Sridhar Siricilla (Code Review) 07 Apr '23

07 Apr '23

Sridhar Siricilla has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72132 ) Change subject: soc/intel/common: Order the different types of cores based on APIC IDs ...................................................................... soc/intel/common: Order the different types of cores based on APIC IDs Currently coreboot presents the BSP core first, then efficient cores and Performance cores as indicated below: ``` /sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0-1 /sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4 /sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5 /sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6 /sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7 /sys/devices/system/cpu/cpu1/topology/thread_siblings_list:0-1 /sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2-3 /sys/devices/system/cpu/cpu3/topology/thread_siblings_list:2-3 ``` Existing code presents mix of different cores to OS and causes CPU load balancing and power/performance impact. So, the patch fixes this disorder by ordering the Performance cores first, compute die efficient cores next, and finally SOC efficient cores if they are present. This is done to run the media applications in a power efficient manner, please refer the ChromeOS patches for details: https://chromium-review.googlesource.com/c/chromiumos/platform2/+/3963893 BUG=b:262886449 TEST=Verified the code on Rex system After the fix: ``` /sys/devices/system/cpu/cpu0/topology/thread_siblings_list:0-1 /sys/devices/system/cpu/cpu1/topology/thread_siblings_list:0-1 /sys/devices/system/cpu/cpu2/topology/thread_siblings_list:2-3 /sys/devices/system/cpu/cpu3/topology/thread_siblings_list:2-3 /sys/devices/system/cpu/cpu4/topology/thread_siblings_list:4 /sys/devices/system/cpu/cpu5/topology/thread_siblings_list:5 /sys/devices/system/cpu/cpu6/topology/thread_siblings_list:6 /sys/devices/system/cpu/cpu7/topology/thread_siblings_list:7 ``` Change-Id: I21487a5eb0439ea0cb5976787d1769ee94777469 Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72132 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jan Samek <jan.samek(a)siemens.com> Reviewed-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/acpi/cpu_hybrid.c M src/soc/intel/common/block/include/intelblocks/acpi.h 3 files changed, 94 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Ronak Kanabar: Looks good to me, approved Jan Samek: Looks good to me, but someone else must approve Sukumar Ghorai: Looks good to me, but someone else must approve diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 1c3747d..4b790b7 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -87,7 +87,11 @@ size_t ioapic_entries; /* Local APICs */ - current = acpi_create_madt_lapics_with_nmis(current); + + if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID)) + current = acpi_create_madt_lapics_with_nmis_hybrid(current); + else + current = acpi_create_madt_lapics_with_nmis(current); /* IOAPIC */ ioapic_entries = soc_get_ioapic_info(&ioapic_table); diff --git a/src/soc/intel/common/block/acpi/cpu_hybrid.c b/src/soc/intel/common/block/acpi/cpu_hybrid.c index a6f9103..7725e3f 100644 --- a/src/soc/intel/common/block/acpi/cpu_hybrid.c +++ b/src/soc/intel/common/block/acpi/cpu_hybrid.c @@ -77,6 +77,40 @@ cpu_apic_info.perf_cpu_cnt = perf_core_cnt; } +static unsigned long acpi_create_madt_lapics_hybrid(unsigned long current) +{ + size_t index; + + for (index = 0; index < cpu_apic_info.total_cpu_cnt; index++) { + if (cpu_apic_info.apic_ids[index] < 0xff) + current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, + index, cpu_apic_info.apic_ids[index]); + else + current += acpi_create_madt_lx2apic((acpi_madt_lx2apic_t *)current, + index, cpu_apic_info.apic_ids[index]); + } + + return current; +} + +unsigned long acpi_create_madt_lapics_with_nmis_hybrid(unsigned long current) +{ + const u16 flags = MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH; + + current = acpi_create_madt_lapics_hybrid(current); + + /* 1: LINT1 connect to NMI */ + /* create all subtables for processors */ + current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, + ACPI_MADT_LAPIC_NMI_ALL_PROCESSORS, flags, 1); + + if (!CONFIG(XAPIC_ONLY)) + current += acpi_create_madt_lx2apic_nmi((acpi_madt_lx2apic_nmi_t *)current, + ACPI_MADT_LX2APIC_NMI_ALL_PROCESSORS, flags, 1); + + return current; +} + static enum cpu_perf_eff_type get_core_type(void) { return (get_soc_cpu_type() == CPUID_CORE_TYPE_INTEL_CORE) ? diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h index 0f7a165..fa32092 100644 --- a/src/soc/intel/common/block/include/intelblocks/acpi.h +++ b/src/soc/intel/common/block/include/intelblocks/acpi.h @@ -18,6 +18,8 @@ CPUID_UNKNOWN = 0xff, }; +unsigned long acpi_create_madt_lapics_with_nmis_hybrid(unsigned long current); + /* Generates ACPI code to define _CPC control method */ void acpigen_write_CPPC_hybrid_method(int core_id); -- To view, visit https://review.coreboot.org/c/coreboot/+/72132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21487a5eb0439ea0cb5976787d1769ee94777469 Gerrit-Change-Number: 72132 Gerrit-PatchSet: 19 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Frank Chu (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Nick Vaccaro. Frank Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 09:52:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Derek Huang (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu, Nick Vaccaro. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 09:18:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Frank Chu (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Derek Huang, Nick Vaccaro. Frank Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Do you have the result of SLEW_FAST_4? Is it confirmed that we will use SLEW_FAST_8? we have discuss test fast/4 in b:271788117 -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 09:17:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Derek Huang <derekhuang(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/intel: Add 2 SPR sockets CRB Archer City
by Johnny Lin (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Patrick Rudolph, Simon Chou, Paul Menzel, Shuming Chu (Shuming), Arthur Heymans, Lean Sheng Tan, Juan Sanchez, Shelly Chang. Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 ) Change subject: mb/intel: Add 2 SPR sockets CRB Archer City ...................................................................... Patch Set 31: -Code-Review (1 comment) Patchset: PS28: > Done Should we add SPR support to Change-Id: Ie682bfa376d699c0eee8de0752cd6ae6d8d81fee? -- To view, visit https://review.coreboot.org/c/coreboot/+/71968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17 Gerrit-Change-Number: 71968 Gerrit-PatchSet: 31 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Daocheng Bu <daocheng.bu(a)intel.com> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Juan Sanchez Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Juan Sanchez Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 08:28:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Derek Huang (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu, Nick Vaccaro. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Do you have the result of SLEW_FAST_4? Is it confirmed that we will use SLEW_FAST_8? -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 08:12:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/intel: Add 2 SPR sockets CRB Archer City
by Johnny Lin (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Patrick Rudolph, Simon Chou, Paul Menzel, Shuming Chu (Shuming), Arthur Heymans, Lean Sheng Tan, Juan Sanchez, Shelly Chang. Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71968 ) Change subject: mb/intel: Add 2 SPR sockets CRB Archer City ...................................................................... Patch Set 31: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17 Gerrit-Change-Number: 71968 Gerrit-PatchSet: 31 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Daocheng Bu <daocheng.bu(a)intel.com> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Juan Sanchez Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Juan Sanchez Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 08:09:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/yaviks: Update GPIOs to support yavilla
by Shon Wang (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli. Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74264 ) Change subject: mb/google/nissa/var/yaviks: Update GPIOs to support yavilla ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/74264 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I831b199055c931e7a4a393eeb9e75e83c8ae3c3a Gerrit-Change-Number: 74264 Gerrit-PatchSet: 2 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 07:30:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Kyle Lin (Code Review) 07 Apr '23

07 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu, Nick Vaccaro. Kyle Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 07 Apr 2023 07:28:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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