coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled
by Johnny Lin (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, David Hendricks, Shuo Liu, Nill Ge, Arthur Heymans, Lean Sheng Tan, TangYiwei, Shelly Chang, Tim Chu. Hello build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Paul Menzel, Jingle Hsu, David Hendricks, Nill Ge, Arthur Heymans, TangYiwei, Christian Walter, Shuo Liu, Lean Sheng Tan, Shelly Chang, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74296 to look at the new patch set (#3). Change subject: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled ...................................................................... soc/intel/xeon_sp: Fix very small total memory when CXL is enabled Processor attached memory should use ram_from_to rather than reserved_ram_from_to. Treat the calculation of gi_mem_size size as 64MB. By default SOC_INTEL_HAS_CXL is enabled for Sapphire Rapids platforms, this should fix small total memory issue. Tested=On AC without attaching CXL memory, the total memory size is the same as de-selecting SOC_INTEL_HAS_CXL. Change-Id: I38e9d138fd284620ac616a65f444e943f1774869 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/soc/intel/xeon_sp/uncore.c 1 file changed, 32 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/74296/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38e9d138fd284620ac616a65f444e943f1774869 Gerrit-Change-Number: 74296 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: David Hendricks Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled
by Paul Menzel (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, David Hendricks, Shuo Liu, Nill Ge, Arthur Heymans, Lean Sheng Tan, TangYiwei, Shelly Chang, Tim Chu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74296 ) Change subject: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74296/comment/8bafeb29_f9e46433 PS2, Line 12: By default SOC_INTEL_HAS_CXL is enabled for Sapphire Rapids platforms, Please add a blank line between paragraphs. https://review.coreboot.org/c/coreboot/+/74296/comment/06cce23e_8dfe7c71 PS2, Line 13: small total memory issue Please elaborate. -- To view, visit https://review.coreboot.org/c/coreboot/+/74296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38e9d138fd284620ac616a65f444e943f1774869 Gerrit-Change-Number: 74296 Gerrit-PatchSet: 2 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: David Hendricks Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 11 Apr 2023 10:42:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: treewide: Remove Intel Quark SoC & Galileo mainboard
by Paul Menzel (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Felix Singer, Jason Glenesk, Martin L Roth, Angel Pons, Arthur Heymans, Elyes Haouas. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72005 ) Change subject: treewide: Remove Intel Quark SoC & Galileo mainboard ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: There are success reports on the mailing list. There are only problems with the payload I believe. -- To view, visit https://review.coreboot.org/c/coreboot/+/72005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f68b851f2eb3a99f12aa0f5ab3370cd0c2a76ae Gerrit-Change-Number: 72005 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 11 Apr 2023 10:41:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/cmd/block: Implement an API to get firmware partition details
by Paul Menzel (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Haribalaraman Ramasubramanian, Dinesh Gehlot, Rizwan Qureshi, Reka Norman. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74005 ) Change subject: soc/intel/cmd/block: Implement an API to get firmware partition details ...................................................................... Patch Set 27: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74005/comment/97b2cd13_80163df6 PS27, Line 9: FPT Firmware Partition T? or is it PT for partition? File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/74005/comment/a552f994_35151045 PS27, Line 1242: printk(BIOS_ERR, "HECI: Prerequisites not met for fw partition request\n"); For debugging it might be easier to check each condition separately, and log what condition failed. (Or do the called functions log messages themselves?) https://review.coreboot.org/c/coreboot/+/74005/comment/79dce86c_1c4b75af PS27, Line 1250: resp->hdr.result Is `resp->hdr.result` always set? https://review.coreboot.org/c/coreboot/+/74005/comment/070ac016_e5e4752c PS27, Line 1260: printk(BIOS_INFO, "CSE: Info request denied, recovery mode or no CSE LITE SKU\n"); To help debugging an issue, I’d log a dedicated message for each condition. -- To view, visit https://review.coreboot.org/c/coreboot/+/74005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0582010bbb836bd4734f843a8c74dee49d203fd8 Gerrit-Change-Number: 74005 Gerrit-PatchSet: 27 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Tue, 11 Apr 2023 10:40:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband
by Paul Menzel (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Sean Rhodes, Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67076 ) Change subject: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband ...................................................................... Patch Set 7: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/67076/comment/c9d0673c_8ecd2cf8 PS7, Line 11: ``` : intel_punit_ipc intel_punit_ipc.2.auto: Invalid IRQ, using polling mode : intel_punit_ipc intel_punit_ipc.2.auto: invalid resource : ``` I’d just indent the “code” (monospace) parts by four spaces instead of using ```. https://review.coreboot.org/c/coreboot/+/67076/comment/deb8d5b2_980c9589 PS7, Line 20: You seem to do that in ACPI/ASL. What document is needed to verify your implementation? -- To view, visit https://review.coreboot.org/c/coreboot/+/67076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide33c2deca4c254a18e4878d22e8f1279b39428e Gerrit-Change-Number: 67076 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 11 Apr 2023 10:15:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/corsola: Add tablet Starmie as variant
by cong yang (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Ruihai Zhou. cong yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74048 ) Change subject: mb/google/corsola: Add tablet Starmie as variant ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1556ad0031e9a24bf26fa84d7713b7b7928312a Gerrit-Change-Number: 74048 Gerrit-PatchSet: 7 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 11 Apr 2023 10:01:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/: Store CSE firmware version into cbmem table
by Sridhar Siricilla (Code Review) 11 Apr '23

11 Apr '23

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[M] Change in coreboot[master]: soc/intel/: Store CSE firmware version into cbmem table
by Sridhar Siricilla (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Dinesh Gehlot. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74256 ) Change subject: soc/intel/: Store CSE firmware version into cbmem table ...................................................................... Patch Set 9: (2 comments) Patchset: PS9: We will address this as follow-up patch, so closing the comment. File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/74256/comment/39076adb_1793cbce PS7, Line 1089: : const struct cse_bp_entry *cse_bp = cse_get_bp_entry(RW, &cse_bp_info.bp_info); : struct cse_fw_partition_info *version; : version = cbmem_add(CBMEM_ID_CSE_PARTITION_VERSION, sizeof(*version)); : version->cur_cse_fw_version.major = cse_bp->fw_ver.major; : version->cur_cse_fw_version.minor = cse_bp->fw_ver.minor; : version->cur_cse_fw_version.hotfix = cse_bp->fw_ver.hotfix; : version->cur_cse_fw_version.build = cse_bp->fw_ver.build; : } : > I can ask our team to implement this. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/74256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8 Gerrit-Change-Number: 74256 Gerrit-PatchSet: 9 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Tue, 11 Apr 2023 09:47:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/: Store CSE firmware version into cbmem table
by Dinesh Gehlot (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Sridhar Siricilla. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74256 ) Change subject: soc/intel/: Store CSE firmware version into cbmem table ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/74256/comment/9bb5f66d_24ba1ba7 PS8, Line 1082: SOC_INTEL_CSE_LITE_SKU > > This flag check is not required since the file get compiled only if SOC_INTEL_CSE_LITE_SKU config […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/74256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8 Gerrit-Change-Number: 74256 Gerrit-PatchSet: 9 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 11 Apr 2023 09:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/cmd/block/cse: Add config option for storing fw version info
by Dinesh Gehlot (Code Review) 11 Apr '23

11 Apr '23

Attention is currently required from: Dinesh Gehlot. Hello build bot (Jenkins), Subrata Banik, Kangheui Won, Kapil Porwal, Sridhar Siricilla, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74255 to look at the new patch set (#8). Change subject: soc/intel/cmd/block/cse: Add config option for storing fw version info ...................................................................... soc/intel/cmd/block/cse: Add config option for storing fw version info This patch adds a configuration option, 'SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION', which enables the storage of firmware version information in CBMEM memory. This information can be used to identify the firmware version that is currently installed on the system. The option depends on the `DRIVERS_INTEL_ISH` option. BUG=b:273661726 Test=None Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I78fef45fd2940536b3e91cfd4d184b7635238499 --- M src/soc/intel/common/block/cse/Kconfig 1 file changed, 27 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/74255/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/74255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78fef45fd2940536b3e91cfd4d184b7635238499 Gerrit-Change-Number: 74255 Gerrit-PatchSet: 8 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2023