coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: Revert "soc/intel/xeon_sp: Don't sort struct device cpus for numa"
by Arthur Heymans (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Jonathan Zhang, Simon Chou, Paul Menzel, Angel Pons, TangYiwei, Patrick Rudolph, Lance Zhao, Anjaneya "Reddy" Chagam, Johnny Lin, Ziang Wang, Tim Wawrzynczak, Christian Walter, Lean Sheng Tan. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73908 ) Change subject: Revert "soc/intel/xeon_sp: Don't sort struct device cpus for numa" ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Possible fix: CB:74436 I'd prefer to get that one in indeed. -- To view, visit https://review.coreboot.org/c/coreboot/+/73908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I371d9c3ab9351c1e60685e2210c9dbaaac23f09d Gerrit-Change-Number: 73908 Gerrit-PatchSet: 2 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 14:41:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA
by Matt DeVillier (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Tim Van Patten, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74334 ) Change subject: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie30b6324f9977261c60e55ed509e979ef290f1f1 Gerrit-Change-Number: 74334 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 14 Apr 2023 14:28:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Remove stale call to xeonsp_init_cpu_config
by Lean Sheng Tan (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Nico Huber, Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Naresh Solanki, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74436 ) Change subject: soc/intel/xeon_sp/spr: Remove stale call to xeonsp_init_cpu_config ...................................................................... Patch Set 6: Code-Review+2 (1 comment) File src/soc/intel/xeon_sp/spr/cpu.c: https://review.coreboot.org/c/coreboot/+/74436/comment/310fd298_e3aadeb3 PS3, Line 83: cpu->path.apic.package_id); > Is that ok? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89e14b40186007ab0290b24cd6bd58015be376b6 Gerrit-Change-Number: 74436 Gerrit-PatchSet: 6 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 14:18:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu,soc/intel: Use acpigen_write_processor_device()
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Subrata Banik, Angel Pons, Elyes Haouas. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72488 ) Change subject: cpu,soc/intel: Use acpigen_write_processor_device() ...................................................................... Patch Set 9: (2 comments) File src/cpu/intel/speedstep/acpi.c: https://review.coreboot.org/c/coreboot/+/72488/comment/adec9b1b_e047551a PS4, Line 80: int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; > the part this was about was taken out of the patch, so i'll mark this as resolved follow-up CB:74441 File src/southbridge/intel/i82371eb/acpi_tables.c: https://review.coreboot.org/c/coreboot/+/72488/comment/477e7786_010723f1 PS3, Line 31: acpigen_write_processor_device(cpu); > this part was taken out of the patch, so i'll mark this as resolved follow-up CB:74440 -- To view, visit https://review.coreboot.org/c/coreboot/+/72488 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1448e0a8845b3a1beee0a3ed744358944faf66d8 Gerrit-Change-Number: 72488 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 14 Apr 2023 14:10:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/cmn/cse: Move API to get FW partition info into cse_lite.c
by Sridhar Siricilla (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, SRIDHAR SIRICILLA, Subrata Banik, Dinesh Gehlot, Kapil Porwal. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74382 ) Change subject: soc/intel/cmn/cse: Move API to get FW partition info into cse_lite.c ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74382/comment/2adf9a03_0492a487 PS1, Line 9: The patch moves API that gets the CSE FW partition information into : CSE Lite specific file aka cse_lite.c because the consumer of this API : is the cse_lite specific ChromeOS devices hence, it's meaningful to : move the cse lite specific implementation inside cse_lite.c file. > >> cse.c can't be a library because it has other pci ops entries. Today the R&R of cse. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74382 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49ffaec467f6fb24327de3b2882e37bf31eeb7cf Gerrit-Change-Number: 74382 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 14:03:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: WIP mb/prodrive/atlas: Enable/disable sleep states based on EC
by Arthur Heymans (Code Review) 14 Apr '23

14 Apr '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74421 ) Change subject: WIP mb/prodrive/atlas: Enable/disable sleep states based on EC ...................................................................... WIP mb/prodrive/atlas: Enable/disable sleep states based on EC With the profile ATLAS_PROF_REALTIME_PERFORMANCE it is desired to not have the option to be able to sleep, the reason being that windows goes to sleep after 30min of inactivity. Change-Id: I424db7e712a705c628aa3a10a486d3313404987a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/acpi/Kconfig M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/prodrive/atlas/mainboard.c M src/southbridge/intel/common/acpi/sleepstates.asl 4 files changed, 68 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/74421/1 diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index ec7fcc4..1b40386 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -58,3 +58,11 @@ depends on HAVE_ACPI_TABLES help Selected by platforms that support and fill Intel Low Power Idle Table. + +config OVERRIDE_ENABLED_SLEEP_STATES + bool + depends on HAVE_ACPI_TABLES + help + Select this on platforms that want a way to override the enabled + _Sx states during runtime. Do this by adding a namespace '\OSFG'. + bit 0 enabled S1, bit 1 S2 etc. S0 and S5 are assumed. diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index 914ce9f..2a70901 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -12,6 +12,7 @@ select PCIEXP_SUPPORT_RESIZABLE_BARS select SOC_INTEL_ALDERLAKE_PCH_P select SOC_INTEL_ALDERLAKE_S3 + select OVERRIDE_ENABLED_SLEEP_STATES if BOARD_PRODRIVE_ATLAS_BASEBOARD diff --git a/src/mainboard/prodrive/atlas/mainboard.c b/src/mainboard/prodrive/atlas/mainboard.c index db808ce..54fddc4 100644 --- a/src/mainboard/prodrive/atlas/mainboard.c +++ b/src/mainboard/prodrive/atlas/mainboard.c @@ -1,10 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <acpi/acpigen.h> #include <console/console.h> #include <device/device.h> #include <gpio.h> #include <smbios.h> #include <string.h> +#include <sys/types.h> #include <types.h> #include "gpio.h" @@ -66,9 +68,25 @@ t->count = smbios_add_string(t->eos, get_formatted_pn()); } +#define S1_ENABLE (1 << 0) +#define S2_ENABLE (1 << 1) +#define S3_ENABLE (1 << 2) +#define S4_ENABLE (1 << 3) + +static void mainboard_fill_ssdt(const struct device *dev) +{ + acpigen_write_scope("\\"); + const struct emi_eeprom_vpd *eeprom = get_emi_eeprom_vpd(); + uint32_t sleep_enable = eeprom->profile == ATLAS_PROF_REALTIME_PERFORMANCE ? + S4_ENABLE : (CONFIG(HAVE_ACPI_RESUME) ? S3_ENABLE : S1_RESUME) | S4_ENABLE; + acpigen_write_name_dword("OSFG", sleep_enable); + acpigen_pop_len(); +} + static void mainboard_enable(struct device *dev) { dev->ops->get_smbios_strings = mainboard_smbios_strings; + dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt; } struct chip_operations mainboard_ops = { diff --git a/src/southbridge/intel/common/acpi/sleepstates.asl b/src/southbridge/intel/common/acpi/sleepstates.asl index eae7642..1649334 100644 --- a/src/southbridge/intel/common/acpi/sleepstates.asl +++ b/src/southbridge/intel/common/acpi/sleepstates.asl @@ -1,12 +1,31 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -#if !CONFIG(HAVE_ACPI_RESUME) -Name(\_S1, Package(){0x1,0x0,0x0,0x0}) +/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ +#if CONFIG(HAVE_ACPI_RESUME) +Name (SSFG, 0x0D) #else -Name(\_S3, Package(){0x5,0x0,0x0,0x0}) +Name (SSFG, 0x09) #endif -#if !CONFIG(DISABLE_ACPI_HIBERNATE) -Name(\_S4, Package(){0x6,0x0,0x0,0x0}) -#endif -Name(\_S5, Package(){0x7,0x0,0x0,0x0}) +If (CONFIG(DISABLE_ACPI_HIBERNATE)) { + SSFG &= 0xf7 +} + +if (CONFIG(OVERRIDE_ENABLED_ACPI_SLEEP_STATES)) { + External (\OSFG, IntObj) + SSFG = \OSFG +} + +/* Supported sleep states: */ +Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */ + +If (SSFG & 0x01) { + Name(\_S1, Package () {0x01, 0x00, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */ +} +If (SSFG & 0x04) { + Name(\_S3, Package () {0x06, 0x00, 0x00, 0x00} ) /* (S3) - Suspend to RAM */ +} +If (SSFG & 0x08) { + Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */ +} + +Name(\_S5, Package () {0x07, 0x00, 0x00, 0x00} ) /* (S5) - Soft Off */ -- To view, visit https://review.coreboot.org/c/coreboot/+/74421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I424db7e712a705c628aa3a10a486d3313404987a Gerrit-Change-Number: 74421 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd: Clarify ACPI _PRT entry generation
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74314 ) Change subject: soc/amd: Clarify ACPI _PRT entry generation ...................................................................... Patch Set 3: (1 comment) File src/soc/amd/common/block/pci/acpi_prt.c: https://review.coreboot.org/c/coreboot/+/74314/comment/5c9eba14_ee3b46e5 PS2, Line 10: /* GNB IO-APIC is located after the FCH IO-APIC */ > > i'm ok with revisiting this later. also not sure if Arthur might have some patches for this […] I don't have anything to show either, but device nodes was my plan too. -- To view, visit https://review.coreboot.org/c/coreboot/+/74314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d862e37424f9fea7f269cd09e9e90056531b643 Gerrit-Change-Number: 74314 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 13:56:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Remove stale call to xeonsp_init_cpu_config
by Lean Sheng Tan (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Nico Huber, Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Naresh Solanki, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74436 ) Change subject: soc/intel/xeon_sp/spr: Remove stale call to xeonsp_init_cpu_config ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74436/comment/1db988a2_3e0b1633 PS3, Line 12: > I don't mind if you go ahead without testing (but only because I'm not affected). […] Got it, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/74436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89e14b40186007ab0290b24cd6bd58015be376b6 Gerrit-Change-Number: 74436 Gerrit-PatchSet: 6 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 13:50:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd: Clarify ACPI _PRT entry generation
by Arthur Heymans (Code Review) 14 Apr '23

14 Apr '23

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74314 ) Change subject: soc/amd: Clarify ACPI _PRT entry generation ...................................................................... Patch Set 3: (1 comment) File src/soc/amd/common/block/pci/acpi_prt.c: https://review.coreboot.org/c/coreboot/+/74314/comment/76520bf4_6db10edb PS2, Line 10: /* GNB IO-APIC is located after the FCH IO-APIC */ > i'm ok with revisiting this later. also not sure if Arthur might have some patches for this Not yet, but I will eventually need to make this code work with multiple root bridges and ioapics for a server platform. Not sure how to do it. I was thinking of adding ioapics as struct devices. Any thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/74314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d862e37424f9fea7f269cd09e9e90056531b643 Gerrit-Change-Number: 74314 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 13:46:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ACPI: Obsolete FADT duty_offset and duty_width fields
by Arthur Heymans (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74438 ) Change subject: ACPI: Obsolete FADT duty_offset and duty_width fields ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74438 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e84c8ccd2772c9b3d61f71b74324c8d28f4eefe Gerrit-Change-Number: 74438 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 13:38:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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