coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[M] Change in coreboot[master]: cpu,soc/intel: Separate single SSDT CPU entry
by build bot (Jenkins) (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Arthur Heymans. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74399 ) Change subject: cpu,soc/intel: Separate single SSDT CPU entry ...................................................................... Patch Set 3: (1 comment) File src/cpu/intel/haswell/acpi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174204): https://review.coreboot.org/c/coreboot/+/74399/comment/3d449cc7_b3b4fe28 PS3, Line 328: static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) line length of 101 exceeds 100 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/74399 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Gerrit-Change-Number: 74399 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 14 Apr 2023 18:06:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Separate single SSDT CPU entry
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Arthur Heymans. Hello build bot (Jenkins), Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74399 to look at the new patch set (#3). Change subject: cpu,soc/intel: Separate single SSDT CPU entry ...................................................................... cpu,soc/intel: Separate single SSDT CPU entry Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/common/block/acpi/acpi.c 6 files changed, 129 insertions(+), 98 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/74399/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74399 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Gerrit-Change-Number: 74399 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA
by Raul Rangel (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Jason Glenesk, Martin Roth, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74334 ) Change subject: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie30b6324f9977261c60e55ed509e979ef290f1f1 Gerrit-Change-Number: 74334 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 14 Apr 2023 17:58:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/baytrail: Make acpi_madt_irq_overrides() static
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Kyösti Mälkki. Hello build bot (Jenkins), Nico Huber, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74325 to look at the new patch set (#3). Change subject: soc/intel/baytrail: Make acpi_madt_irq_overrides() static ...................................................................... soc/intel/baytrail: Make acpi_madt_irq_overrides() static Change-Id: Id362e023358054df2c4511fd108c313da868306d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/include/soc/acpi.h 2 files changed, 21 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/74325/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74325 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id362e023358054df2c4511fd108c313da868306d Gerrit-Change-Number: 74325 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Sync ACPI CPU object implementations
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74396 ) Change subject: cpu,soc/intel: Sync ACPI CPU object implementations ...................................................................... cpu,soc/intel: Sync ACPI CPU object implementations Take variable names from soc/intel and adjust counter to start from zero. Change-Id: I14e1120e74e1bd92acd782a53104fabfb266c3b5 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74396 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c 3 files changed, 36 insertions(+), 31 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 1e1c724..66d58ad 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -327,30 +327,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_logical_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device( - (cpuID - 1) * cores_per_package+coreID - 1); + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - coreID - 1, cores_per_package); + generate_P_state_entries(core_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(device); /* Generate T-state tables */ - generate_T_state_entries( - cpuID - 1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 834a3bb..370ea96 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -205,30 +205,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device( - (cpuID-1)*cores_per_package+coreID-1); + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - cpuID-1, cores_per_package); + generate_P_state_entries(cpu_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(); /* Generate T-state tables */ - generate_T_state_entries( - cpuID-1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index d7c048d..a10f8dc 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -296,30 +296,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_logical_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { - /* Generate Scope(\_SB) { Device(CPU */ - acpigen_write_processor_device( - (cpuID-1)*cores_per_package+coreID-1); + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - cpuID-1, cores_per_package); + generate_P_state_entries(cpu_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(device); /* Generate T-state tables */ - generate_T_state_entries( - cpuID-1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/74396 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14e1120e74e1bd92acd782a53104fabfb266c3b5 Gerrit-Change-Number: 74396 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Use acpigen_write_processor_device()
by Kyösti Mälkki (Code Review) 14 Apr '23

14 Apr '23

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72488 ) Change subject: cpu,soc/intel: Use acpigen_write_processor_device() ...................................................................... cpu,soc/intel: Use acpigen_write_processor_device() Use acpigen_write_processor_device() instead of deprecated acpigen_write_processor(). Change-Id: I1448e0a8845b3a1beee0a3ed744358944faf66d8 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72488 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c 5 files changed, 37 insertions(+), 18 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index a53978d..1e1c724 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -337,9 +337,9 @@ for (cpuID = 1; cpuID <= numcpus; cpuID++) { for (coreID = 1; coreID <= cores_per_package; coreID++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor( - (cpuID - 1) * cores_per_package+coreID - 1, 0, 0); + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device( + (cpuID - 1) * cores_per_package+coreID - 1); /* Generate P-state tables */ generate_P_state_entries( @@ -352,7 +352,7 @@ generate_T_state_entries( cpuID - 1, cores_per_package); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } } diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 0409b8a..834a3bb 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -215,9 +215,9 @@ for (cpuID = 1; cpuID <= numcpus; cpuID++) { for (coreID = 1; coreID <= cores_per_package; coreID++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor( - (cpuID-1)*cores_per_package+coreID-1, 0, 0); + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device( + (cpuID-1)*cores_per_package+coreID-1); /* Generate P-state tables */ generate_P_state_entries( @@ -230,7 +230,7 @@ generate_T_state_entries( cpuID-1, cores_per_package); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } } diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index a305c01..d7c048d 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -306,9 +306,9 @@ for (cpuID = 1; cpuID <= numcpus; cpuID++) { for (coreID = 1; coreID <= cores_per_package; coreID++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor( - (cpuID-1)*cores_per_package+coreID-1, 0, 0); + /* Generate Scope(\_SB) { Device(CPU */ + acpigen_write_processor_device( + (cpuID-1)*cores_per_package+coreID-1); /* Generate P-state tables */ generate_P_state_entries( @@ -321,7 +321,7 @@ generate_T_state_entries( cpuID-1, cores_per_package); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } } diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 75c2863..42e4b26 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -266,8 +266,8 @@ const struct pattrs *pattrs = pattrs_get(); for (core = 0; core < pattrs->num_cpus; core++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor(core, 0, 0); + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(core); /* Generate P-state tables */ generate_p_state_entries(core, pattrs->num_cpus); @@ -278,7 +278,7 @@ /* Generate T-state tables */ generate_t_state_entries(core, pattrs->num_cpus); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } /* PPKG is usually used for thermal management diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 46a8771..9ef7a75 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -282,8 +282,8 @@ const struct pattrs *pattrs = pattrs_get(); for (core = 0; core < pattrs->num_cpus; core++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor(core, 0, 0); + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(core); /* Generate P-state tables */ generate_p_state_entries(core, pattrs->num_cpus); @@ -294,7 +294,7 @@ /* Generate T-state tables */ generate_t_state_entries(core, pattrs->num_cpus); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } /* PPKG is usually used for thermal management -- To view, visit https://review.coreboot.org/c/coreboot/+/72488 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1448e0a8845b3a1beee0a3ed744358944faf66d8 Gerrit-Change-Number: 72488 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: mb/google/dedede/var/boten: Generate SPD ID for supported memory part
by Karthik Ramasubramanian (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Henry Sun, Paul Fagerburg, Kevin3 Yang, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74416 ) Change subject: mb/google/dedede/var/boten: Generate SPD ID for supported memory part ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f910393847c6494f77c009cb11f50b31bebffb6 Gerrit-Change-Number: 74416 Gerrit-PatchSet: 5 Gerrit-Owner: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 14 Apr 2023 17:18:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA
by Karthik Ramasubramanian (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74334 ) Change subject: soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA ...................................................................... Patch Set 6: (1 comment) File src/soc/amd/common/block/lpc/spi_dma.c: https://review.coreboot.org/c/coreboot/+/74334/comment/032c9993_f4ad70df PS6, Line 242: mem_pool_free(&cbfs_cache, mapping); > Can you open a tech-debt bug to address that memory leak? It would be good to not lose track of it, […] Done - b/278264488 -- To view, visit https://review.coreboot.org/c/coreboot/+/74334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie30b6324f9977261c60e55ed509e979ef290f1f1 Gerrit-Change-Number: 74334 Gerrit-PatchSet: 6 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 14 Apr 2023 17:14:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: Update fsp submodule to upstream master
by Lean Sheng Tan (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Subrata Banik, Kapil Porwal, Angel Pons, Arthur Heymans, Eric Lai. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74442 ) Change subject: Update fsp submodule to upstream master ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I haven’t check the details yet, but from a quick glance seems like the new CCG ADL FSP updated by N […] might be just size issue -- To view, visit https://review.coreboot.org/c/coreboot/+/74442 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88d954568b427ea288610710155014ae0f460ff9 Gerrit-Change-Number: 74442 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 17:03:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: Update fsp submodule to upstream master
by Lean Sheng Tan (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Subrata Banik, Kapil Porwal, Angel Pons, Arthur Heymans, Eric Lai. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74442 ) Change subject: Update fsp submodule to upstream master ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I haven’t check the details yet, but from a quick glance seems like the new CCG ADL FSP updated by Nate recently broke the adl build. -- To view, visit https://review.coreboot.org/c/coreboot/+/74442 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88d954568b427ea288610710155014ae0f460ff9 Gerrit-Change-Number: 74442 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 17:00:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023