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Change subject: soc/intel/baytrail: Make acpi_madt_irq_overrides() static
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74325/comment/478d67ee_a4b3faa0
PS2, Line 7: Move a function inside a file
> The effective change seems to be about the API? so I'd expect something […]
Done
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Change subject: mb/google/brya/variants/hades: Update GPIO configs
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Patch Set 6:
(1 comment)
Patchset:
PS6:
We should update the device tree and Kconfig for TPM IRQ.
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Change subject: security/vboot: Add function to clear recovery request
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Patch Set 3:
(1 comment)
File src/security/vboot/bootmode.c:
https://review.coreboot.org/c/coreboot/+/74343/comment/31cded7d_ca439294
PS3, Line 31: save_vbnv
> Do we need to save nvdata here in this function? Usually it should be sufficient to save nvdata righ […]
I mean, the way this is designed to run (at the end of ramstage, with the assumption that there's no vboot-aware payload coming after it), it needs to save here because there won't be another save afterwards. Whether the save_vbnv() call should be in this function or the caller is debatable. I'd suggest (also see my comment in CB:74402) just transforming this function into a boot state hook that's not called by anything else and just does it's thing (clear recovery reason and safe vbnv) at the end of ramstage in one go.
back_up_vbnv_cmos() is a different thing since it only runs for the CMOS backend, so I think it should stay independent (it just needs to be ordered right to ensure the clearing recovery reason happens before the backup).
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Change subject: soc/intel/xeon_sp/spr: Add and enable BROKEN_FSP_NEEDS_STACK_ABOVE_BSS
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/xeon_sp/spr/Kconfig:
PS1:
the soc should only select the option and the option itself should be in another scope. please see my comment on CB:61164
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Change subject: arch/x86/car.ld: Accomodate for FSP spec violation on Xeon-SP
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Patch Set 2:
(1 comment)
File src/soc/intel/xeon_sp/cpx/Kconfig:
https://review.coreboot.org/c/coreboot/+/61164/comment/8690cd72_a56db07b
PS2, Line 87: config BROKEN_FSP_NEEDS_STACK_ABOVE_BSS
the kconfig option should probably be put into src/arch/x86/Kconfig to be in the same scope as the file that it'll affect, be default n, and the option then be selected in src/soc/intel/xeon_sp/cpx/Kconfig to have the override for that case. otherwise the option will only be defined for this soc, but used in common code. sure, the current implementation will end up working, since the kconfig default is n, but it would be nicer to have it in a better place
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Change subject: soc/amd: Use ACPI_COMMON_MADT_IOAPIC
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> looks good to me and mandolin also still boots successfully and the kernel doesn't complain
all apic and irq override specific dmesg output is also still what i'd expect
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Change subject: AMD binaryPI: Use ACPI_COMMON_MADT_IOAPIC
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
looks good to me, but i don't have the apu2 board set up for testing yet. the equivalent change on another amd soc works
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Change subject: soc/amd: Use ACPI_COMMON_MADT_IOAPIC
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Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
looks good to me and mandolin also still boots successfully and the kernel doesn't complain
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Change subject: ACPI: Add COMMON_ACPI_MADT_IOAPIC and CUSTOM_ACPI_MADT
......................................................................
Patch Set 2: Code-Review+2
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