coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[M] Change in coreboot[master]: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC
by Felix Held (Code Review) 15 Apr '23

15 Apr '23

Attention is currently required from: Keith Hui, Lance Zhao, Jason Glenesk, Raul Rangel, Branden Waldner, Matt DeVillier, Sridhar Siricilla, Kyösti Mälkki, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74316 ) Change subject: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Patchset: PS3: the changes affecting the amd chips look good to me -- To view, visit https://review.coreboot.org/c/coreboot/+/74316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f8d7ee9891553742d73a92b55a87c04fa95a132 Gerrit-Change-Number: 74316 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 23:58:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: ec/acpi/ec: replace misleading "recv_ec_data_timeout" console output
by Felix Held (Code Review) 15 Apr '23

15 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74381 ) Change subject: ec/acpi/ec: replace misleading "recv_ec_data_timeout" console output ...................................................................... ec/acpi/ec: replace misleading "recv_ec_data_timeout" console output In the non-timeout case in recv_ec_data_timeout, a message like this one will get printed at BIOS_SPEW log level: "recv_ec_data_timeout: 0x00". The "timeout" part of the function name corresponds to what the function does, but the message will only be printed when not running into the timeout which is a bit misleading and might suggest a problem when there is none. To avoid this possible confusion, don't use the function name in the printk, but use "Data from EC:" instead. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I521f67517f64fc64e24853d96730c3f9459f1ccc Reviewed-on: https://review.coreboot.org/c/coreboot/+/74381 Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/ec/acpi/ec.c 1 file changed, 23 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index fbd9acd..f183801 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -88,7 +88,7 @@ } data = inb(ec_data_reg); - printk(BIOS_SPEW, "%s: 0x%02x\n", __func__, data); + printk(BIOS_SPEW, "Data from EC: 0x%02x\n", data); return data; } -- To view, visit https://review.coreboot.org/c/coreboot/+/74381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I521f67517f64fc64e24853d96730c3f9459f1ccc Gerrit-Change-Number: 74381 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: soc/intel/meteorlake: Add B0 stepping CPU ID
by Subrata Banik (Code Review) 15 Apr '23

15 Apr '23

Attention is currently required from: Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal, Musse Abdullahi. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74300 ) Change subject: soc/intel/meteorlake: Add B0 stepping CPU ID ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b939ccc8b05e3648c55f8f2a0a391cb08f04184 Gerrit-Change-Number: 74300 Gerrit-PatchSet: 3 Gerrit-Owner: Musse Abdullahi <musse.abdullahi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Musse Abdullahi <musse.abdullahi(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Musse Abdullahi <musse.abdullahi(a)intel.corp-partner.google.com> Gerrit-Attention: Musse Abdullahi <musse.abdullahi(a)intel.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 21:02:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/brya: Enable CSE FPT Info config for Nissa
by Subrata Banik (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Derek Huang, Kyle Lin, Kapil Porwal, Dinesh Gehlot. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74387 ) Change subject: mb/google/brya: Enable CSE FPT Info config for Nissa ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: I have excluded the Marasov and Omnigul as I have to talk the owners of those project and can only enable this feature in Brya FW branch which has significant code difference between upstream and downstream. -- To view, visit https://review.coreboot.org/c/coreboot/+/74387 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I234b5d272077de9a6f0a9ba69fa015cda7ebd56c Gerrit-Change-Number: 74387 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 20:54:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/cmd/block/cse: Add config option for storing fw version info
by Subrata Banik (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Subrata Banik, Paul Menzel, Dinesh Gehlot. Subrata Banik has uploaded a new patch set (#15) to the change originally created by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/74255 ) Change subject: soc/intel/cmd/block/cse: Add config option for storing fw version info ...................................................................... soc/intel/cmd/block/cse: Add config option for storing fw version info This patch adds a configuration option, 'SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION', which enables the storage of firmware version information in CBMEM memory. This information can be used to identify the firmware version that is currently installed on the system. The option depends on the `DRIVERS_INTEL_ISH` config and platform should be flexible enough to opt out from enabling this feature. The cost of sending HECI command to read the CSE FPT is significant (~200ms) hence, the idea is to read the CSE RW version on every cold reset (to cover the CSE update scenarios) and store into CBMEM to avoid the cost of resending the HECI command in all consecutive warm boots. Later boot stages can just read the CBMEM ID to retrieve the ISH version if required. Additionally, ensure this feature is platform specific hence, getting enabled for the platform that would like to store the ISH version into the CBMEM and parse to perform some additional work. BUG=b:273661726 TEST=Able to build and boot google/marasov. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I78fef45fd2940536b3e91cfd4d184b7635238499 --- M src/soc/intel/common/block/cse/Kconfig 1 file changed, 55 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/74255/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/74255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78fef45fd2940536b3e91cfd4d184b7635238499 Gerrit-Change-Number: 74255 Gerrit-PatchSet: 15 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: soc/intel/meteorlake: Add B0 stepping CPU ID
by Musse Abdullahi (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Jamie Ryu, Subrata Banik, Paul Menzel, Kapil Porwal, Musse Abdullahi. Musse Abdullahi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74300 ) Change subject: soc/intel/meteorlake: Add B0 stepping CPU ID ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74300/comment/42a38665_508168f1 PS1, Line 7: meteorlake > drop this Done https://review.coreboot.org/c/coreboot/+/74300/comment/58873f2a_b14ab75c PS1, Line 7: meteorlake > Meteor Lake Done https://review.coreboot.org/c/coreboot/+/74300/comment/d93c15e1_cadd5cfe PS1, Line 7: soc/intel/mtl: > soc/intel/meteorlake: Done https://review.coreboot.org/c/coreboot/+/74300/comment/0f43bd97_c8ec6349 PS1, Line 8: > > If you have the source handy, please document it in the commit message. […] Done Commit Message: https://review.coreboot.org/c/coreboot/+/74300/comment/8e598233_dd52fd73 PS2, Line 9: doc#723567 > > please add a meaningful commit msg […] @subrata how about now? any more info you like added to the commit message? -- To view, visit https://review.coreboot.org/c/coreboot/+/74300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b939ccc8b05e3648c55f8f2a0a391cb08f04184 Gerrit-Change-Number: 74300 Gerrit-PatchSet: 3 Gerrit-Owner: Musse Abdullahi <musse.abdullahi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Musse Abdullahi <musse.abdullahi(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Musse Abdullahi <musse.abdullahi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Fri, 14 Apr 2023 20:47:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/meteorlake: Add B0 stepping CPU ID
by Musse Abdullahi (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal, Musse Abdullahi. Hello build bot (Jenkins), Tarun Tuli, Jamie Ryu, Subrata Banik, Paul Menzel, Kapil Porwal, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74300 to look at the new patch set (#3). Change subject: soc/intel/meteorlake: Add B0 stepping CPU ID ...................................................................... soc/intel/meteorlake: Add B0 stepping CPU ID This patch adds CPU ID for B0 stepping (aka ES2). DOC=#723567 TEST=Able to boot on B0 rvp and get correct CPU Name in coreboot log. Signed-off-by: Musse Abdullahi <musse.abdullahi(a)intel.com> Change-Id: I8b939ccc8b05e3648c55f8f2a0a391cb08f04184 Signed-off-by: Musse Abdullahi <musse.abdullahi(a)intel.com> --- M src/include/cpu/intel/cpu_ids.h M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/meteorlake/bootblock/report_platform.c 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/74300/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74300 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b939ccc8b05e3648c55f8f2a0a391cb08f04184 Gerrit-Change-Number: 74300 Gerrit-PatchSet: 3 Gerrit-Owner: Musse Abdullahi <musse.abdullahi(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Musse Abdullahi <musse.abdullahi(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Musse Abdullahi <musse.abdullahi(a)intel.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: mb/google/brya: Enable CSE FPT Info config for Nissa
by Subrata Banik (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Derek Huang, Kyle Lin, Kapil Porwal, Dinesh Gehlot. Hello build bot (Jenkins), Tarun Tuli, Kangheui Won, Derek Huang, Kyle Lin, Kapil Porwal, Dinesh Gehlot, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74387 to look at the new patch set (#3). Change subject: mb/google/brya: Enable CSE FPT Info config for Nissa ...................................................................... mb/google/brya: Enable CSE FPT Info config for Nissa Google Brya variants like Nissa family selects `SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION` to store CSE FPT information. BUG=b:273661726 TEST=Able to build and boot google/marasov. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I234b5d272077de9a6f0a9ba69fa015cda7ebd56c --- M src/mainboard/google/brya/Kconfig 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/74387/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74387 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I234b5d272077de9a6f0a9ba69fa015cda7ebd56c Gerrit-Change-Number: 74387 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: drivers/intel/ish: Hook get ISH version into `.final`
by Subrata Banik (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Paul Menzel, Sridhar Siricilla. Subrata Banik has uploaded a new patch set (#16) to the change originally created by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/74209 ) Change subject: drivers/intel/ish: Hook get ISH version into `.final` ...................................................................... drivers/intel/ish: Hook get ISH version into `.final` This patch creates .final hook to call into get ISH version function if platform has required config (`SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION`) support. BUG=b:273661726 TEST=The ISHC version, 5.4.2.7779, was retrieved on the google/nivviks. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: Ib3f983d5de5b169474bcdb1e9e2934174a9dadf8 --- M src/drivers/intel/ish/ish.c 1 file changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/74209/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/74209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3f983d5de5b169474bcdb1e9e2934174a9dadf8 Gerrit-Change-Number: 74209 Gerrit-PatchSet: 16 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: {commonlib, soc/intel/cmn/cse}: Store CSE firmware version into CBMEM
by Subrata Banik (Code Review) 14 Apr '23

14 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Sridhar Siricilla. Subrata Banik has uploaded a new patch set (#15) to the change originally created by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/74256 ) Change subject: {commonlib, soc/intel/cmn/cse}: Store CSE firmware version into CBMEM ...................................................................... {commonlib, soc/intel/cmn/cse}: Store CSE firmware version into CBMEM The patch implements an API that stores the CSE firmware version in the CBMEM table. The API will be called from RAMSTAGE based on boot state machine depending upon CSE sync config options (`SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE` or `SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE`). BUG=b:273661726 TEST=Able to build and boot google/marasov. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8 --- M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/include/intelblocks/cse.h 3 files changed, 85 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/74256/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/74256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8 Gerrit-Change-Number: 74256 Gerrit-PatchSet: 15 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023