coreboot-gerrit April 2023

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[M] Change in coreboot[master]: vendorcode/mediatek/mt8192: Fix set but unused variables
by Yidi Lin (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Xi Chen, Arthur Heymans, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74544 ) Change subject: vendorcode/mediatek/mt8192: Fix set but unused variables ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74544 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45d51d53f991556cedd1cc45997d76fc828bceb5 Gerrit-Change-Number: 74544 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 02:36:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [Test] [Do not Merge] soc/intel/cse_lite: Backup PSR data during CSE ...
by build bot (Jenkins) (Code Review) 20 Apr '23

20 Apr '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74577 ) Change subject: [Test] [Do not Merge] soc/intel/cse_lite: Backup PSR data during CSE FW downgrade ...................................................................... Patch Set 1: (10 comments) File src/soc/intel/common/block/cse/cse_lite.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/cd1c1040_2213afd8 PS1, Line 137: #if 0 Consider removing the code enclosed by this #if 0 and its #endif Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/125e8562_754813ef PS1, Line 145: #if 0 Consider removing the code enclosed by this #if 0 and its #endif Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/642a124c_b70096fc PS1, Line 765: #if 1 Consider removing the #if 1 and its #endif Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/8da2ed45_17bd4bce PS1, Line 775: if (0x55 != cmos_read(PSR_BACKUP_STATUS_CMOS_OFFSET)) { Comparisons should place the constant on the right side of the test Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/606133ae_baed56c0 PS1, Line 777: if (CB_SUCCESS == cse_boot_to_rw(cse_bp_info)) { suspect code indent for conditional statements (24, 40) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/119d2597_4b20764d PS1, Line 777: if (CB_SUCCESS == cse_boot_to_rw(cse_bp_info)) { Comparisons should place the constant on the right side of the test Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/365af231_c6cba3ec PS1, Line 788: //} trailing whitespace Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/e462683c_2d37893d PS1, Line 875: printk(BIOS_DEBUG, "cse_lite: Add elog event \n"); unnecessary whitespace before a quoted newline File src/soc/intel/common/block/include/intelblocks/cse.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/d78d4a2b_e5a31dd5 PS1, Line 110: #if 1 Consider removing the #if 1 and its #endif Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174607): https://review.coreboot.org/c/coreboot/+/74577/comment/309acad5_610c6894 PS1, Line 113: { open brace '{' following enum go on the same line -- To view, visit https://review.coreboot.org/c/coreboot/+/74577 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I135d197b5df0a20def823fe615860b5ead4391f8 Gerrit-Change-Number: 74577 Gerrit-PatchSet: 1 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Apr 2023 02:29:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [Test] [Do not Merge] soc/intel/cse_lite: Backup PSR data during CSE ...
by Anil Kumar K (Code Review) 20 Apr '23

20 Apr '23

Anil Kumar K has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74577 ) Change subject: [Test] [Do not Merge] soc/intel/cse_lite: Backup PSR data during CSE FW downgrade ...................................................................... [Test] [Do not Merge] soc/intel/cse_lite: Backup PSR data during CSE FW downgrade Change-Id: I135d197b5df0a20def823fe615860b5ead4391f8 --- M src/commonlib/bsd/include/commonlib/bsd/elog.h M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/include/intelblocks/cse.h M util/cbfstool/eventlog.c 4 files changed, 107 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/74577/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h index 783557f..e32c46f 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/elog.h +++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h @@ -216,6 +216,7 @@ #define ELOG_ME_PATH_RECOVERY 0x03 #define ELOG_ME_PATH_DISABLED 0x04 #define ELOG_ME_PATH_FW_UPDATE 0x05 +#define ELOG_ME_PATH_PSR_BACKUP_FAILED 0x06 #define ELOG_TYPE_MANAGEMENT_ENGINE_EXT 0xa4 #define ELOG_ME_PHASE_ROM 0 @@ -225,6 +226,7 @@ #define ELOG_ME_PHASE_MODULE 4 #define ELOG_ME_PHASE_UNKNOWN 5 #define ELOG_ME_PHASE_HOST 6 + struct elog_event_data_me_extended { uint8_t current_working_state; uint8_t operation_state; diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 4cc9e19..8364ef8 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -11,10 +11,12 @@ #include <intelblocks/cse.h> #include <intelblocks/cse_layout.h> #include <intelblocks/spi.h> +#include <pc80/mc146818rtc.h> #include <security/vboot/misc.h> #include <security/vboot/vboot_common.h> #include <soc/intel/common/reset.h> #include <timestamp.h> +#include <elog.h> #define BPDT_HEADER_SZ sizeof(struct bpdt_header) #define BPDT_ENTRY_SZ sizeof(struct bpdt_entry) @@ -132,8 +134,39 @@ struct cse_bp_info bp_info; } __packed; +#if 0 +struct psr_heci_fw_downgrade_backup_res { + struct psr_heci_header header; + PSR_STATUS status; +} __packed; +#endif static const char * const cse_regions[] = {"RO", "RW"}; +#if 0 +static enum cb_err cse_backup_psr(struct psr_heci_fw_downgrade_backup_res *res) +{ + + struct psr_heci_fw_downgrade_backup_req { + struct psr_heci_header header; + } __packed; + + struct psr_heci_fw_downgrade_backup_req req = { + .header.command = PSR_HECI_FW_DOWNGRADE_BKUP, + }; + + printk(BIOS_DEBUG, "cse_lite: backup PSR command setting client address to 4\n"); + size_t resp_size = sizeof(struct psr_heci_fw_downgrade_backup_res); + + if (heci_send_receive(&req, sizeof(req), + res, &resp_size, 0x4)) { + printk(BIOS_ERR, "cse_lite: backup PSR command error\n"); + return CB_ERR; + } + + return CB_SUCCESS; +} +#endif + void cse_log_ro_write_protection_info(bool mfg_mode) { bool cse_ro_wp_en = is_spi_wp_cse_ro_en(); @@ -728,6 +761,35 @@ static enum cb_err cse_prep_for_rw_update(const struct cse_bp_info *cse_bp_info, enum cse_update_status status) { + +#if 1 + //static struct psr_heci_fw_downgrade_backup_res backup_psr_resp; + + /* In case of CSE downgrade, before clearing CSE data we need to take a backup of + * PSR data. + */ + + if (status == CSE_UPDATE_DOWNGRADE) { + printk(BIOS_DEBUG, "AKK: doing a firmware downgrade\n"); + /* switch to RW to issue backup PSR command */ + if (0x55 != cmos_read(PSR_BACKUP_STATUS_CMOS_OFFSET)) { + printk(BIOS_DEBUG, "AKK: boot CSE to RW\n"); + if (CB_SUCCESS == cse_boot_to_rw(cse_bp_info)) { + //if (CB_SUCCESS == cse_backup_psr(&backup_psr_resp)) { + printk(BIOS_DEBUG, "cse_lite: backup PSR command sent!\n"); + /* update CMOS address with backup status + * Backup done = 0x55 + * Backup pending = 0x33 + */ + printk(BIOS_DEBUG, "cse_lite: set PSR_BACKUP_STATUS_CMOS_OFFSET to 0x55!\n"); + cmos_write(0x55, PSR_BACKUP_STATUS_CMOS_OFFSET); + //if (PSR_STATUS_SUCCESS != backup_psr_resp.status) + // printk(BIOS_DEBUG, "cse_lite: backup PSR command returned %d\n", backup_psr_resp.status); + //} + } + } + } +#endif /* * To set CSE's operation mode to HMRFPO mode: * 1. Ensure CSE to boot from RO(BP1) @@ -741,6 +803,8 @@ printk(BIOS_ERR, "cse_lite: CSE data clear failed!\n"); return CB_SUCCESS; } + /* reset the CMOS address */ + cmos_write(0x22, PSR_BACKUP_STATUS_CMOS_OFFSET); } return cse_hmrfpo_enable(); @@ -808,6 +872,8 @@ return CSE_LITE_SKU_RW_ACCESS_ERROR; } + printk(BIOS_DEBUG, "cse_lite: Add elog event \n"); + elog_add_event_byte(ELOG_TYPE_MANAGEMENT_ENGINE, ELOG_ME_PATH_PSR_BACKUP_FAILED); status = cse_check_update_status(cse_bp_info, &target_rdev); if (status == CSE_UPDATE_NOT_REQUIRED) return CSE_NO_ERROR; diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 6b708ca..ec9ca28 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -76,6 +76,12 @@ /* Number of cse boot performance data */ #define NUM_CSE_BOOT_PERF_DATA 64 +/* PSR_HECI_FW_DOWNGRADE_BACKUP Command */ +#define PSR_HECI_FW_DOWNGRADE_BKUP 0x3 + +/* CMOS address to store PSR_HECI_FW_DOWNGRADE_BACKUP command send status */ +#define PSR_BACKUP_STATUS_CMOS_OFFSET 161 + /* HFSTS register offsets in PCI config space */ enum { PCI_ME_HFSTS1 = 0x40, @@ -101,6 +107,27 @@ uint8_t result; } __packed; +#if 1 +/* PSR HECI message status */ +typedef enum +{ + PSR_STATUS_SUCCESS, + PSR_STATUS_FEATURE_NOT_SUPPORTED, + PSR_STATUS_UPID_DISABLED, + PSR_STATUS_ACTION_NOT_ALLOWED, + PSR_STATUS_INVALID_INPUT_PARAMETER, + PSR_STATUS_INTERNAL_ERROR, + PSR_STATUS_NOT_ALLOWED_AFTER_EOP, +} PSR_STATUS; + +/* PSR HECI message header */ +struct psr_heci_header { + uint8_t command; + uint8_t reserved; + uint16_t length; +} __packed; +#endif + /* CSE FW Version */ struct fw_version { uint16_t major; diff --git a/util/cbfstool/eventlog.c b/util/cbfstool/eventlog.c index 93590a1..079dc9d 100644 --- a/util/cbfstool/eventlog.c +++ b/util/cbfstool/eventlog.c @@ -179,6 +179,7 @@ return; } + printf("AKK print eventlog type\n"); eventlog_printf("%s", type); } @@ -366,6 +367,7 @@ {ELOG_ME_PATH_RECOVERY, "Recovery"}, {ELOG_ME_PATH_DISABLED, "Disabled"}, {ELOG_ME_PATH_FW_UPDATE, "Firmware Update"}, + {ELOG_ME_PATH_PSR_BACKUP_FAILED, "PSR backup command Error"}, {0, NULL}, }; static const struct valstr coreboot_post_codes[] = { @@ -564,6 +566,7 @@ case ELOG_TYPE_MANAGEMENT_ENGINE: { const uint8_t *path = event_get_data(event); eventlog_printf("%s", val2str(*path, me_path_types)); + printf("AKK %d\n", *path); break; } case ELOG_TYPE_MEM_CACHE_UPDATE: { -- To view, visit https://review.coreboot.org/c/coreboot/+/74577 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I135d197b5df0a20def823fe615860b5ead4391f8 Gerrit-Change-Number: 74577 Gerrit-PatchSet: 1 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Add _DSD object for wifi
by Frank Chu (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli. Frank Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74499 ) Change subject: mb/google/brya/var/marasov: Add _DSD object for wifi ...................................................................... Patch Set 5: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74499/comment/84b02be5_6260b306 PS3, Line 10: makes sense to have a unified name across different device drivers. > please fix the warp line. Done Patchset: PS5: > tips for comment, use the website UI you can easily do the align. ok, thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/74499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e Gerrit-Change-Number: 74499 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 02:28:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: vendorcode/mediatek/mt8192: Fix set but unused variables
by Yidi Lin (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Xi Chen, Arthur Heymans, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74543 ) Change subject: vendorcode/mediatek/mt8192: Fix set but unused variables ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic05a9819764c03184b54c4fc58dbe325fddeae10 Gerrit-Change-Number: 74543 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 02:23:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Add _DSD object for wifi
by Eric Lai (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74499 ) Change subject: mb/google/brya/var/marasov: Add _DSD object for wifi ...................................................................... Patch Set 5: Code-Review+2 (1 comment) Patchset: PS5: tips for comment, use the website UI you can easily do the align. -- To view, visit https://review.coreboot.org/c/coreboot/+/74499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e Gerrit-Change-Number: 74499 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 02:11:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Add _DSD object for wifi
by Frank Chu (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74499 to look at the new patch set (#5). Change subject: mb/google/brya/var/marasov: Add _DSD object for wifi ...................................................................... mb/google/brya/var/marasov: Add _DSD object for wifi `is_untrusted` is eventually ended up by adding DMA property _DSD which is similar to what `add_acpi_dma_property` does for WWAN drivers, hence it makes sense to have a unified name across different device drivers. BUG=b:278310435 BRANCH=firmware-brya-14505.B TEST=Verified that the _DSD object is still present in the SSDT. Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e --- M src/mainboard/google/brya/variants/marasov/overridetree.cb 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/74499/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/74499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e Gerrit-Change-Number: 74499 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Add _DSD object for wifi
by Frank Chu (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74499 to look at the new patch set (#4). Change subject: mb/google/brya/var/marasov: Add _DSD object for wifi ...................................................................... mb/google/brya/var/marasov: Add _DSD object for wifi `is_untrusted` is eventually ended up by adding DMA property _DSD which is similar to what `add_acpi_dma_property` does for WWAN drivers, hence it makes sense to have a unified name across different device drivers. BUG=b:278310435 BRANCH=firmware-brya-14505.B TEST=Verified that the _DSD object is still present in the SSDT. Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e --- M src/mainboard/google/brya/variants/marasov/overridetree.cb 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/74499/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/74499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e Gerrit-Change-Number: 74499 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: lib: Perform early initialization of FW config in ramstage
by Eric Lai (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kangheui Won, Ivy Jian. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74530 ) Change subject: lib: Perform early initialization of FW config in ramstage ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > I was thinking about moving is_ish_enabled into mb code, so they can do whatever needed (probably […] I mean do we have the flag like DEVTREE_EARLY to identify the BS_PRE_DEVICE, than we can do the same thing. https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… -- To view, visit https://review.coreboot.org/c/coreboot/+/74530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If36e7c7d2edc74a2b7fcc192690af73651e87183 Gerrit-Change-Number: 74530 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 01:56:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kangheui Won <khwon(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Add _DSD object for wifi
by Eric Lai (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74499 ) Change subject: mb/google/brya/var/marasov: Add _DSD object for wifi ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74499/comment/1dc54d66_12bf372d PS3, Line 10: makes sense to have a unified name across different device drivers. please fix the warp line. -- To view, visit https://review.coreboot.org/c/coreboot/+/74499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a69a47e67f6acaad5a5d1b67e437c5a41bebf3e Gerrit-Change-Number: 74499 Gerrit-PatchSet: 3 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 01:51:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2023