coreboot-gerrit April 2023

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[S] Change in coreboot[master]: util/sconfig/main: Add variant/gpio.h to static.c
by Jon Murphy (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Martin L Roth. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74594 ) Change subject: util/sconfig/main: Add variant/gpio.h to static.c ...................................................................... Patch Set 2: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74594 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia16211ef73fa9c6221f98c36879dd740631b8ad2 Gerrit-Change-Number: 74594 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 05:47:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/cmn/cse: Refactor ramstage cse fw sync() function
by build bot (Jenkins) (Code Review) 20 Apr '23

20 Apr '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74581 ) Change subject: soc/intel/cmn/cse: Refactor ramstage_cse_fw_sync() function ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174624): https://review.coreboot.org/c/coreboot/+/74581/comment/4e459ee2_4328fb7f PS1, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/74581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c7a91c81d51dbf6742e12c58a24b9f52fff5630 Gerrit-Change-Number: 74581 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Apr 2023 05:43:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: sociintel/(adl, cmn, mtl): Refactor cse_fw_sync() function
by Subrata Banik (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74582 ) Change subject: sociintel/(adl, cmn, mtl): Refactor cse_fw_sync() function ...................................................................... sociintel/(adl, cmn, mtl): Refactor cse_fw_sync() function This patch refactors cse_fw_sync() function to include timestamp associated with the CSE sync operation.This effort will ensure the SoC code just makes a call into the cse_fw_sync() without bothering about adding timestamp entries. TEST=Able to build and boot google/marasov. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ib5e8fc2b8c3b605103f7b1238df5a8405e363f83 --- M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/meteorlake/romstage/romstage.c 3 files changed, 28 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/74582/1 diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index a3273e6..740a4a2 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -180,11 +180,8 @@ if (!CONFIG(INTEL_TXT)) disable_intel_txt(); - if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && !s3wake) { - timestamp_add_now(TS_CSE_FW_SYNC_START); + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && !s3wake) cse_fw_sync(); - timestamp_add_now(TS_CSE_FW_SYNC_END); - } /* Program to Disable UFS Controllers */ if (!is_devfn_enabled(PCH_DEVFN_UFS) && diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 1e2a052..14a7381 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1077,7 +1077,7 @@ return handle_cse_sub_part_fw_update_rv(rv); } -void cse_fw_sync(void) +static void do_cse_fw_sync(void) { static struct get_bp_info_rsp cse_bp_info; @@ -1152,6 +1152,13 @@ } } +void cse_fw_sync(void) +{ + timestamp_add_now(TS_CSE_FW_SYNC_START); + do_cse_fw_sync(); + timestamp_add_now(TS_CSE_FW_SYNC_END); +} + static enum cb_err send_get_fpt_partition_info_cmd(enum fpt_partition_id id, struct fw_version_resp *resp) { @@ -1214,11 +1221,8 @@ if (acpi_get_sleep_type() == ACPI_S3) return; - if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)) { - timestamp_add_now(TS_CSE_FW_SYNC_START); + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)) cse_fw_sync(); - timestamp_add_now(TS_CSE_FW_SYNC_END); - } } BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, ramstage_cse_fw_sync, NULL); diff --git a/src/soc/intel/meteorlake/romstage/romstage.c b/src/soc/intel/meteorlake/romstage/romstage.c index ebb440c..b5351de 100644 --- a/src/soc/intel/meteorlake/romstage/romstage.c +++ b/src/soc/intel/meteorlake/romstage/romstage.c @@ -128,11 +128,8 @@ /* Initialize HECI interface */ cse_init(HECI1_BASE_ADDRESS); - if (!s3wake && CONFIG(SOC_INTEL_CSE_LITE_SKU)) { - timestamp_add_now(TS_CSE_FW_SYNC_START); + if (!s3wake && CONFIG(SOC_INTEL_CSE_LITE_SKU)) cse_fw_sync(); - timestamp_add_now(TS_CSE_FW_SYNC_END); - } /* Update coreboot timestamp table with CSE timestamps */ if (CONFIG(SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY)) -- To view, visit https://review.coreboot.org/c/coreboot/+/74582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5e8fc2b8c3b605103f7b1238df5a8405e363f83 Gerrit-Change-Number: 74582 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/cmn/cse: Refactor ramstage cse fw sync() function
by Subrata Banik (Code Review) 20 Apr '23

20 Apr '23

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74581 ) Change subject: soc/intel/cmn/cse: Refactor ramstage_cse_fw_sync() function ...................................................................... soc/intel/cmn/cse: Refactor ramstage_cse_fw_sync() function This patch refactors sleep type check inside ramstage_cse_fw_sync() to avoid additional logic while performing cse_fw_sync() operation. TEST=Able to build and boot google/marasov. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I7c7a91c81d51dbf6742e12c58a24b9f52fff5630 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 18 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/74581/1 diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 4cc9e19..1e2a052 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1211,10 +1211,10 @@ static void ramstage_cse_fw_sync(void *unused) { - bool s3wake; - s3wake = acpi_get_sleep_type() == ACPI_S3; + if (acpi_get_sleep_type() == ACPI_S3) + return; - if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) && !s3wake) { + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)) { timestamp_add_now(TS_CSE_FW_SYNC_START); cse_fw_sync(); timestamp_add_now(TS_CSE_FW_SYNC_END); -- To view, visit https://review.coreboot.org/c/coreboot/+/74581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c7a91c81d51dbf6742e12c58a24b9f52fff5630 Gerrit-Change-Number: 74581 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/mtl: [TEST] Read R_DCI_PCR_ECTRL
by Sridhar Siricilla (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Hello Tarun Tuli, Subrata Banik, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74578 to look at the new patch set (#2). Change subject: soc/intel/mtl: [TEST] Read R_DCI_PCR_ECTRL ...................................................................... soc/intel/mtl: [TEST] Read R_DCI_PCR_ECTRL Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: Ie2f52acfadc44307b91a7528e5d796ddeef5ed1d --- M src/soc/intel/meteorlake/bootblock/soc_die.c M src/soc/intel/meteorlake/include/soc/pcr_ids.h 2 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/74578/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74578 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2f52acfadc44307b91a7528e5d796ddeef5ed1d Gerrit-Change-Number: 74578 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: mb/google/skyrim: Add named GPIO's
by Jon Murphy (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Raul Rangel, Jason Nien, Jon Murphy, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer. Hello build bot (Jenkins), Raul Rangel, Jason Nien, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74592 to look at the new patch set (#2). Change subject: mb/google/skyrim: Add named GPIO's ...................................................................... mb/google/skyrim: Add named GPIO's Add named GPIO's to help prevent confusion in GPIO management BUG=b:278968729 TEST=builds Change-Id: If907478442ea7acb80b2e413926d173d188ce340 Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M src/mainboard/google/skyrim/chromeos.c M src/mainboard/google/skyrim/ec.c M src/mainboard/google/skyrim/port_descriptors.c M src/mainboard/google/skyrim/variants/baseboard/gpio.c M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/skyrim/variants/baseboard/smihandler.c M src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c A src/mainboard/google/skyrim/variants/crystaldrift/include/variant/gpio.h M src/mainboard/google/skyrim/variants/frostflow/gpio.c A src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h M src/mainboard/google/skyrim/variants/markarth/gpio.c A src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h M src/mainboard/google/skyrim/variants/markarth/port_descriptors.c A src/mainboard/google/skyrim/variants/skyrim/include/variant/gpio.h M src/mainboard/google/skyrim/variants/winterhold/gpio.c A src/mainboard/google/skyrim/variants/winterhold/include/variant/gpio.h M src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c M src/mainboard/google/skyrim/verstage.c 20 files changed, 229 insertions(+), 219 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/74592/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If907478442ea7acb80b2e413926d173d188ce340 Gerrit-Change-Number: 74592 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: util/sconfig/main: Add variant/gpio.h to static.c
by Jon Murphy (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Martin L Roth. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74594 ) Change subject: util/sconfig/main: Add variant/gpio.h to static.c ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I don't think this is the right way to do this, but this allowed me to access the variant/gpio.h definitions in the devicetree files and use named constants. How should I actually be doing this? -- To view, visit https://review.coreboot.org/c/coreboot/+/74594 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia16211ef73fa9c6221f98c36879dd740631b8ad2 Gerrit-Change-Number: 74594 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 05:30:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/google/skyrim: Add named GPIO's
by build bot (Jenkins) (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Jason Nien, Martin Roth. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74592 ) Change subject: mb/google/skyrim: Add named GPIO's ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174613): https://review.coreboot.org/c/coreboot/+/74592/comment/05b8a6ba_b9ad17a4 PS1, Line 9: /* WWAN_RST(GPIO_42) => Unused */ adding a line without newline at end of file File src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174613): https://review.coreboot.org/c/coreboot/+/74592/comment/ac0b51b9_084b53a1 PS1, Line 10: /* WWAN_RST(GPIO_42) => Unused */ adding a line without newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/74592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If907478442ea7acb80b2e413926d173d188ce340 Gerrit-Change-Number: 74592 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Thu, 20 Apr 2023 05:26:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common: Update GPIO macros
by build bot (Jenkins) (Code Review) 20 Apr '23

20 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74591 ) Change subject: soc/amd/common: Update GPIO macros ...................................................................... Patch Set 1: (3 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174612): https://review.coreboot.org/c/coreboot/+/74591/comment/39eef313_d7b650ac PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174612): https://review.coreboot.org/c/coreboot/+/74591/comment/4d23a79d_f421b454 PS1, Line 11: to GPIO_NN names for use in their own development. Enabling projects to Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174612): https://review.coreboot.org/c/coreboot/+/74591/comment/50558049_981a3a29 PS1, Line 12: rename their own GPIOs to nets will hopefully make the code more readable Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/74591 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I918d659eecf2076ed9089218177874ed2c9023b3 Gerrit-Change-Number: 74591 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 20 Apr 2023 05:26:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/myst: Update GPIO names
by Jon Murphy (Code Review) 20 Apr '23

20 Apr '23

Jon Murphy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74596 ) Change subject: mb/google/myst: Update GPIO names ...................................................................... mb/google/myst: Update GPIO names Update GPIO names in devicetree files to use the more descriptive versions in variant/gpio.h. This provides more clarity and insight into what GPIOs actually mean on the design. BUG=b:278969100 TEST=builds Signed-off-by: Jon Murphy <jpmurphy(a)google.com> Change-Id: I2ad4618eb6d897807d26c9bf8f2a090b5c9020c2 --- M src/mainboard/google/myst/variants/baseboard/devicetree.cb 1 file changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/74596/1 diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb index fbc9e93..7cd9e50 100644 --- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb @@ -84,7 +84,7 @@ register "desc" = ""Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "has_power_resource" = "true" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_154)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(BT_DISABLE)" register "enable_delay_ms" = "500" register "enable_off_delay_ms" = "200" register "use_gpio_for_status" = "true" -- To view, visit https://review.coreboot.org/c/coreboot/+/74596 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ad4618eb6d897807d26c9bf8f2a090b5c9020c2 Gerrit-Change-Number: 74596 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2023