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Change subject: nb/amd/pi/00730F01/northbridge: use get_top_of_mem_[below,above]_4gb
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Change subject: include/cpu/amd/mtrr: return uint32_t from get_top_of_mem_below_4gb
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Change subject: include/cpu/amd/mtrr: rename functions to get top of memory regions
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Change subject: lib/version: Move board identification strings
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Change subject: drivers/ipmi: Replace <build.h> with <version.h>
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Change subject: soc/intel/braswell: Replace <build.h> with <version.h>
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Change subject: Drop unused include <version.h>
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Change subject: mb/google/skyrim: Add named GPIO's
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Patch Set 2:
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Commit Message:
https://review.coreboot.org/c/coreboot/+/74592/comment/b7e6d124_ee7b5306
PS2, Line 9: Add named GPIO's to help prevent confusion in GPIO management
> I'm not sure I agree with making this type of change for Skyrim this late in the program, since we h […]
We can do a TIMELESS build and compare the binaries. If they are binary equivalent then the change should be fine.
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Change subject: sb,soc/intel/common: Add common get_pmbase()
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Patch Set 10:
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File src/southbridge/intel/common/pmbase.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174741):
https://review.coreboot.org/c/coreboot/+/70048/comment/9ea17168_88bed28b
PS10, Line 19: !CONFIG(SOC_INTEL_BRASWELL)
please, no spaces at the start of a line
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