coreboot-gerrit April 2023

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[L] Change in coreboot[master]: mb/google/skyrim: Add mainboard chip.h
by Karthik Ramasubramanian (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Jason Nien, Jon Murphy, Martin Roth, Tim Van Patten, Mark Hasemeyer. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74609 ) Change subject: mb/google/skyrim: Add mainboard chip.h ...................................................................... Patch Set 8: (2 comments) File src/mainboard/google/skyrim/mainboard.c: https://review.coreboot.org/c/coreboot/+/74609/comment/5aac48fa_d63ef86d PS8, Line 109: mainboard_ops > Hrmm, if you just add a chip.h as a sibling does it work? […] I think sconfig expects you to introduce chip driver for it include the header. File src/mainboard/google/skyrim/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/74609/comment/f31865a1_13168ca7 PS8, Line 2: chip mainboard/google/skyrim/variants/baseboard > If you are concerned about updating all the mainboards with devicetree. […] I have sent an RFC CL to introduce a include keyword in devicetree grammar - CB: 74736 That allows you to include header file in the devicetree such that it gets included in the parseed devicetree file. With that, I think we should be able to refer to netnames in the devicetree. Please share your thoughts and also use it if it helps with the effort here. -- To view, visit https://review.coreboot.org/c/coreboot/+/74609 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic609d294135e2982064cb1c1fe6eac98dc24086f Gerrit-Change-Number: 74609 Gerrit-PatchSet: 8 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 20:28:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: RFC: util/sconfig: Add include keyword
by Karthik Ramasubramanian (Code Review) 24 Apr '23

24 Apr '23

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74736 ) Change subject: RFC: util/sconfig: Add include keyword ...................................................................... RFC: util/sconfig: Add include keyword Include keyword can help with including mainboard specific headers to the devicetree. One of the potential use-cases is for the hardware configurations in devicetree to refer to net names instead of cryptic GPIO numbers. This helps to improve the code readability. BUG=None TEST=Build Skyrim BIOS with mainboard specific headers included. Change-Id: I34893a703cc4f588dda3736e858429bf765059e6 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.h M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 7 files changed, 417 insertions(+), 298 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/74736/1 diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped index 3fc7ddc..cc9fde6 100644 --- a/util/sconfig/lex.yy.c_shipped +++ b/util/sconfig/lex.yy.c_shipped @@ -349,8 +349,8 @@ (yy_hold_char) = *yy_cp; \ *yy_cp = '\0'; \ (yy_c_buf_p) = yy_cp; -#define YY_NUM_RULES 48 -#define YY_END_OF_BUFFER 49 +#define YY_NUM_RULES 49 +#define YY_END_OF_BUFFER 50 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -358,30 +358,31 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static const flex_int16_t yy_accept[197] = +static const flex_int16_t yy_accept[202] = { 0, - 0, 0, 49, 47, 1, 3, 47, 47, 47, 43, - 43, 40, 44, 44, 44, 44, 44, 44, 47, 47, - 47, 47, 47, 47, 47, 47, 47, 41, 47, 1, - 3, 47, 0, 47, 47, 0, 2, 43, 44, 47, - 47, 10, 47, 47, 44, 47, 47, 47, 47, 47, - 47, 47, 47, 47, 47, 34, 47, 47, 47, 47, - 47, 16, 47, 47, 47, 47, 47, 47, 47, 47, - 47, 46, 46, 47, 0, 42, 47, 47, 24, 47, - 47, 33, 37, 47, 47, 47, 47, 47, 22, 47, - 32, 47, 47, 47, 17, 7, 47, 20, 21, 47, + 0, 0, 50, 48, 1, 3, 48, 48, 48, 44, + 44, 41, 45, 45, 45, 45, 45, 45, 48, 48, + 48, 48, 48, 48, 48, 48, 48, 42, 48, 1, + 3, 48, 0, 48, 48, 0, 2, 44, 45, 48, + 48, 10, 48, 48, 45, 48, 48, 48, 48, 48, + 48, 48, 48, 48, 48, 34, 48, 48, 48, 48, + 48, 16, 48, 48, 48, 48, 48, 48, 48, 48, + 48, 47, 47, 48, 0, 43, 48, 48, 24, 48, + 48, 33, 38, 48, 48, 48, 48, 48, 22, 48, + 48, 32, 48, 48, 48, 17, 7, 48, 20, 21, - 9, 47, 47, 28, 47, 29, 8, 47, 0, 47, - 4, 47, 47, 47, 47, 47, 47, 30, 47, 47, - 47, 31, 27, 47, 47, 47, 47, 47, 45, 45, - 6, 47, 47, 47, 13, 47, 47, 47, 47, 47, - 47, 15, 47, 47, 47, 47, 5, 25, 47, 47, - 18, 47, 47, 14, 47, 47, 47, 47, 47, 26, - 35, 47, 47, 47, 47, 47, 47, 47, 11, 47, - 47, 47, 47, 12, 19, 47, 47, 47, 47, 47, - 47, 47, 23, 47, 47, 36, 47, 47, 47, 47, - 47, 47, 39, 47, 38, 0 + 48, 9, 48, 48, 28, 48, 29, 8, 48, 0, + 48, 4, 48, 48, 48, 48, 48, 48, 30, 48, + 48, 48, 48, 31, 27, 48, 48, 48, 48, 48, + 46, 46, 6, 48, 48, 48, 13, 48, 48, 48, + 48, 48, 48, 48, 15, 48, 48, 48, 48, 5, + 25, 48, 48, 18, 48, 48, 48, 14, 48, 48, + 48, 48, 48, 26, 35, 36, 48, 48, 48, 48, + 48, 48, 48, 11, 48, 48, 48, 48, 12, 19, + 48, 48, 48, 48, 48, 48, 48, 23, 48, 48, + 37, 48, 48, 48, 48, 48, 48, 40, 48, 39, + 0 } ; static const YY_CHAR yy_ec[256] = @@ -424,61 +425,61 @@ 1, 1, 1, 1, 1, 1 } ; -static const flex_int16_t yy_base[204] = +static const flex_int16_t yy_base[209] = { 0, - 0, 0, 265, 0, 262, 266, 260, 35, 39, 36, - 228, 0, 48, 51, 55, 75, 61, 58, 22, 240, - 62, 81, 75, 74, 243, 82, 230, 0, 0, 256, - 266, 104, 252, 109, 74, 253, 266, 0, 108, 111, - 234, 0, 233, 222, 123, 229, 224, 234, 232, 236, - 223, 225, 229, 229, 223, 0, 215, 217, 219, 218, - 220, 0, 66, 216, 210, 210, 115, 220, 212, 218, - 121, 0, 266, 134, 226, 0, 217, 203, 216, 206, - 213, 0, 0, 203, 209, 206, 197, 205, 0, 203, - 0, 203, 193, 192, 0, 0, 195, 0, 0, 201, + 0, 0, 270, 0, 267, 271, 265, 35, 39, 36, + 233, 0, 48, 51, 55, 75, 61, 58, 22, 245, + 62, 81, 75, 74, 248, 82, 235, 0, 0, 261, + 271, 104, 257, 109, 74, 258, 271, 0, 108, 111, + 239, 0, 238, 227, 123, 234, 229, 239, 237, 241, + 228, 230, 234, 234, 118, 0, 221, 223, 225, 224, + 226, 0, 66, 222, 216, 216, 116, 226, 218, 224, + 122, 0, 271, 138, 232, 0, 223, 209, 222, 212, + 219, 0, 0, 209, 215, 212, 203, 211, 0, 204, + 208, 0, 208, 198, 197, 0, 0, 200, 0, 0, - 0, 193, 192, 0, 183, 0, 0, 206, 205, 180, - 0, 193, 192, 185, 189, 179, 175, 0, 185, 173, - 187, 0, 0, 174, 181, 168, 171, 160, 0, 266, - 0, 172, 176, 168, 0, 167, 169, 165, 167, 157, - 162, 0, 155, 155, 154, 151, 0, 0, 163, 165, - 0, 149, 153, 0, 160, 164, 145, 145, 152, 0, - 0, 144, 143, 45, 153, 139, 149, 119, 0, 136, - 130, 128, 133, 0, 0, 117, 123, 126, 118, 133, - 114, 127, 0, 121, 129, 0, 116, 107, 103, 93, - 63, 49, 0, 57, 0, 266, 45, 155, 157, 159, + 206, 0, 198, 197, 0, 188, 0, 0, 211, 210, + 185, 0, 198, 197, 190, 194, 184, 180, 0, 190, + 175, 177, 191, 0, 0, 178, 185, 172, 175, 164, + 0, 271, 0, 176, 180, 172, 0, 171, 173, 169, + 176, 170, 160, 165, 0, 158, 158, 157, 154, 0, + 0, 166, 168, 0, 165, 151, 155, 0, 162, 166, + 147, 147, 154, 0, 0, 0, 146, 145, 45, 155, + 141, 151, 134, 0, 151, 132, 130, 135, 0, 0, + 119, 125, 128, 120, 135, 116, 129, 0, 123, 130, + 0, 113, 107, 103, 93, 63, 49, 0, 57, 0, - 161, 163, 165 + 271, 45, 155, 157, 159, 161, 163, 165 } ; -static const flex_int16_t yy_def[204] = +static const flex_int16_t yy_def[209] = { 0, - 196, 1, 196, 197, 196, 196, 197, 198, 199, 197, - 10, 197, 10, 10, 10, 10, 10, 10, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 196, - 196, 198, 200, 201, 199, 202, 196, 10, 10, 10, - 197, 197, 197, 197, 10, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 196, 201, 203, 40, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, + 201, 1, 201, 202, 201, 201, 202, 203, 204, 202, + 10, 202, 10, 10, 10, 10, 10, 10, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 201, + 201, 203, 205, 206, 204, 207, 201, 10, 10, 10, + 202, 202, 202, 202, 10, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 201, 206, 208, 40, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, - 197, 197, 197, 197, 197, 197, 197, 197, 196, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 196, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 197, 197, 197, 197, 197, - 197, 197, 197, 197, 197, 0, 196, 196, 196, 196, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 201, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 201, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, + 202, 202, 202, 202, 202, 202, 202, 202, 202, 202, - 196, 196, 196 + 0, 201, 201, 201, 201, 201, 201, 201 } ; -static const flex_int16_t yy_nxt[303] = +static const flex_int16_t yy_nxt[308] = { 0, 4, 5, 6, 7, 8, 9, 10, 11, 10, 12, 13, 4, 14, 13, 15, 16, 17, 18, 19, 20, @@ -486,72 +487,72 @@ 27, 4, 4, 4, 4, 28, 33, 33, 51, 34, 36, 37, 38, 38, 38, 29, 39, 52, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, - 170, 39, 39, 39, 39, 39, 39, 39, 39, 39, - 54, 195, 41, 171, 43, 36, 37, 194, 49, 42, - 44, 39, 39, 39, 48, 55, 56, 193, 64, 57, - 50, 45, 61, 58, 96, 97, 59, 65, 62, 46, + 175, 39, 39, 39, 39, 39, 39, 39, 39, 39, + 54, 200, 41, 176, 43, 36, 37, 199, 49, 42, + 44, 39, 39, 39, 48, 55, 56, 198, 64, 57, + 50, 45, 61, 58, 97, 98, 59, 65, 62, 46, - 63, 66, 47, 60, 68, 33, 33, 69, 72, 192, + 63, 66, 47, 60, 68, 33, 33, 69, 72, 197, 75, 75, 70, 29, 39, 39, 39, 76, 76, 76, - 191, 76, 190, 76, 76, 76, 76, 76, 76, 39, - 39, 39, 101, 102, 106, 75, 75, 107, 108, 189, - 188, 187, 186, 185, 184, 183, 182, 181, 180, 179, - 178, 177, 176, 175, 80, 32, 32, 35, 35, 33, - 33, 74, 74, 36, 36, 75, 75, 174, 173, 172, - 169, 168, 167, 166, 165, 164, 163, 162, 161, 160, - 159, 158, 157, 156, 155, 154, 153, 152, 151, 150, - 149, 148, 147, 146, 145, 144, 143, 142, 141, 140, + 196, 76, 195, 76, 76, 76, 76, 76, 76, 39, + 39, 39, 90, 102, 103, 107, 194, 91, 108, 75, + 75, 193, 109, 192, 191, 190, 189, 188, 187, 186, + 185, 184, 183, 182, 80, 32, 32, 35, 35, 33, + 33, 74, 74, 36, 36, 75, 75, 181, 180, 179, + 178, 177, 174, 173, 172, 171, 170, 169, 168, 167, + 166, 165, 164, 163, 162, 161, 160, 159, 158, 157, + 156, 155, 154, 153, 152, 151, 150, 149, 148, 147, - 139, 138, 137, 136, 135, 134, 133, 132, 131, 130, - 129, 128, 127, 126, 125, 124, 123, 122, 121, 120, - 119, 118, 117, 116, 115, 114, 113, 112, 111, 110, - 109, 105, 104, 103, 100, 99, 98, 95, 94, 93, - 92, 91, 90, 89, 88, 87, 86, 85, 84, 83, - 82, 81, 79, 78, 77, 37, 73, 30, 71, 67, - 53, 40, 31, 30, 196, 3, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, + 146, 145, 144, 143, 142, 141, 140, 139, 138, 137, + 136, 135, 134, 133, 132, 131, 130, 129, 128, 127, + 126, 125, 124, 123, 122, 121, 120, 119, 118, 117, + 116, 115, 114, 113, 112, 111, 110, 106, 105, 104, + 101, 100, 99, 96, 95, 94, 93, 92, 89, 88, + 87, 86, 85, 84, 83, 82, 81, 79, 78, 77, + 37, 73, 30, 71, 67, 53, 40, 31, 30, 201, + 3, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, - 196, 196 + 201, 201, 201, 201, 201, 201, 201 } ; -static const flex_int16_t yy_chk[303] = +static const flex_int16_t yy_chk[308] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 8, 8, 19, 8, - 9, 9, 10, 10, 10, 197, 10, 19, 10, 10, + 9, 9, 10, 10, 10, 202, 10, 19, 10, 10, 10, 10, 10, 10, 13, 13, 13, 14, 14, 14, - 164, 15, 15, 15, 18, 18, 18, 17, 17, 17, - 21, 194, 14, 164, 15, 35, 35, 192, 18, 14, - 15, 16, 16, 16, 17, 21, 21, 191, 24, 21, + 169, 15, 15, 15, 18, 18, 18, 17, 17, 17, + 21, 199, 14, 169, 15, 35, 35, 197, 18, 14, + 15, 16, 16, 16, 17, 21, 21, 196, 24, 21, 18, 16, 23, 22, 63, 63, 22, 24, 23, 16, - 23, 24, 16, 22, 26, 32, 32, 26, 32, 190, + 23, 24, 16, 22, 26, 32, 32, 26, 32, 195, 34, 34, 26, 34, 39, 39, 39, 40, 40, 40, - 189, 40, 188, 40, 40, 40, 40, 40, 40, 45, - 45, 45, 67, 67, 71, 74, 74, 71, 74, 187, - 185, 184, 182, 181, 180, 179, 178, 177, 176, 173, - 172, 171, 170, 168, 45, 198, 198, 199, 199, 200, - 200, 201, 201, 202, 202, 203, 203, 167, 166, 165, - 163, 162, 159, 158, 157, 156, 155, 153, 152, 150, - 149, 146, 145, 144, 143, 141, 140, 139, 138, 137, - 136, 134, 133, 132, 128, 127, 126, 125, 124, 121, + 194, 40, 193, 40, 40, 40, 40, 40, 40, 45, + 45, 45, 55, 67, 67, 71, 192, 55, 71, 74, + 74, 190, 74, 189, 187, 186, 185, 184, 183, 182, + 181, 178, 177, 176, 45, 203, 203, 204, 204, 205, + 205, 206, 206, 207, 207, 208, 208, 175, 173, 172, + 171, 170, 168, 167, 163, 162, 161, 160, 159, 157, + 156, 155, 153, 152, 149, 148, 147, 146, 144, 143, + 142, 141, 140, 139, 138, 136, 135, 134, 130, 129, - 120, 119, 117, 116, 115, 114, 113, 112, 110, 109, - 108, 105, 103, 102, 100, 97, 94, 93, 92, 90, - 88, 87, 86, 85, 84, 81, 80, 79, 78, 77, - 75, 70, 69, 68, 66, 65, 64, 61, 60, 59, - 58, 57, 55, 54, 53, 52, 51, 50, 49, 48, - 47, 46, 44, 43, 41, 36, 33, 30, 27, 25, - 20, 11, 7, 5, 3, 196, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, - 196, 196, 196, 196, 196, 196, 196, 196, 196, 196, + 128, 127, 126, 123, 122, 121, 120, 118, 117, 116, + 115, 114, 113, 111, 110, 109, 106, 104, 103, 101, + 98, 95, 94, 93, 91, 90, 88, 87, 86, 85, + 84, 81, 80, 79, 78, 77, 75, 70, 69, 68, + 66, 65, 64, 61, 60, 59, 58, 57, 54, 53, + 52, 51, 50, 49, 48, 47, 46, 44, 43, 41, + 36, 33, 30, 27, 25, 20, 11, 7, 5, 3, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, + 201, 201, 201, 201, 201, 201, 201, 201, 201, 201, - 196, 196 + 201, 201, 201, 201, 201, 201, 201 } ; static yy_state_type yy_last_accepting_state; @@ -816,13 +817,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 197 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_base[yy_current_state] != 266 ); + while ( yy_base[yy_current_state] != 271 ); yy_find_action: yy_act = yy_accept[yy_current_state]; @@ -986,35 +987,35 @@ YY_BREAK case 35: YY_RULE_SETUP -{return(INHERIT);} +{return(INCLUDE);} YY_BREAK case 36: YY_RULE_SETUP -{return(SUBSYSTEMID);} +{return(INHERIT);} YY_BREAK case 37: YY_RULE_SETUP -{return(END);} +{return(SUBSYSTEMID);} YY_BREAK case 38: YY_RULE_SETUP -{return(SLOT_DESC);} +{return(END);} YY_BREAK case 39: YY_RULE_SETUP -{return(SMBIOS_DEV_INFO);} +{return(SLOT_DESC);} YY_BREAK case 40: YY_RULE_SETUP -{return(EQUALS);} +{return(SMBIOS_DEV_INFO);} YY_BREAK case 41: YY_RULE_SETUP -{return(PIPE);} +{return(EQUALS);} YY_BREAK case 42: YY_RULE_SETUP -{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} +{return(PIPE);} YY_BREAK case 43: YY_RULE_SETUP @@ -1025,9 +1026,8 @@ {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 45: -/* rule 45 can match eol */ YY_RULE_SETUP -{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} +{yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(NUMBER);} YY_BREAK case 46: /* rule 46 can match eol */ @@ -1035,10 +1035,15 @@ {yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} YY_BREAK case 47: +/* rule 47 can match eol */ +YY_RULE_SETUP +{yylval.string = malloc(yyleng-1); strncpy(yylval.string, yytext+1, yyleng-2); yylval.string[yyleng-2]='\0'; return(STRING);} + YY_BREAK +case 48: YY_RULE_SETUP {yylval.string = malloc(yyleng+1); strncpy(yylval.string, yytext, yyleng); yylval.string[yyleng]='\0'; return(STRING);} YY_BREAK -case 48: +case 49: YY_RULE_SETUP ECHO; YY_BREAK @@ -1338,7 +1343,7 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 197 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; @@ -1366,11 +1371,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 197 ) + if ( yy_current_state >= 202 ) yy_c = yy_meta[yy_c]; } yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; - yy_is_jam = (yy_current_state == 196); + yy_is_jam = (yy_current_state == 201); return yy_is_jam ? 0 : yy_current_state; } diff --git a/util/sconfig/main.c b/util/sconfig/main.c index aa79f1e..ae2c0c3 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -1493,6 +1493,35 @@ } } +static struct mb_include *mb_includes; + +void add_mainboard_includes(const char *path) +{ + struct mb_include *new_include = S_ALLOC(sizeof(struct mb_include)); + struct mb_include *include = mb_includes; + + new_include->path = path; + + if (!mb_includes) { + mb_includes = new_include; + return; + } + + while (include && include->next) + include = include->next; + include->next = new_include; +} + +static void emit_mainboard_includes(FILE *file) +{ + struct mb_include *include = mb_includes; + + while (include) { + fprintf(file, "#include %s\n", include->path); + include = include->next; + } +} + static void usage(void) { printf("usage: sconfig <options>\n"); @@ -1966,6 +1995,7 @@ fprintf(f, "#include <device/pci.h>\n"); fprintf(f, "#include <fw_config.h>\n"); fprintf(f, "#include <%s>\n", static_header); + emit_mainboard_includes(f); emit_chip_headers(f, chip_header.next); emit_identifiers(f, "struct device_operations", device_operations); fprintf(f, "\n#define STORAGE static __maybe_unused DEVTREE_CONST\n\n"); diff --git a/util/sconfig/sconfig.h b/util/sconfig/sconfig.h index cb8f7b3..c644a24 100644 --- a/util/sconfig/sconfig.h +++ b/util/sconfig/sconfig.h @@ -186,6 +186,12 @@ struct fw_config_probe *probe; }; +struct mb_include; +struct mb_include { + const char *path; + struct mb_include *next; +}; + extern struct bus *root_parent; struct device *new_device_raw(struct bus *parent, diff --git a/util/sconfig/sconfig.l b/util/sconfig/sconfig.l index 0e4e708..54cb0b8 100644 --- a/util/sconfig/sconfig.l +++ b/util/sconfig/sconfig.l @@ -42,6 +42,7 @@ irq {yylval.number=IRQ; return(RESOURCE);} drq {yylval.number=DRQ; return(RESOURCE);} io {yylval.number=IO; return(RESOURCE);} +include {return(INCLUDE);} inherit {return(INHERIT);} subsystemid {return(SUBSYSTEMID);} end {return(END);} diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index cb60fb5..6e00ef0d 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -155,38 +155,40 @@ YYSYMBOL_FW_CONFIG_PROBE = 42, /* FW_CONFIG_PROBE */ YYSYMBOL_PIPE = 43, /* PIPE */ YYSYMBOL_OPS = 44, /* OPS */ - YYSYMBOL_YYACCEPT = 45, /* $accept */ - YYSYMBOL_devtree = 46, /* devtree */ - YYSYMBOL_chipchild_nondev = 47, /* chipchild_nondev */ - YYSYMBOL_chipchild = 48, /* chipchild */ - YYSYMBOL_chipchildren = 49, /* chipchildren */ - YYSYMBOL_chipchildren_dev = 50, /* chipchildren_dev */ - YYSYMBOL_devicechildren = 51, /* devicechildren */ - YYSYMBOL_chip = 52, /* chip */ - YYSYMBOL_53_1 = 53, /* @1 */ - YYSYMBOL_device = 54, /* device */ - YYSYMBOL_55_2 = 55, /* @2 */ - YYSYMBOL_56_3 = 56, /* @3 */ - YYSYMBOL_alias = 57, /* alias */ - YYSYMBOL_status = 58, /* status */ - YYSYMBOL_resource = 59, /* resource */ - YYSYMBOL_reference = 60, /* reference */ - YYSYMBOL_registers = 61, /* registers */ - YYSYMBOL_subsystemid = 62, /* subsystemid */ - YYSYMBOL_smbios_slot_desc = 63, /* smbios_slot_desc */ - YYSYMBOL_smbios_dev_info = 64, /* smbios_dev_info */ - YYSYMBOL_fw_config_table = 65, /* fw_config_table */ - YYSYMBOL_fw_config_table_children = 66, /* fw_config_table_children */ - YYSYMBOL_fw_config_field_children = 67, /* fw_config_field_children */ - YYSYMBOL_fw_config_field_bits = 68, /* fw_config_field_bits */ - YYSYMBOL_fw_config_field_bits_repeating = 69, /* fw_config_field_bits_repeating */ - YYSYMBOL_fw_config_field = 70, /* fw_config_field */ - YYSYMBOL_71_4 = 71, /* $@4 */ - YYSYMBOL_72_5 = 72, /* $@5 */ - YYSYMBOL_73_6 = 73, /* $@6 */ - YYSYMBOL_fw_config_option = 74, /* fw_config_option */ - YYSYMBOL_fw_config_probe = 75, /* fw_config_probe */ - YYSYMBOL_ops = 76 /* ops */ + YYSYMBOL_INCLUDE = 45, /* INCLUDE */ + YYSYMBOL_YYACCEPT = 46, /* $accept */ + YYSYMBOL_devtree = 47, /* devtree */ + YYSYMBOL_chipchild_nondev = 48, /* chipchild_nondev */ + YYSYMBOL_chipchild = 49, /* chipchild */ + YYSYMBOL_chipchildren = 50, /* chipchildren */ + YYSYMBOL_chipchildren_dev = 51, /* chipchildren_dev */ + YYSYMBOL_devicechildren = 52, /* devicechildren */ + YYSYMBOL_chip = 53, /* chip */ + YYSYMBOL_54_1 = 54, /* @1 */ + YYSYMBOL_device = 55, /* device */ + YYSYMBOL_56_2 = 56, /* @2 */ + YYSYMBOL_57_3 = 57, /* @3 */ + YYSYMBOL_alias = 58, /* alias */ + YYSYMBOL_status = 59, /* status */ + YYSYMBOL_resource = 60, /* resource */ + YYSYMBOL_reference = 61, /* reference */ + YYSYMBOL_registers = 62, /* registers */ + YYSYMBOL_subsystemid = 63, /* subsystemid */ + YYSYMBOL_smbios_slot_desc = 64, /* smbios_slot_desc */ + YYSYMBOL_smbios_dev_info = 65, /* smbios_dev_info */ + YYSYMBOL_fw_config_table = 66, /* fw_config_table */ + YYSYMBOL_fw_config_table_children = 67, /* fw_config_table_children */ + YYSYMBOL_fw_config_field_children = 68, /* fw_config_field_children */ + YYSYMBOL_fw_config_field_bits = 69, /* fw_config_field_bits */ + YYSYMBOL_fw_config_field_bits_repeating = 70, /* fw_config_field_bits_repeating */ + YYSYMBOL_fw_config_field = 71, /* fw_config_field */ + YYSYMBOL_72_4 = 72, /* $@4 */ + YYSYMBOL_73_5 = 73, /* $@5 */ + YYSYMBOL_74_6 = 74, /* $@6 */ + YYSYMBOL_fw_config_option = 75, /* fw_config_option */ + YYSYMBOL_fw_config_probe = 76, /* fw_config_probe */ + YYSYMBOL_ops = 77, /* ops */ + YYSYMBOL_include = 78 /* include */ }; typedef enum yysymbol_kind_t yysymbol_kind_t; @@ -514,19 +516,19 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 2 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 94 +#define YYLAST 90 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 45 +#define YYNTOKENS 46 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 32 +#define YYNNTS 33 /* YYNRULES -- Number of rules. */ -#define YYNRULES 60 +#define YYNRULES 62 /* YYNSTATES -- Number of states. */ -#define YYNSTATES 103 +#define YYNSTATES 106 /* YYMAXUTOK -- Last valid token kind. */ -#define YYMAXUTOK 299 +#define YYMAXUTOK 300 /* YYTRANSLATE(TOKEN-NUM) -- Symbol number corresponding to TOKEN-NUM @@ -569,20 +571,21 @@ 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40, 41, 42, 43, 44 + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, + 45 }; #if YYDEBUG /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ static const yytype_uint8 yyrline[] = { - 0, 26, 26, 26, 26, 29, 29, 29, 30, 30, - 31, 31, 32, 32, 34, 34, 34, 34, 34, 34, - 34, 34, 34, 34, 36, 36, 45, 45, 53, 53, - 61, 63, 67, 67, 69, 72, 75, 78, 81, 84, - 87, 90, 93, 96, 100, 103, 103, 106, 106, 109, - 115, 115, 118, 117, 122, 122, 130, 130, 136, 140, - 143 + 0, 26, 26, 26, 26, 26, 29, 29, 29, 30, + 30, 31, 31, 32, 32, 34, 34, 34, 34, 34, + 34, 34, 34, 34, 34, 36, 36, 45, 45, 53, + 53, 61, 63, 67, 67, 69, 72, 75, 78, 81, + 84, 87, 90, 93, 96, 100, 103, 103, 106, 106, + 109, 115, 115, 118, 117, 122, 122, 130, 130, 136, + 140, 143, 146 }; #endif @@ -605,14 +608,14 @@ "SMBIOS_DEV_INFO", "IO", "NUMBER", "SUBSYSTEMID", "INHERIT", "PCIINT", "GENERIC", "SPI", "USB", "MMIO", "GPIO", "MDIO", "FW_CONFIG_TABLE", "FW_CONFIG_FIELD", "FW_CONFIG_OPTION", "FW_CONFIG_PROBE", "PIPE", "OPS", - "$accept", "devtree", "chipchild_nondev", "chipchild", "chipchildren", - "chipchildren_dev", "devicechildren", "chip", "@1", "device", "@2", "@3", - "alias", "status", "resource", "reference", "registers", "subsystemid", - "smbios_slot_desc", "smbios_dev_info", "fw_config_table", - "fw_config_table_children", "fw_config_field_children", - "fw_config_field_bits", "fw_config_field_bits_repeating", - "fw_config_field", "$@4", "$@5", "$@6", "fw_config_option", - "fw_config_probe", "ops", YY_NULLPTR + "INCLUDE", "$accept", "devtree", "chipchild_nondev", "chipchild", + "chipchildren", "chipchildren_dev", "devicechildren", "chip", "@1", + "device", "@2", "@3", "alias", "status", "resource", "reference", + "registers", "subsystemid", "smbios_slot_desc", "smbios_dev_info", + "fw_config_table", "fw_config_table_children", + "fw_config_field_children", "fw_config_field_bits", + "fw_config_field_bits_repeating", "fw_config_field", "$@4", "$@5", "$@6", + "fw_config_option", "fw_config_probe", "ops", "include", YY_NULLPTR }; static const char * @@ -622,7 +625,7 @@ } #endif -#define YYPACT_NINF (-51) +#define YYPACT_NINF (-66) #define yypact_value_is_default(Yyn) \ ((Yyn) == YYPACT_NINF) @@ -636,17 +639,17 @@ STATE-NUM. */ static const yytype_int8 yypact[] = { - -51, 12, -51, 6, -51, -51, -51, -51, -3, 49, - -51, 7, -51, 10, 23, 24, 49, 14, -51, -51, - -51, -51, 16, 26, 17, 33, 42, -51, -51, 49, - 28, 18, -51, 11, 53, 38, 43, -51, -51, -51, - -51, -51, 34, -51, -12, -51, -51, -51, 45, 11, - -51, -51, -8, 28, 18, -51, -51, 47, -51, -51, - -51, -51, -51, -51, -7, 37, 0, -51, -51, -51, - 39, -51, 50, 40, 41, 54, 55, -51, -51, -51, - -51, -51, -51, -51, -51, -51, 5, 58, 57, 59, - 46, 60, -51, -51, 51, 61, -51, 48, -51, -51, - 64, -51, -51 + -66, 2, -66, 11, -66, 15, -66, -66, -66, -66, + -11, -66, 52, -66, 23, -66, 14, 26, 27, 52, + 13, -66, -66, -66, -66, -13, 28, 20, 35, 44, + -66, -66, 52, 25, 17, -66, 10, 55, 45, 46, + -66, -66, -66, -66, -66, 36, -66, -8, -66, -66, + -66, 47, 10, -66, -66, -4, 25, 17, -66, -66, + 49, -66, -66, -66, -66, -66, -66, 1, 38, 4, + -66, -66, -66, 40, -66, 53, 42, 43, 56, 57, + -66, -66, -66, -66, -66, -66, -66, -66, -66, 9, + 60, 59, 61, 48, 62, -66, -66, 51, 64, -66, + 54, -66, -66, 65, -66, -66 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -654,35 +657,35 @@ means the default is an error. */ static const yytype_int8 yydefact[] = { - 2, 0, 1, 0, 46, 3, 4, 24, 0, 0, - 44, 0, 45, 0, 0, 0, 0, 0, 5, 11, - 7, 6, 56, 0, 0, 0, 0, 13, 25, 12, - 54, 51, 48, 0, 30, 0, 0, 9, 10, 8, - 49, 48, 0, 52, 0, 32, 33, 28, 0, 0, - 36, 35, 0, 0, 51, 48, 57, 0, 47, 23, - 31, 26, 55, 50, 0, 0, 0, 23, 53, 58, - 0, 29, 0, 0, 0, 0, 0, 15, 14, 16, - 20, 17, 18, 19, 21, 22, 0, 0, 0, 43, - 0, 0, 60, 27, 0, 41, 42, 37, 59, 34, - 40, 38, 39 + 2, 0, 1, 0, 47, 0, 3, 4, 5, 25, + 0, 62, 0, 45, 0, 46, 0, 0, 0, 0, + 0, 6, 12, 8, 7, 57, 0, 0, 0, 0, + 14, 26, 13, 55, 52, 49, 0, 31, 0, 0, + 10, 11, 9, 50, 49, 0, 53, 0, 33, 34, + 29, 0, 0, 37, 36, 0, 0, 52, 49, 58, + 0, 48, 24, 32, 27, 56, 51, 0, 0, 0, + 24, 54, 59, 0, 30, 0, 0, 0, 0, 0, + 16, 15, 17, 21, 18, 19, 20, 22, 23, 0, + 0, 0, 44, 0, 0, 61, 28, 0, 42, 43, + 38, 60, 35, 41, 39, 40 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -51, -51, 62, -51, -51, 66, 19, -1, -51, -28, - -51, -51, -51, 35, -51, -51, -50, -51, -51, -51, - -51, -51, -16, 52, 29, -51, -51, -51, -51, -51, - -51, -51 + -66, -66, 58, -66, -66, 67, 19, -1, -66, -31, + -66, -66, -66, 31, -66, -66, -65, -66, -66, -66, + -66, -66, -33, 39, 30, -66, -66, -66, -66, -66, + -66, -66, -66 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int8 yydefgoto[] = { - 0, 1, 16, 38, 29, 17, 66, 18, 9, 19, - 67, 59, 49, 47, 79, 20, 21, 81, 82, 83, - 6, 8, 44, 31, 43, 12, 55, 41, 32, 58, - 84, 85 + 0, 1, 19, 41, 32, 20, 69, 21, 12, 22, + 70, 62, 52, 50, 82, 23, 24, 84, 85, 86, + 7, 10, 47, 34, 46, 15, 58, 44, 35, 61, + 87, 88, 8 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If @@ -690,71 +693,71 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_int8 yytable[] = { - 5, 39, 56, 3, 13, 14, 62, 68, 3, 13, - 14, 10, 2, 70, 71, 3, 80, 23, 70, 93, - 45, 46, 24, 7, 22, 52, 72, 73, 28, 57, - 74, 72, 73, 57, 57, 74, 80, 11, 78, 64, - 25, 26, 75, 33, 76, 30, 34, 75, 35, 76, - 36, 4, 3, 13, 14, 50, 15, 40, 78, 48, - 51, 42, 60, 53, 65, 77, 69, 88, 87, 89, - 90, 91, 92, 94, 95, 97, 96, 98, 100, 101, - 99, 102, 27, 63, 61, 77, 86, 0, 0, 0, - 0, 37, 0, 0, 54 + 6, 42, 2, 13, 83, 3, 59, 3, 16, 17, + 65, 55, 3, 16, 17, 71, 33, 73, 74, 48, + 49, 26, 73, 96, 83, 67, 27, 31, 9, 14, + 75, 76, 11, 60, 77, 75, 76, 60, 81, 77, + 25, 4, 60, 28, 29, 36, 78, 5, 79, 37, + 38, 78, 39, 79, 43, 3, 16, 17, 81, 18, + 45, 51, 53, 54, 63, 56, 68, 72, 80, 90, + 91, 92, 93, 94, 95, 97, 98, 100, 99, 101, + 102, 103, 105, 64, 57, 104, 30, 66, 80, 89, + 40 }; static const yytype_int8 yycheck[] = { - 1, 29, 14, 3, 4, 5, 14, 14, 3, 4, - 5, 14, 0, 13, 14, 3, 66, 7, 13, 14, - 9, 10, 12, 17, 17, 41, 26, 27, 14, 41, - 30, 26, 27, 41, 41, 30, 86, 40, 66, 55, - 17, 17, 42, 17, 44, 29, 29, 42, 15, 44, - 8, 39, 3, 4, 5, 17, 7, 29, 86, 6, - 17, 43, 17, 29, 17, 66, 29, 17, 29, 29, - 29, 17, 17, 15, 17, 29, 17, 17, 17, 31, - 29, 17, 16, 54, 49, 86, 67, -1, -1, -1, - -1, 29, -1, -1, 42 + 1, 32, 0, 14, 69, 3, 14, 3, 4, 5, + 14, 44, 3, 4, 5, 14, 29, 13, 14, 9, + 10, 7, 13, 14, 89, 58, 12, 14, 17, 40, + 26, 27, 17, 41, 30, 26, 27, 41, 69, 30, + 17, 39, 41, 17, 17, 17, 42, 45, 44, 29, + 15, 42, 8, 44, 29, 3, 4, 5, 89, 7, + 43, 6, 17, 17, 17, 29, 17, 29, 69, 29, + 17, 29, 29, 17, 17, 15, 17, 29, 17, 17, + 29, 17, 17, 52, 45, 31, 19, 57, 89, 70, + 32 }; /* YYSTOS[STATE-NUM] -- The symbol kind of the accessing symbol of state STATE-NUM. */ static const yytype_int8 yystos[] = { - 0, 46, 0, 3, 39, 52, 65, 17, 66, 53, - 14, 40, 70, 4, 5, 7, 47, 50, 52, 54, - 60, 61, 17, 7, 12, 17, 17, 50, 14, 49, - 29, 68, 73, 17, 29, 15, 8, 47, 48, 54, - 29, 72, 43, 69, 67, 9, 10, 58, 6, 57, - 17, 17, 67, 29, 68, 71, 14, 41, 74, 56, - 17, 58, 14, 69, 67, 17, 51, 55, 14, 29, - 13, 14, 26, 27, 30, 42, 44, 52, 54, 59, - 61, 62, 63, 64, 75, 76, 51, 29, 17, 29, - 29, 17, 17, 14, 15, 17, 17, 29, 17, 29, - 17, 31, 17 + 0, 47, 0, 3, 39, 45, 53, 66, 78, 17, + 67, 17, 54, 14, 40, 71, 4, 5, 7, 48, + 51, 53, 55, 61, 62, 17, 7, 12, 17, 17, + 51, 14, 50, 29, 69, 74, 17, 29, 15, 8, + 48, 49, 55, 29, 73, 43, 70, 68, 9, 10, + 59, 6, 58, 17, 17, 68, 29, 69, 72, 14, + 41, 75, 57, 17, 59, 14, 70, 68, 17, 52, + 56, 14, 29, 13, 14, 26, 27, 30, 42, 44, + 53, 55, 60, 62, 63, 64, 65, 76, 77, 52, + 29, 17, 29, 29, 17, 17, 14, 15, 17, 17, + 29, 17, 29, 17, 31, 17 }; /* YYR1[RULE-NUM] -- Symbol kind of the left-hand side of rule RULE-NUM. */ static const yytype_int8 yyr1[] = { - 0, 45, 46, 46, 46, 47, 47, 47, 48, 48, - 49, 49, 50, 50, 51, 51, 51, 51, 51, 51, - 51, 51, 51, 51, 53, 52, 55, 54, 56, 54, - 57, 57, 58, 58, 59, 60, 61, 62, 62, 63, - 63, 63, 64, 64, 65, 66, 66, 67, 67, 68, - 69, 69, 71, 70, 72, 70, 73, 70, 74, 75, - 76 + 0, 46, 47, 47, 47, 47, 48, 48, 48, 49, + 49, 50, 50, 51, 51, 52, 52, 52, 52, 52, + 52, 52, 52, 52, 52, 54, 53, 56, 55, 57, + 55, 58, 58, 59, 59, 60, 61, 62, 63, 63, + 64, 64, 64, 65, 65, 66, 67, 67, 68, 68, + 69, 70, 70, 72, 71, 73, 71, 74, 71, 75, + 76, 77, 78 }; /* YYR2[RULE-NUM] -- Number of symbols on the right-hand side of rule RULE-NUM. */ static const yytype_int8 yyr2[] = { - 0, 2, 0, 2, 2, 1, 1, 1, 1, 1, - 2, 0, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 0, 0, 5, 0, 8, 0, 7, - 0, 2, 1, 1, 4, 4, 4, 3, 4, 5, - 4, 3, 3, 2, 3, 2, 0, 2, 0, 2, - 3, 0, 0, 7, 0, 6, 0, 5, 3, 3, - 2 + 0, 2, 0, 2, 2, 2, 1, 1, 1, 1, + 1, 2, 0, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 0, 0, 5, 0, 8, 0, + 7, 0, 2, 1, 1, 4, 4, 4, 3, 4, + 5, 4, 3, 3, 2, 3, 2, 0, 2, 0, + 2, 3, 0, 0, 7, 0, 6, 0, 5, 3, + 3, 2, 2 }; @@ -1221,7 +1224,7 @@ { cur_parent = root_parent; } break; - case 24: /* @1: %empty */ + case 25: /* @1: %empty */ { (yyval.chip_instance) = new_chip_instance((yyvsp[0].string)); chip_enqueue_tail(cur_chip_instance); @@ -1229,109 +1232,109 @@ } break; - case 25: /* chip: CHIP STRING @1 chipchildren_dev END */ + case 26: /* chip: CHIP STRING @1 chipchildren_dev END */ { cur_chip_instance = chip_dequeue_tail(); } break; - case 26: /* @2: %empty */ + case 27: /* @2: %empty */ { (yyval.dev) = new_device_raw(cur_parent, cur_chip_instance, (yyvsp[-3].number), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].number)); cur_parent = (yyval.dev)->last_bus; } break; - case 27: /* device: DEVICE BUS NUMBER alias status @2 devicechildren END */ + case 28: /* device: DEVICE BUS NUMBER alias status @2 devicechildren END */ { cur_parent = (yyvsp[-2].dev)->parent; } break; - case 28: /* @3: %empty */ + case 29: /* @3: %empty */ { (yyval.dev) = new_device_reference(cur_parent, cur_chip_instance, (yyvsp[-1].string), (yyvsp[0].number)); cur_parent = (yyval.dev)->last_bus; } break; - case 29: /* device: DEVICE REFERENCE STRING status @3 devicechildren END */ + case 30: /* device: DEVICE REFERENCE STRING status @3 devicechildren END */ { cur_parent = (yyvsp[-2].dev)->parent; } break; - case 30: /* alias: %empty */ + case 31: /* alias: %empty */ { (yyval.string) = NULL; } break; - case 31: /* alias: ALIAS STRING */ + case 32: /* alias: ALIAS STRING */ { (yyval.string) = (yyvsp[0].string); } break; - case 34: /* resource: RESOURCE NUMBER EQUALS NUMBER */ + case 35: /* resource: RESOURCE NUMBER EQUALS NUMBER */ { add_resource(cur_parent, (yyvsp[-3].number), strtol((yyvsp[-2].string), NULL, 0), strtol((yyvsp[0].string), NULL, 0)); } break; - case 35: /* reference: REFERENCE STRING ASSOCIATION STRING */ + case 36: /* reference: REFERENCE STRING ASSOCIATION STRING */ { add_reference(cur_chip_instance, (yyvsp[0].string), (yyvsp[-2].string)); } break; - case 36: /* registers: REGISTER STRING EQUALS STRING */ + case 37: /* registers: REGISTER STRING EQUALS STRING */ { add_register(cur_chip_instance, (yyvsp[-2].string), (yyvsp[0].string)); } break; - case 37: /* subsystemid: SUBSYSTEMID NUMBER NUMBER */ + case 38: /* subsystemid: SUBSYSTEMID NUMBER NUMBER */ { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-1].string), NULL, 16), strtol((yyvsp[0].string), NULL, 16), 0); } break; - case 38: /* subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT */ + case 39: /* subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT */ { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[-2].string), NULL, 16), strtol((yyvsp[-1].string), NULL, 16), 1); } break; - case 39: /* smbios_slot_desc: SLOT_DESC STRING STRING STRING STRING */ + case 40: /* smbios_slot_desc: SLOT_DESC STRING STRING STRING STRING */ { add_slot_desc(cur_parent, (yyvsp[-3].string), (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string)); } break; - case 40: /* smbios_slot_desc: SLOT_DESC STRING STRING STRING */ + case 41: /* smbios_slot_desc: SLOT_DESC STRING STRING STRING */ { add_slot_desc(cur_parent, (yyvsp[-2].string), (yyvsp[-1].string), (yyvsp[0].string), NULL); } break; - case 41: /* smbios_slot_desc: SLOT_DESC STRING STRING */ + case 42: /* smbios_slot_desc: SLOT_DESC STRING STRING */ { add_slot_desc(cur_parent, (yyvsp[-1].string), (yyvsp[0].string), NULL, NULL); } break; - case 42: /* smbios_dev_info: SMBIOS_DEV_INFO NUMBER STRING */ + case 43: /* smbios_dev_info: SMBIOS_DEV_INFO NUMBER STRING */ { add_smbios_dev_info(cur_parent, strtol((yyvsp[-1].string), NULL, 0), (yyvsp[0].string)); } break; - case 43: /* smbios_dev_info: SMBIOS_DEV_INFO NUMBER */ + case 44: /* smbios_dev_info: SMBIOS_DEV_INFO NUMBER */ { add_smbios_dev_info(cur_parent, strtol((yyvsp[0].string), NULL, 0), NULL); } break; - case 44: /* fw_config_table: FW_CONFIG_TABLE fw_config_table_children END */ + case 45: /* fw_config_table: FW_CONFIG_TABLE fw_config_table_children END */ { } break; - case 49: /* fw_config_field_bits: NUMBER NUMBER */ + case 50: /* fw_config_field_bits: NUMBER NUMBER */ { append_fw_config_bits(&cur_bits, strtoul((yyvsp[-1].string), NULL, 0), strtoul((yyvsp[0].string), NULL, 0)); } break; - case 52: /* $@4: %empty */ + case 53: /* $@4: %empty */ { cur_field = new_fw_config_field((yyvsp[-2].string), cur_bits); } break; - case 53: /* fw_config_field: FW_CONFIG_FIELD STRING fw_config_field_bits fw_config_field_bits_repeating $@4 fw_config_field_children END */ + case 54: /* fw_config_field: FW_CONFIG_FIELD STRING fw_config_field_bits fw_config_field_bits_repeating $@4 fw_config_field_children END */ { cur_bits = NULL; } break; - case 54: /* $@5: %empty */ + case 55: /* $@5: %empty */ { cur_bits = NULL; append_fw_config_bits(&cur_bits, strtoul((yyvsp[0].string), NULL, 0), strtoul((yyvsp[0].string), NULL, 0)); @@ -1339,32 +1342,36 @@ } break; - case 55: /* fw_config_field: FW_CONFIG_FIELD STRING NUMBER $@5 fw_config_field_children END */ + case 56: /* fw_config_field: FW_CONFIG_FIELD STRING NUMBER $@5 fw_config_field_children END */ { cur_bits = NULL; } break; - case 56: /* $@6: %empty */ + case 57: /* $@6: %empty */ { cur_field = get_fw_config_field((yyvsp[0].string)); } break; - case 57: /* fw_config_field: FW_CONFIG_FIELD STRING $@6 fw_config_field_children END */ + case 58: /* fw_config_field: FW_CONFIG_FIELD STRING $@6 fw_config_field_children END */ { cur_bits = NULL; } break; - case 58: /* fw_config_option: FW_CONFIG_OPTION STRING NUMBER */ + case 59: /* fw_config_option: FW_CONFIG_OPTION STRING NUMBER */ { add_fw_config_option(cur_field, (yyvsp[-1].string), strtoull((yyvsp[0].string), NULL, 0)); } break; - case 59: /* fw_config_probe: FW_CONFIG_PROBE STRING STRING */ + case 60: /* fw_config_probe: FW_CONFIG_PROBE STRING STRING */ { add_fw_config_probe(cur_parent, (yyvsp[-1].string), (yyvsp[0].string)); } break; - case 60: /* ops: OPS STRING */ + case 61: /* ops: OPS STRING */ { add_device_ops(cur_parent, (yyvsp[0].string)); } break; + case 62: /* include: INCLUDE STRING */ + { add_mainboard_includes((yyvsp[0].string)); } + break; + default: break; diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped index eb5b97c..59a8c69 100644 --- a/util/sconfig/sconfig.tab.h_shipped +++ b/util/sconfig/sconfig.tab.h_shipped @@ -35,8 +35,8 @@ especially those whose name start with YY_ or yy_. They are private implementation details that can be changed or removed. */ -#ifndef YY_YY_HOME_ARTHUR_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED -# define YY_YY_HOME_ARTHUR_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED +#ifndef YY_YY_SCONFIG_TAB_H_SHIPPED_INCLUDED +# define YY_YY_SCONFIG_TAB_H_SHIPPED_INCLUDED /* Debug traces. */ #ifndef YYDEBUG # define YYDEBUG 0 @@ -95,10 +95,59 @@ FW_CONFIG_OPTION = 296, /* FW_CONFIG_OPTION */ FW_CONFIG_PROBE = 297, /* FW_CONFIG_PROBE */ PIPE = 298, /* PIPE */ - OPS = 299 /* OPS */ + OPS = 299, /* OPS */ + INCLUDE = 300 /* INCLUDE */ }; typedef enum yytokentype yytoken_kind_t; #endif +/* Token kinds. */ +#define YYEMPTY -2 +#define YYEOF 0 +#define YYerror 256 +#define YYUNDEF 257 +#define CHIP 258 +#define DEVICE 259 +#define REGISTER 260 +#define ALIAS 261 +#define REFERENCE 262 +#define ASSOCIATION 263 +#define BOOL 264 +#define STATUS 265 +#define MANDATORY 266 +#define BUS 267 +#define RESOURCE 268 +#define END 269 +#define EQUALS 270 +#define HEX 271 +#define STRING 272 +#define PCI 273 +#define PNP 274 +#define I2C 275 +#define CPU_CLUSTER 276 +#define CPU 277 +#define DOMAIN 278 +#define IRQ 279 +#define DRQ 280 +#define SLOT_DESC 281 +#define SMBIOS_DEV_INFO 282 +#define IO 283 +#define NUMBER 284 +#define SUBSYSTEMID 285 +#define INHERIT 286 +#define PCIINT 287 +#define GENERIC 288 +#define SPI 289 +#define USB 290 +#define MMIO 291 +#define GPIO 292 +#define MDIO 293 +#define FW_CONFIG_TABLE 294 +#define FW_CONFIG_FIELD 295 +#define FW_CONFIG_OPTION 296 +#define FW_CONFIG_PROBE 297 +#define PIPE 298 +#define OPS 299 +#define INCLUDE 300 /* Value type. */ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED @@ -124,4 +173,4 @@ int yyparse (void); -#endif /* !YY_YY_HOME_ARTHUR_SRC_COREBOOT_UTIL_SCONFIG_SCONFIG_TAB_H_SHIPPED_INCLUDED */ +#endif /* !YY_YY_SCONFIG_TAB_H_SHIPPED_INCLUDED */ diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 17ab9a5..5a7c3d4 100644 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -21,9 +21,9 @@ uint64_t number; } -%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC SMBIOS_DEV_INFO IO NUMBER SUBSYSTEMID INHERIT PCIINT GENERIC SPI USB MMIO GPIO MDIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE OPS +%token CHIP DEVICE REGISTER ALIAS REFERENCE ASSOCIATION BOOL STATUS MANDATORY BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C CPU_CLUSTER CPU DOMAIN IRQ DRQ SLOT_DESC SMBIOS_DEV_INFO IO NUMBER SUBSYSTEMID INHERIT PCIINT GENERIC SPI USB MMIO GPIO MDIO FW_CONFIG_TABLE FW_CONFIG_FIELD FW_CONFIG_OPTION FW_CONFIG_PROBE PIPE OPS INCLUDE %% -devtree: { cur_parent = root_parent; } | devtree chip | devtree fw_config_table; +devtree: { cur_parent = root_parent; } | devtree chip | devtree fw_config_table | devtree include; /* Ensure at least one `device` below each `chip`. */ chipchild_nondev: chip | registers | reference; @@ -143,4 +143,7 @@ ops: OPS STRING /* == global identifier */ { add_device_ops(cur_parent, $<string>2); } +include: INCLUDE STRING + { add_mainboard_includes($<string>2); } + %% -- To view, visit https://review.coreboot.org/c/coreboot/+/74736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34893a703cc4f588dda3736e858429bf765059e6 Gerrit-Change-Number: 74736 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Karthik Ramasubramanian (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Martin Roth, Tim Van Patten, Felix Held, Mark Hasemeyer. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 43: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 43 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 19:03:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer. Hello build bot (Jenkins), Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74112 to look at the new patch set (#43). Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... mb/google/myst: Enable PCIe devices in devicetree Ensure that DXIO descriptors are updated using info from AMD and Myst board schematics. BUG=b:275960920,b:276744321 TEST=builds Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M src/mainboard/google/myst/port_descriptors.c M src/mainboard/google/myst/variants/baseboard/devicetree.cb M src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h 3 files changed, 120 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/74112/43 -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 43 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 41: (1 comment) File src/mainboard/google/myst/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/74112/comment/4fda42eb_df6107ef PS40, Line 51: GEN3 > on moving the dxio settings to the devicetree: short answer is no; bit longer answer is in b:2748405 […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 41 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 19:01:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Jon Murphy <jpmurphy(a)google.com> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer. Hello build bot (Jenkins), Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74112 to look at the new patch set (#42). Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... mb/google/myst: Enable PCIe devices in devicetree Ensure that DXIO descriptors are updated using info from AMD and Myst board schematics. BUG=b:275960920,b:276744321 TEST=builds Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M src/mainboard/google/myst/port_descriptors.c M src/mainboard/google/myst/variants/baseboard/devicetree.cb M src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h 3 files changed, 120 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/74112/42 -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 42 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/amd/phoenix/Kconfig: Update comment
by Felix Held (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74734 ) Change subject: soc/amd/phoenix/Kconfig: Update comment ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9671a9228c304988eb3903391f74a21d80d0a8bc Gerrit-Change-Number: 74734 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 18:54:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Felix Held (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 41: (1 comment) File src/mainboard/google/myst/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/74112/comment/f2ac04b5_2a870199 PS40, Line 51: GEN3 > Are we adding this data to device tree so it's no longer duplicated? :) on moving the dxio settings to the devicetree: short answer is no; bit longer answer is in b:274840555 : the dxio init is done in fsp-m in romstage where the devicetree is still static and that won't cover all cases we'll run into. link_speed_capability is for limiting the maximum speed and the maximum speed on this chip is gen4 -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 41 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 18:54:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Jon Murphy <jpmurphy(a)google.com> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Put options in CFR cbtable
by Benjamin Doron (Code Review) 24 Apr '23

24 Apr '23

Attention is currently required from: Christian Walter, Angel Pons, Maximilian Brune, Lean Sheng Tan. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74122 ) Change subject: [WIP] mb/prodrive/atlas: Put options in CFR cbtable ...................................................................... Patch Set 1: (1 comment) File src/mainboard/prodrive/atlas/cfr.c: https://review.coreboot.org/c/coreboot/+/74122/comment/d1c0f2a7_1068b5c2 PS1, Line 14: struct sm_enum_value pwr_after_g3_values[] = { : { "Power on (S0)", 0 }, : { "Power off (S5)", 1 }, : SM_ENUM_VALUE_END, : }; These enum values aren't correct, see src/soc/intel/common/block/include/intelblocks/pmclib.h: ``` enum { MAINBOARD_POWER_STATE_OFF, MAINBOARD_POWER_STATE_ON, MAINBOARD_POWER_STATE_PREVIOUS, }; ``` Where we have enums/defines, let's reuse them here? -- To view, visit https://review.coreboot.org/c/coreboot/+/74122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47585a9a6f94ab5005f2ab63a0df267c0caef231 Gerrit-Change-Number: 74122 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 18:53:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Revert "util/ifdtool: Add option to create FMAP template"
by Matt DeVillier (Code Review) 24 Apr '23

24 Apr '23

Matt DeVillier has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/74692 ) Change subject: Revert "util/ifdtool: Add option to create FMAP template" ...................................................................... Abandoned CB:74735 resolves the root cause of the issue -- To view, visit https://review.coreboot.org/c/coreboot/+/74692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cbcbe16d508787f5c8aae4889199185890f0dc7 Gerrit-Change-Number: 74692 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: abandon

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