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Change subject: mb/google/myst: Enable PCIe devices in devicetree
......................................................................
Patch Set 43: Code-Review+2
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Change subject: soc/amd/common/psp_verstage: Map/unmap boot device on need basis
......................................................................
Patch Set 1:
(3 comments)
File src/soc/amd/common/psp_verstage/boot_dev.c:
https://review.coreboot.org/c/coreboot/+/74606/comment/62baa86c_df99393a
PS1, Line 22: svc_map_spi_rom
> Will this set mapping to NULL on failure?
I expect SVC call to not touch mapping on failure. Do you think setting explicitly to NULL again might be safe?
https://review.coreboot.org/c/coreboot/+/74606/comment/bdf51c9d_485785b0
PS1, Line 22: size
> Does this have any alignment restrictions?
Not that I am aware of. I can check with PSP team.
File src/soc/amd/common/psp_verstage/fch.c:
https://review.coreboot.org/c/coreboot/+/74606/comment/91e244b0_20a20219
PS1, Line 100: SpiBiosSmnBase
> Is this really a `void *`?
Atleast as per the command structure defined in bl_syscall_public.h - https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/he…
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Change subject: ACPI: Make FADT entries for RTC/CMOS architectural
......................................................................
Patch Set 1:
(2 comments)
File src/arch/x86/acpi.c:
https://review.coreboot.org/c/coreboot/+/74601/comment/8d33621c_77b9853d
PS1, Line 32: #define RTC_CENTURY 0x48
<drivers/pc80/mcXXX.h>
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https://review.coreboot.org/c/coreboot/+/74601/comment/87e5e47d_d135d46a
PS1, Line 43: fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */
need to check
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Change subject: mb/google/myst: Enable PCIe devices in devicetree
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Patch Set 43: Code-Review+2
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Change subject: soc/amd/common: Identify FSP HOB type GUIDs
......................................................................
Patch Set 1:
(2 comments)
File src/soc/amd/common/fsp/hob_display.c:
PS1:
> i personally would prefer to use the coreboot type guid_t and the macro GUID_INIT instead of the EFI […]
The reason I chose this representation is because it allows us to more easily search for the guids in the AGESA FSP source.
If the coreboot GUID_INIT function used a uint64_t for the last segment instead of 8 uint8_t values, I'd support it. That would match the standard GUID representation instead of doing our own thing.
https://review.coreboot.org/c/coreboot/+/74344/comment/1868dff9_0afa36bf
PS1, Line 5: #include <lib.h>
> i don't see what this is needed for. you'll need to include types. […]
Done
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74344
to look at the new patch set (#2).
Change subject: soc/amd/common: Identify FSP HOB type GUIDs
......................................................................
soc/amd/common: Identify FSP HOB type GUIDs
This identifies GUIDs used in the AMD FSP so they don't display as
"Unknown GUID".
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I3e0b4c3e3c7b6271ac64f9296c8a3f46d28e244d
---
M src/soc/amd/common/fsp/Makefile.inc
A src/soc/amd/common/fsp/hob_display.c
2 files changed, 115 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/74344/2
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Change subject: mb/google/skyrim: Disable unused SPI ROM types
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/skyrim/Kconfig:
https://review.coreboot.org/c/coreboot/+/72769/comment/e235fdcd_073cdf26
PS3, Line 206: # Gigadevice is used on Whiterun as an alternative to Winbond
: config SPI_FLASH_GIGADEVICE
: default y
:
: # XMC chips used on Markarth as an alternative to Winbond
: # These chips identify as ST Micro (Manufacturer ID: 0x20)
: config SPI_FLASH_STMICRO
: default y
> While it's possible, my personal preference is that the Kconfig. […]
`skyrim/Kconfig.name` is already being used for device-specific values. For example:
```
config BOARD_GOOGLE_WINTERHOLD
bool "-> Winterhold"
select BOARD_GOOGLE_BASEBOARD_SKYRIM
select SOC_AMD_COMMON_BLOCK_ACPI_DPTC
select FEATURE_DYNAMIC_DPTC
config BOARD_GOOGLE_FROSTFLOW
bool "-> Frostflow"
select BOARD_GOOGLE_BASEBOARD_SKYRIM
select DRIVERS_GENESYSLOGIC_GL9755
select FEATURE_TABLET_MODE_DPTC
select SOC_AMD_COMMON_BLOCK_ACPI_DPTC
```
I agree that it would be good to have a consensus on this, and cleanup whichever file we settle on.
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Change subject: mb/google,intel: Use common ChromeEC code for SMI APMC
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> would be good to test this one on hardware, since this will have google_chromeec_get_mkbp_event call […]
Right, I missed the added MKBP here, but noticed in CB:74603 for the chromeec_smi_sleep() case and left it as [WIP] for this exact reason.
Related: CB:15685 and CB:22005. Latter describes "adding EC debug logs" as a verification and test.
So what would be the minimal required hardware testing for this? The first APMC that would reach the changed code is late ramstage, device init calls apm_control() with APM_CNT_ACPI_DISABLE or _ENABLE. Just getting past that with one of the boards without regression is enough?
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Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/73862 )
Change subject: mb/google/skyrim: Hide unused GPP port
......................................................................
Abandoned
The GPP ports are now marked as hidden in the chipset file.
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Change subject: mb/google/skyrim: Disable unused SPI ROM types
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/skyrim/Kconfig:
https://review.coreboot.org/c/coreboot/+/72769/comment/b08d48f7_efeefc65
PS3, Line 206: # Gigadevice is used on Whiterun as an alternative to Winbond
: config SPI_FLASH_GIGADEVICE
: default y
:
: # XMC chips used on Markarth as an alternative to Winbond
: # These chips identify as ST Micro (Manufacturer ID: 0x20)
: config SPI_FLASH_STMICRO
: default y
> Can these be moved to `skyrim/Kconfig. […]
While it's possible, my personal preference is that the Kconfig.name file is used only for the actual name selection. If there's a strong preference in that direction for Google platforms, I can do it, but I dislike having the board configuration being split between two files.
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