coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/skyrim: Disable unused SPI ROM types
by Felix Singer (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Martin L Roth, Jason Nien, Jon Murphy, Martin Roth, Tim Van Patten. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72769 ) Change subject: mb/google/skyrim: Disable unused SPI ROM types ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/72769/comment/ee2814cf_e876f541 PS3, Line 206: # Gigadevice is used on Whiterun as an alternative to Winbond : config SPI_FLASH_GIGADEVICE : default y : : # XMC chips used on Markarth as an alternative to Winbond : # These chips identify as ST Micro (Manufacturer ID: 0x20) : config SPI_FLASH_STMICRO : default y > `skyrim/Kconfig.name` is already being used for device-specific values. For example: […] I have converted most of the Google mainboards at the end of 2021 so that selects are done in Kconfig instead of Kconfig.name, which makes them compliant with the rest of the tree. Only some ARM based mainboards were left because their Kconfig had some other issues which blocked this effort. Looking at mb/google, these mainboards use selects in Kconfig.name: * asurada * brya (x86) * cherry * corsola * dedede (x86) * geralt * gru * guybrush (x86) * herobrine * kahlee (x86) * kukui * rex (x86) * skyrim (x86) * trogdor * veyron * zork (x86) I marked the x86 based mainboards which were added in the meantime and use selects in Kconfig.name. All the other ones are ARM based. So the majority of the Google mainboards don't use selects in Kconfig.name anymore. -- To view, visit https://review.coreboot.org/c/coreboot/+/72769 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6e402269d1f2cac8256d478eb36743441497bdf Gerrit-Change-Number: 72769 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 04:58:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/yaviks: Update devicetree for UFC usb port
by Eric Lai (Code Review) 25 Apr '23

25 Apr '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74714 ) Change subject: mb/google/nissa/var/yaviks: Update devicetree for UFC usb port ...................................................................... mb/google/nissa/var/yaviks: Update devicetree for UFC usb port USB port 6 connects to a USB front camera, it should always probe. Remove probe by rear camera fw_config. BUG=b:273791621 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I554046718f6e0eb7197970f9a3808b3e1ea7f99c Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74714 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> --- M src/mainboard/google/brya/variants/yaviks/overridetree.cb 1 file changed, 21 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index 38bd1b5..65da4fa 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -542,9 +542,7 @@ chip drivers/usb/acpi register "desc" = ""USB2 UFC"" register "type" = "UPC_TYPE_INTERNAL" - device ref usb2_port6 on - probe WFC WFC_MIPI_OVTI8856 - end + device ref usb2_port6 on end end chip drivers/usb/acpi register "desc" = ""USB2 Bluetooth"" -- To view, visit https://review.coreboot.org/c/coreboot/+/74714 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I554046718f6e0eb7197970f9a3808b3e1ea7f99c Gerrit-Change-Number: 74714 Gerrit-PatchSet: 3 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/nissa/var/yavilla: Update devicetree based on FW_CONFIG
by Eric Lai (Code Review) 25 Apr '23

25 Apr '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74625 ) Change subject: mb/google/nissa/var/yavilla: Update devicetree based on FW_CONFIG ...................................................................... mb/google/nissa/var/yavilla: Update devicetree based on FW_CONFIG Update devicetree -Enable USB2 port5 for WWAN -Update OVTI8856 setting -Update USB2/3 Type-A 0/1 port location Probe devicetree based on FW_CONFIG -pen garage -rear mipi cam -USB WWAN BUG=b:273791621, b:276369170 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I6cc7be2309483ce016bde57db34af078bd4d46b0 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74625 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> --- M src/mainboard/google/brya/variants/yavilla/overridetree.cb 1 file changed, 88 insertions(+), 16 deletions(-) Approvals: build bot (Jenkins): Verified Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/yavilla/overridetree.cb b/src/mainboard/google/brya/variants/yavilla/overridetree.cb index e3d3cac..f7798e7 100644 --- a/src/mainboard/google/brya/variants/yavilla/overridetree.cb +++ b/src/mainboard/google/brya/variants/yavilla/overridetree.cb @@ -1,3 +1,35 @@ +fw_config + field DB_USB 0 1 + option DB_NONE 0 + option DB_1C_1A 1 + option DB_1C 2 + option DB_1C_LTE 3 + end + field WIFI_SAR_ID 2 3 + option SAR_ID_0 0 + end + field STYLUS 9 + option STYLUS_ABSENT 0 + option STYLUS_PRESENT 1 + end + field SD_CARD 10 + option SD_PRESENT 0 + option SD_ABSENT 1 + end + field WFC 11 + option WFC_ABSENT 0 + option WFC_MIPI_OVTI8856 1 + end + field MB_HDMI 12 + option HDMI_ABSENT 0 + option HDMI_PRESENT 1 + end + field MB_USB 15 + option MB_1C 0 + option MB_1C_2A 1 + end +end + chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" @@ -8,7 +40,7 @@ register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN @@ -110,11 +142,12 @@ register "device_type" = "INTEL_ACPI_CAMERA_CIO2" register "cio2_num_ports" = "1" - register "cio2_lanes_used" = "{2}" # 2 CSI Camera lanes are used + register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0"" register "cio2_prt[0]" = "1" device generic 0 on end end + probe WFC WFC_MIPI_OVTI8856 end device ref cnvi_wifi on chip drivers/wifi/generic @@ -150,7 +183,9 @@ register "key.linux_code" = "SW_PEN_INSERTED" register "key.linux_input_type" = "EV_SW" register "key.label" = ""pen_eject"" - device generic 0 on end + device generic 0 on + probe STYLUS STYLUS_PRESENT + end end end device ref i2c2 on @@ -162,13 +197,13 @@ register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" register "has_power_resource" = "1" - register "ssdb.lanes_used" = "2" + register "ssdb.lanes_used" = "4" register "ssdb.link_used" = "1" register "ssdb.vcm_type" = "0x0C" register "vcm_name" = ""VCM0"" register "num_freq_entries" = "2" - register "link_freq[0]" = "720000000" - register "link_freq[1]" = "360000000" + register "link_freq[0]" = "360000000" + register "link_freq[1]" = "180000000" register "remote_name" = ""IPU0"" #Controls @@ -194,7 +229,9 @@ register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" - device i2c 10 on end + device i2c 36 on + probe WFC WFC_MIPI_OVTI8856 + end end chip drivers/intel/mipi_camera register "acpi_uid" = "3" @@ -205,7 +242,9 @@ register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" register "vcm_compat" = ""dongwoon,dw9714"" - device i2c 0C on end + device i2c 0C on + probe WFC WFC_MIPI_OVTI8856 + end end chip drivers/intel/mipi_camera register "acpi_hid" = "ACPI_DT_NAMESPACE_HID" @@ -222,7 +261,9 @@ register "nvm_width" = "0x10" register "nvm_compat" = ""atmel,24c08"" - device i2c 50 on end + device i2c 50 on + probe WFC WFC_MIPI_OVTI8856 + end end end device ref i2c3 on @@ -353,20 +394,22 @@ register "desc" = ""USB2 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port A1 (DB)"" + register "desc" = ""USB2 Type-A Port A1 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" device ref usb2_port4 on end end chip drivers/usb/acpi register "desc" = ""USB2 WWAN"" register "type" = "UPC_TYPE_INTERNAL" - device ref usb2_port5 on end + device ref usb2_port5 on + probe DB_USB DB_1C_LTE + end end chip drivers/usb/acpi register "desc" = ""USB2 UFC"" @@ -391,20 +434,22 @@ register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A1 (DB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" device ref usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB3 WWAN"" register "type" = "UPC_TYPE_INTERNAL" - device ref usb3_port3 on end + device ref usb3_port3 on + probe DB_USB DB_1C_LTE + end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/74625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cc7be2309483ce016bde57db34af078bd4d46b0 Gerrit-Change-Number: 74625 Gerrit-PatchSet: 7 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/phoenix/Kconfig: Update comment
by Eric Lai (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74734 ) Change subject: soc/amd/phoenix/Kconfig: Update comment ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9671a9228c304988eb3903391f74a21d80d0a8bc Gerrit-Change-Number: 74734 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 03:48:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Documentation/releases/coreboot-4.20: Add toolchain updates section
by Elyes Haouas (Code Review) 25 Apr '23

25 Apr '23

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72621 ) Change subject: Documentation/releases/coreboot-4.20: Add toolchain updates section ...................................................................... Documentation/releases/coreboot-4.20: Add toolchain updates section Change-Id: I5fff8b97f6b85165a71aa2a86417f27986fd25fe Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72621 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com> --- M Documentation/releases/coreboot-4.20-relnotes.md 1 file changed, 23 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved Jason Glenesk: Looks good to me, approved diff --git a/Documentation/releases/coreboot-4.20-relnotes.md b/Documentation/releases/coreboot-4.20-relnotes.md index 34dc406..539d2fd 100644 --- a/Documentation/releases/coreboot-4.20-relnotes.md +++ b/Documentation/releases/coreboot-4.20-relnotes.md @@ -26,6 +26,15 @@ * Remove Yabits payload, Yabits project is deprecated and archived. +### Toolchain updates + +* Upgrade MPC from version 1.2.1 to 1.3.1 +* Upgrade MPFR from version 4.1.1 to 4.2.0 +* Upgrade CMake from version 3.25.0 to 3.26.2 +* Upgrade LLVM from version 15.0.6 to 15.0.7 +* Upgrade GCC from version 11.2.0 to 11.3.0 +* Upgrade binutils from version 2.37 to 2.40 + Additional coreboot changes --------------------------- -- To view, visit https://review.coreboot.org/c/coreboot/+/72621 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5fff8b97f6b85165a71aa2a86417f27986fd25fe Gerrit-Change-Number: 72621 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: security/tpm: Handle S3 resume logging
by Julius Werner (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Tim Crawford, Christian Walter, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74138 ) Change subject: security/tpm: Handle S3 resume logging ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74138/comment/d3765392_7d118019 PS1, Line 10: are reset, so the eventlog needs to be reset too. Uhh... they really shouldn't be. The TPM is supposed to save state (including PCRs) when going into S3 and restore that state on resume. That's what the s3resume argument to tpm_setup() is for. If this doesn't work on your board it's probably a problem with that board that needs to be fixed. I know that it works on our Chromebooks, at least. (I'm not entirely sure who sends the TPM2_Shutdown(STATE) command in that case, whether that comes from some SMM handler or the kernel. If it's the kernel maybe there's some extra driver setting you need to enable to get that to work...) -- To view, visit https://review.coreboot.org/c/coreboot/+/74138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7049bf23fea876cdd19103af6e6fd3d5a20ed114 Gerrit-Change-Number: 74138 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 25 Apr 2023 01:08:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: security/tpm: Handle !cbmem case early
by Julius Werner (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Christian Walter, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74137 ) Change subject: security/tpm: Handle !cbmem case early ...................................................................... Patch Set 1: (3 comments) File src/security/tpm/tspi/log-tpm1.c: https://review.coreboot.org/c/coreboot/+/74137/comment/00192ff8_11a3ecbb PS1, Line 23: if (!cbmem_possibly_online()) Same here File src/security/tpm/tspi/log-tpm2.c: https://review.coreboot.org/c/coreboot/+/74137/comment/e6fc9813_91c1e9d7 PS1, Line 44: if (!cbmem_possibly_online()) Same here File src/security/tpm/tspi/log.c: https://review.coreboot.org/c/coreboot/+/74137/comment/f164f54d_93b151a4 PS1, Line 15: return NULL; Honestly we can probably drop this check completely, I think it propagated here incorrectly from all the refactorings. This function shouldn't get called from any stages that don't have CBMEM. -- To view, visit https://review.coreboot.org/c/coreboot/+/74137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04b50dbb9dd140d349aa54caf3a4a6015526ee18 Gerrit-Change-Number: 74137 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 25 Apr 2023 01:02:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/spi: Mmap 32M/64M flash
by Julius Werner (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74260 ) Change subject: soc/amd/spi: Mmap 32M/64M flash ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/common/block/lpc/spi_map_big.c: https://review.coreboot.org/c/coreboot/+/74260/comment/111d9845_69fcdbba PS7, Line 30: spi_write32(SPI_ROM_PAGE, offset / ROM_MAP_SIZE); I may misunderstand what this does, but I don't think this is safe. It looks like you have a single SPI_ROM_PAGE register that determines what part of the SPI flash is currently mapped in mdev->base? If so, you can't do this. rdev mappings are allowed to be valid concurrently, i.e. it's legal for someone to do ``` uint32_t *a = rdev_mmap(your_rdev, 0, 0x1000); uint32_t *b = rdev_mmap(your_rdev, 0x100000, 0x1000); uint32_t sum = *a + *b; rdev_munmap(a); rdev_munmap(b); ``` I think with your implementation here that would explode? You can't have every mmap() call invalidate the pointer returned by the previous one. If your hardware doesn't support keeping different mappings alive concurrently, you'll have to fall back to memory-backed mappings via mmap_helper like drivers/spi/cbfs_spi.c does. -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 7 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 25 Apr 2023 00:56:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: fmap/region: Call the munmap of access_dev in xlate_windows
by Julius Werner (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Bao Zheng, Jason Glenesk, Aaron Durbin, Furquan Shaikh, Marshall Dawson, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74259 ) Change subject: fmap/region: Call the munmap of access_dev in xlate_windows ...................................................................... Patch Set 1: (1 comment) File src/commonlib/region.c: https://review.coreboot.org/c/coreboot/+/74259/comment/62ed4fba_7c7984e1 PS1, Line 381: xlwindow = &xldev->window_arr[0]; I don't think this is safe. You're just assuming here that the mapping you're trying to unmap comes from the first window, but you do not know that. If you call unmap() on an rdev that didn't actually originally map this pointer to begin with, that could cause bad consequences (I mean maybe it doesn't with the current rdev implementations that use this, but in theory it could). -- To view, visit https://review.coreboot.org/c/coreboot/+/74259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73f2f78d64a521b6da613228339e09065e37be88 Gerrit-Change-Number: 74259 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 25 Apr 2023 00:56:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Configure WLAN
by Eric Lai (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Raul Rangel, Jon Murphy, Tim Van Patten, Mark Hasemeyer. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74113 ) Change subject: mb/google/myst: Configure WLAN ...................................................................... Patch Set 45: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74113 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5059be0bc011978e74ab4245e6ae037aa177ef9b Gerrit-Change-Number: 74113 Gerrit-PatchSet: 45 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 24 Apr 2023 23:55:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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