coreboot-gerrit March 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: spd/lp5: Add new memory part to LP5 list
by John Su (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Frank Wu, John Su, Dtrain Hsu, Eric Lai, Karthik Ramasubramanian. Hello Frank Wu, build bot (Jenkins), Subrata Banik, Dtrain Hsu, Eric Lai, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73489 to look at the new patch set (#4). Change subject: spd/lp5: Add new memory part to LP5 list ...................................................................... spd/lp5: Add new memory part to LP5 list Add MICRON memory part MT62F1G32D2DS-023 and MT62F2G32D4DS-023 to LP5 global list. Attributes are derived from data sheets. Also, regenerate the SPD files for SoC using the newly added parts. BUG=b:271188237 TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M spd/lp5/memory_parts.json M spd/lp5/set-0/parts_spd_manifest.generated.txt M spd/lp5/set-1/parts_spd_manifest.generated.txt 3 files changed, 43 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/73489/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/73489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Gerrit-Change-Number: 73489 Gerrit-PatchSet: 4 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Print `mrc_cache` size in decimal
by Dinesh Gehlot (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Andrey Petrov. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73490 ) Change subject: drivers/intel/fsp2_0: Print `mrc_cache` size in decimal ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69feeb36423e47a5992c9f27d9a7042803a492cd Gerrit-Change-Number: 73490 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Mar 2023 04:22:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Enable SPL fusing on whiterun/winterhold
by Martin L Roth (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Jon Murphy, Jason Glenesk, Karthik Ramasubramanian. Martin L Roth has removed Jason Nien from this change. ( https://review.coreboot.org/c/coreboot/+/72914 ) Change subject: mb/google/skyrim: Enable SPL fusing on whiterun/winterhold ...................................................................... Removed reviewer Jason Nien <jason.nien(a)amd.corp-partner.google.com>. -- To view, visit https://review.coreboot.org/c/coreboot/+/72914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45578597234ba672c89ac421b4626088faca27d5 Gerrit-Change-Number: 72914 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: deleteReviewer

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[S] Change in coreboot[master]: mb/google/skyrim: Enable SPL fusing on whiterun/winterhold
by Martin L Roth (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Jon Murphy, Jason Glenesk, Karthik Ramasubramanian. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72914 ) Change subject: mb/google/skyrim: Enable SPL fusing on whiterun/winterhold ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/72914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45578597234ba672c89ac421b4626088faca27d5 Gerrit-Change-Number: 72914 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 07 Mar 2023 04:11:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/common/psp: Check more error bits before SPL fusing
by Martin L Roth (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73518 ) Change subject: soc/amd/common/psp: Check more error bits before SPL fusing ...................................................................... soc/amd/common/psp: Check more error bits before SPL fusing This adds checks for three more error bits before requesting that the SPL fuses are updated. - While I'm here, I'm adding the include of types.h which was previously done through other include files, but should be done independently. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I87a7d40850c4e9ddbb2d1913c1588a919fdb29d2 --- M src/soc/amd/common/block/psp/psp_gen2.c 1 file changed, 37 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/73518/1 diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c index f7ee5bb..f49b3d4 100644 --- a/src/soc/amd/common/block/psp/psp_gen2.c +++ b/src/soc/amd/common/block/psp/psp_gen2.c @@ -3,6 +3,7 @@ #include <bootstate.h> #include <console/console.h> #include <timer.h> +#include <types.h> #include <amdblocks/psp.h> #include <amdblocks/smn.h> #include "psp_def.h" @@ -12,7 +13,10 @@ #define PSP_MAILBOX_BUFFER_H_OFFSET 0x10578 /* 4 bytes */ #define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */ -#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) +#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) +#define CORE_2_PSP_MSG_38_SPL_FUSE_ERROR BIT(13) +#define CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR BIT(14) +#define CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING BIT(15) union pspv2_mbox_command { u32 val; @@ -131,6 +135,22 @@ return; } + if (c2p38 & CORE_2_PSP_MSG_38_SPL_FUSE_ERROR) { + printk(BIOS_ERR, "PSP: SPL Table does not meet fuse requirements.\n"); + return; + } + + if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR) { + printk(BIOS_ERR, "PSP: Critical SPL entry missing or current firmware does" + " not meet requirements.\n"); + return; + } + + if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING) { + printk(BIOS_ERR, "PSP: Table of critical SPL values is missing.\n"); + return; + } + if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL)) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/73518 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87a7d40850c4e9ddbb2d1913c1588a919fdb29d2 Gerrit-Change-Number: 73518 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/common/psp: Only set SPL fuses if an SPL file is present
by Martin L Roth (Code Review) 06 Mar '23

06 Mar '23

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73517 ) Change subject: soc/amd/common/psp: Only set SPL fuses if an SPL file is present ...................................................................... soc/amd/common/psp: Only set SPL fuses if an SPL file is present Use the presence of an SPL (Software Patch Level) file to trigger the function that reads and writes the SPL fuses. The current Kconfig option will be used to decide to write the fuses. This allows us to see the state of the SPL update bit which determines whether or not SPL fusing is allowed and needed before enabling the fusing. - Refactor a bit to prepare for following changes. - Update phrasing Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I7bd2798b984673a4bd3c72f3cab52f1c9a786c67 --- M src/soc/amd/common/block/psp/psp_gen2.c 1 file changed, 33 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/73517/1 diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c index 65043e5..f7ee5bb 100644 --- a/src/soc/amd/common/block/psp/psp_gen2.c +++ b/src/soc/amd/common/block/psp/psp_gen2.c @@ -116,23 +116,29 @@ static void psp_set_spl_fuse(void *unused) { - if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL)) - return; - int cmd_status = 0; struct mbox_cmd_late_spl_buffer buffer = { .header = { .size = sizeof(buffer) } }; + uint32_t c2p38 = soc_read_c2p38(); - if (soc_read_c2p38() & CORE_2_PSP_MSG_38_FUSE_SPL) { - printk(BIOS_DEBUG, "PSP: Fuse SPL requested\n"); - cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer); - psp_print_cmd_status(cmd_status, NULL); + if (c2p38 & CORE_2_PSP_MSG_38_FUSE_SPL) { + printk(BIOS_DEBUG, "PSP: SPL Fusing may be updated.\n"); } else { - printk(BIOS_DEBUG, "PSP: Fuse SPL not requested\n"); + printk(BIOS_DEBUG, "PSP: SPL Fusing not currently required.\n"); + return; } + + if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL)) + return; + + printk(BIOS_DEBUG, "PSP: SPL Fusing Update Requested.\n"); + cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer); + psp_print_cmd_status(cmd_status, NULL); } +#if CONFIG(HAVE_SPL_FILE) BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_set_spl_fuse, NULL); +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/73517 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7bd2798b984673a4bd3c72f3cab52f1c9a786c67 Gerrit-Change-Number: 73517 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Print `mrc_cache` size in decimal
by Ivy Jian (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Dinesh Gehlot, Andrey Petrov. Ivy Jian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73490 ) Change subject: drivers/intel/fsp2_0: Print `mrc_cache` size in decimal ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69feeb36423e47a5992c9f27d9a7042803a492cd Gerrit-Change-Number: 73490 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Mar 2023 02:55:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/phoenix/acpi: rework C state info table handling
by Eric Lai (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger, Felix Held. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73502 ) Change subject: soc/amd/phoenix/acpi: rework C state info table handling ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f5743dd2e4dfdfeb3ffb2e9b964bdc75c84e6c3 Gerrit-Change-Number: 73502 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 07 Mar 2023 02:54:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/mendocino/acpi: rework C state info table handling
by Eric Lai (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73501 ) Change subject: soc/amd/mendocino/acpi: rework C state info table handling ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3669c66094f0137081888ebdd1af838e2ea269b5 Gerrit-Change-Number: 73501 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 07 Mar 2023 02:53:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Add API to find FSP resource HOB by GUID
by Pratikkumar V Prajapati (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Sridhar Siricilla, Andrey Petrov. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72721 ) Change subject: drivers/intel/fsp2_0: Add API to find FSP resource HOB by GUID ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/72721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ebc9b7d214e5fc731ae45f28e7f5732a7635cbc Gerrit-Change-Number: 72721 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Mar 2023 02:53:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2023