coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: configs/builder/config.ocp.tiogapass: Add CONFIG_BOARD_OCP_TIOGAPASS
by Felix Held (Code Review) 02 Feb '23

02 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72642 ) Change subject: configs/builder/config.ocp.tiogapass: Add CONFIG_BOARD_OCP_TIOGAPASS ...................................................................... configs/builder/config.ocp.tiogapass: Add CONFIG_BOARD_OCP_TIOGAPASS Otherwise configurations in src/mainboard/ocp/tiogapass/Kconfig cannot be selected by make defconfig KBUILD_DEFCONFIG=configs/builder/config.ocp.tiogapass Change-Id: I88d5619269a6a9c09e84061642206a17c91db042 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72642 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang(a)fb.com> --- M configs/builder/config.ocp.tiogapass 1 file changed, 18 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Jonathan Zhang: Looks good to me, approved diff --git a/configs/builder/config.ocp.tiogapass b/configs/builder/config.ocp.tiogapass index 9121431..ec8a191 100644 --- a/configs/builder/config.ocp.tiogapass +++ b/configs/builder/config.ocp.tiogapass @@ -2,6 +2,7 @@ # make defconfig KBUILD_DEFCONFIG=configs/builder/config.ocp.tiogapass CONFIG_VENDOR_OCP=y +CONFIG_BOARD_OCP_TIOGAPASS=y CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_ME_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y -- To view, visit https://review.coreboot.org/c/coreboot/+/72642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88d5619269a6a9c09e84061642206a17c91db042 Gerrit-Change-Number: 72642 Gerrit-PatchSet: 2 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: include/cpu/amd/mtrr: drop unused TOP_MEM_MASK definitions
by Felix Held (Code Review) 02 Feb '23

02 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72649 ) Change subject: include/cpu/amd/mtrr: drop unused TOP_MEM_MASK definitions ...................................................................... include/cpu/amd/mtrr: drop unused TOP_MEM_MASK definitions Neither TOP_MEM_MASK nor TOP_MEM_MASK_KB is used, so drop the two definitions. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I0b2dfb7be27884dffb948876aabb73f99834c281 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72649 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/include/cpu/amd/mtrr.h 1 file changed, 17 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Elyes Haouas: Looks good to me, approved diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index bc3f313..f1b95b6 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -37,9 +37,6 @@ #define TOP_MEM2 0xC001001Dul #endif -#define TOP_MEM_MASK 0x007fffff -#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) - #if !defined(__ASSEMBLER__) #include <cpu/x86/msr.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/72649 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b2dfb7be27884dffb948876aabb73f99834c281 Gerrit-Change-Number: 72649 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/apollolake: Load the IBB into CAR
by Sean Rhodes (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Andrey Petrov. Hello build bot (Jenkins), Andrey Petrov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65577 to look at the new patch set (#31). Change subject: soc/intel/apollolake: Load the IBB into CAR ...................................................................... soc/intel/apollolake: Load the IBB into CAR Copy the IBB into CAR via the CSEs RBP. Test on the StarLite Mk III and Mk IV: Without VBOOT: [DEBUG] CSE: IBB Verification Result: PASS [DEBUG] CSE: IBB Verification Done : YES [DEBUG] CSE: IBB Size : 88 With VBOOT: [DEBUG] CSE: IBB Verification Result: PASS [DEBUG] CSE: IBB Verification Done : YES [DEBUG] CSE: IBB Size : 102 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I0d4e26834cef4c876e37e414b424a031c11111ff --- M src/soc/intel/apollolake/bootblock/bootblock.c 1 file changed, 30 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/65577/31 -- To view, visit https://review.coreboot.org/c/coreboot/+/65577 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d4e26834cef4c876e37e414b424a031c11111ff Gerrit-Change-Number: 65577 Gerrit-PatchSet: 31 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: amdfwtool: Set the level of RIB file as level 2
by Felix Held (Code Review) 02 Feb '23

02 Feb '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72508 ) Change subject: amdfwtool: Set the level of RIB file as level 2 ...................................................................... amdfwtool: Set the level of RIB file as level 2 It is about AB recovery layout which only has level 2. Change-Id: I836f11ca0bf5ad37e5093419465244a5c83318cb Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72508 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M util/amdfwtool/amdfwtool.c 1 file changed, 16 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 3c317de3..2937264 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -329,7 +329,7 @@ { .type = AMD_FW_PSP_SMUSCS, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_RIB, .level = PSP_LVL2 | PSP_BOTH_AB }, + { .type = AMD_RIB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_MPDMA_TF, .level = PSP_BOTH | PSP_BOTH_AB }, { .type = AMD_TA_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, { .type = AMD_FW_GMI3_PHY, .level = PSP_BOTH | PSP_BOTH_AB }, -- To view, visit https://review.coreboot.org/c/coreboot/+/72508 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I836f11ca0bf5ad37e5093419465244a5c83318cb Gerrit-Change-Number: 72508 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: amdfwtool: Add entry RIB whose subprog equals 1
by Felix Held (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Bao Zheng, Jason Glenesk, ritul guru, Zheng Bao, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72507 ) Change subject: amdfwtool: Add entry RIB whose subprog equals 1 ...................................................................... Patch Set 3: (1 comment) File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/72507/comment/8ca8e86d_48557f59 PS2, Line 414: } else if (strcmp(fw_name, "PSP_RIB_FILE") == 0) { > Does this SUB1 often happen? […] from document #55758 Rev. 2.02, Table 21 Sub-Programming Encoding i'd say that family 19h model 70h uses PSP_RIB_FILE_SUB0 and family 19h model 78h PSP_RIB_FILE_SUB1. we'll need to support both, so for consistency i'd use PSP_RIB_FILE_SUB0 instead of PSP_RIB_FILE to be consistent with PSP_RIB_FILE_SUB1 -- To view, visit https://review.coreboot.org/c/coreboot/+/72507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib013f264fc9940ad95e559fe19bba72c06a19625 Gerrit-Change-Number: 72507 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 13:43:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ifdtool: Fix spacing for 10GbE_*
by Lean Sheng Tan (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Felix Singer, Patrick Rudolph, Stefan Reinauer. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68699 ) Change subject: ifdtool: Fix spacing for 10GbE_* ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68699 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie803df6ce9a9772116063ad20bad1c677c3b493c Gerrit-Change-Number: 68699 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Thu, 02 Feb 2023 13:22:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ifdtool: Introduce region_name_fmap
by Lean Sheng Tan (Code Review) 02 Feb '23

02 Feb '23

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68694 ) Change subject: ifdtool: Introduce region_name_fmap ...................................................................... ifdtool: Introduce region_name_fmap Instead of directly accessing the region_name array use a helper function. This allows to move the region name array to a separate file. Change-Id: Ifc810da1628cebd2728d0185502c462ff9428597 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68694 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> --- M util/ifdtool/ifdtool.c 1 file changed, 29 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 61aedf5..98afa4b 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -361,6 +361,16 @@ return region_names[region_type].pretty; } +static const char *region_name_fmap(unsigned int region_type) +{ + if (region_type >= max_regions) { + fprintf(stderr, "Invalid region type.\n"); + exit(EXIT_FAILURE); + } + + return region_names[region_type].fmapname; +} + static const char *region_name_short(unsigned int region_type) { if (region_type >= max_regions) { @@ -1073,7 +1083,7 @@ fmap = (struct fmap *)(image + fmap_loc); for (i = 0; i < max_regions; i++) { - if (region_names[i].fmapname == NULL) + if (region_name_fmap(i) == NULL) continue; region_t region = get_region(frba, i); @@ -1082,7 +1092,7 @@ continue; const struct fmap_area *area = - fmap_find_area(fmap, region_names[i].fmapname); + fmap_find_area(fmap, region_name_fmap(i)); if (!area) continue; -- To view, visit https://review.coreboot.org/c/coreboot/+/68694 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc810da1628cebd2728d0185502c462ff9428597 Gerrit-Change-Number: 68694 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: ifdtool: Add missing chipset_name
by Lean Sheng Tan (Code Review) 02 Feb '23

02 Feb '23

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68693 ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: ifdtool: Add missing chipset_name ...................................................................... ifdtool: Add missing chipset_name Add denverton soc chipset name. Change-Id: I0fd8494123490d6ccc21af2ed30c30d50ddb4e8e Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68693 Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/ifdtool/ifdtool.c 1 file changed, 16 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 350757e..61aedf5 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -96,6 +96,7 @@ "400 series Ice Point", "500 series Tiger Point/ 600 series Alder Point", "C620 series Lewisburg", + "Denverton: C39xx", NULL }; -- To view, visit https://review.coreboot.org/c/coreboot/+/68693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fd8494123490d6ccc21af2ed30c30d50ddb4e8e Gerrit-Change-Number: 68693 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: [EXPERIMENTAL] soc/intel/meteorlake: Test early sign-of-life
by Tarun Tuli (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Jérémy Compostella, Kapil Porwal. Tarun Tuli has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72715 ) Change subject: [EXPERIMENTAL] soc/intel/meteorlake: Test early sign-of-life ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Hi Jeremy, curious how much of this worked? e.g. did the ADL libgfxinit work on MTL? or still to be tested? -- To view, visit https://review.coreboot.org/c/coreboot/+/72715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4c37077b3b3032c861f96231435fcebc7ef36ff Gerrit-Change-Number: 72715 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 13:21:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/prodrive/atlas: retrieve and apply boot-options from SMMSTORE
by build bot (Jenkins) (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Paul Menzel, Christian Walter, Angel Pons, Lean Sheng Tan, David Milosevic. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72459 ) Change subject: mb/prodrive/atlas: retrieve and apply boot-options from SMMSTORE ...................................................................... Patch Set 9: (43 comments) File src/mainboard/prodrive/atlas/boot_options.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/c9796deb_761e5b81 PS9, Line 14: [OPT_HYPERTHREADING ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/10b84332_b31fe880 PS9, Line 15: [OPT_TURBOMODE ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/6bac9e5f_97dd76f3 PS9, Line 16: [OPT_CX ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/7831cde6_a8f4be16 PS9, Line 17: [OPT_CX_LIMIT ] = CX_LIMIT_C8, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/6c92b121_b572161e PS9, Line 19: [OPT_EE_TURBO ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/af648a2f_07fc05c2 PS9, Line 20: [OPT_LLC_DEADLINE ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/4fc657b8_8c5753e0 PS9, Line 21: [OPT_INTEL_VTX ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/d7ef3e2e_4ca50701 PS9, Line 22: [OPT_INTEL_VTD ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/760bd060_37085cf3 PS9, Line 23: [OPT_SECURE_BOOT ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/7207e1b0_92fa2159 PS9, Line 24: [OPT_PXE_RETRIES ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/018f4074_06503d38 PS9, Line 25: [OPT_PWR_G3 ] = PWR_G3_S5, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/44a5eba4_32281ba9 PS9, Line 26: [OPT_PCIE_SSC ] = PCIE_SSC_AUTO, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/78487a8c_b3ee4d1b PS9, Line 27: [OPT_PCIE_SRIS ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/6832ff42_644c59fd PS9, Line 28: [OPT_IBECC ] = false space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/80147673_cf99226c PS9, Line 33: [OPT_HYPERTHREADING ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/32aa6da2_7637c59c PS9, Line 34: [OPT_TURBOMODE ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/0639d7e0_02aef9ce PS9, Line 35: [OPT_CX ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/49ccbb4a_d7b95a0e PS9, Line 36: [OPT_CX_LIMIT ] = CX_LIMIT_C8, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/dbd7bb1d_8de1d41e PS9, Line 38: [OPT_EE_TURBO ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/1b0a8c39_ecc0bc3d PS9, Line 39: [OPT_LLC_DEADLINE ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/7ea2646e_a9fb8622 PS9, Line 40: [OPT_INTEL_VTX ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/4e7707a5_ab922953 PS9, Line 41: [OPT_INTEL_VTD ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/c570bda8_d5e06635 PS9, Line 42: [OPT_SECURE_BOOT ] = true, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/5b2305a7_562045ce PS9, Line 43: [OPT_PXE_RETRIES ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/7d3b3352_a82ccbbb PS9, Line 44: [OPT_PWR_G3 ] = PWR_G3_S5, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/f52b041b_296fd07b PS9, Line 45: [OPT_PCIE_SSC ] = PCIE_SSC_AUTO, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/b8ec11f7_164ac670 PS9, Line 46: [OPT_PCIE_SRIS ] = false, space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/cced501d_7cff5628 PS9, Line 47: [OPT_IBECC ] = false space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/c7cf380d_82d9eeb0 PS9, Line 51: static const char* option_name_lookup_table[OPT_END_ENUM] = { "foo* bar" should be "foo *bar" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/750f4a3d_a2d66a31 PS9, Line 53: [OPT_HYPERTHREADING ] = "Hyperthreading", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/c101c161_797d449d PS9, Line 54: [OPT_TURBOMODE ] = "TurboMode", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/da706004_be0cf1b8 PS9, Line 55: [OPT_CX ] = "Cx", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/d020c27f_7278c753 PS9, Line 56: [OPT_CX_LIMIT ] = "CxLimit", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/ced1c07d_56f9edec PS9, Line 58: [OPT_EE_TURBO ] = "EnergyEfficientTurbo", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/3d5beead_1393ebcf PS9, Line 59: [OPT_LLC_DEADLINE ] = "LLCDeadline", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/5e9cf3f2_5496a73c PS9, Line 60: [OPT_INTEL_VTX ] = "VTX", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/b3c8b688_ce4faa01 PS9, Line 61: [OPT_INTEL_VTD ] = "VTD", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/c7289ae3_7f7aea8e PS9, Line 62: [OPT_SECURE_BOOT ] = "SecBoot", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/fff80167_fb474887 PS9, Line 63: [OPT_PXE_RETRIES ] = "PXERetries", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/854ec4af_11c31122 PS9, Line 64: [OPT_PWR_G3 ] = "PowerstateG3", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/a778984c_d56abaac PS9, Line 65: [OPT_PCIE_SSC ] = "PCIeSSC", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/e2713c96_83d4eb22 PS9, Line 66: [OPT_PCIE_SRIS ] = "PCIeSRIS", space prohibited before that close square bracket ']' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169734): https://review.coreboot.org/c/coreboot/+/72459/comment/ccc2ef08_102db500 PS9, Line 67: [OPT_IBECC ] = "IBECC" space prohibited before that close square bracket ']' -- To view, visit https://review.coreboot.org/c/coreboot/+/72459 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3f8782c38e1477fca03dca9275f2bb65a7059f9 Gerrit-Change-Number: 72459 Gerrit-PatchSet: 9 Gerrit-Owner: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 13:21:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2023