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Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72710/comment/14c10a4a_cf8bfe25
PS2, Line 22:
Cq-Depend: chromium:4170144
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Change subject: amdfwtool: Parse the line with SOC_NAME
......................................................................
amdfwtool: Parse the line with SOC_NAME
We need to put soc name to fw.cfg for future combo feature.
We skip for now when SOC_NAME is found.
1/5
of split changes https://review.coreboot.org/c/coreboot/+/58552/28
Change-Id: I2b8d7154d22db13675ff57b6abe61c747604c524
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/data_parse.c
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
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Patch Set 8:
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169776):
https://review.coreboot.org/c/coreboot/+/72051/comment/93c06d57_01fcf14d
PS8, Line 9: To fix the suspend fail problem, keep the coreboot setting to SSD PCIe
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
......................................................................
mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
To fix the suspend fail problem, keep the coreboot setting to SSD PCIe
using clksrc2, clkreq2 mapping in coreboot and set mapping to clksrc1, clkreq2 in mFIT.
BUG=b:265720813
TEST=build firmware and veirfy suspend function on DUT.
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---
M src/mainboard/google/brya/variants/craask/gpio.c
M src/mainboard/google/brya/variants/craask/overridetree.cb
2 files changed, 23 insertions(+), 3 deletions(-)
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
......................................................................
mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
To fix the suspend fail problem, keep the coreboot setting to SSD PCIe
using clksrc2, clkreq2 mapping in coreboot and set mapping to clksrc1,clkreq2 in mFIT.
BUG=b:265720813
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---
M src/mainboard/google/brya/variants/craask/gpio.c
M src/mainboard/google/brya/variants/craask/overridetree.cb
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72051/comment/8bd04e0f_72e5a628
PS4, Line 8:
> Possible unwrapped commit description (prefer a maximum 72 chars per line)
Please fix.
File src/mainboard/google/brya/variants/craask/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/72051/comment/16acca73_3ef29f05
PS4, Line 448: # design.Due to inconsistency between PMC firmware and FSP, we need to set
> trailing whitespace
Please fix.
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PS5, Line 8:
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
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Change subject: mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
File src/mainboard/google/brya/variants/craask/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/72051/comment/e812803e_5d16e818
PS3, Line 448: # Setting clk_src=2 and clk_req=2 in coreboot,and swap to clk_src=1,clk_req=2 in mFIT
> Can you clarify in the comment - "Due to inconsistency between PMC firmware and FSP, we need to set […]
add the comment here.
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