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Change subject: soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification
......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS4:
> > > unfortunately, I don't see any savings after picking this cl.
> >
> > Are you sure you have the vboot repository up-to-date in your build environment ?
>
> except this CL, all other Cls are now landed in downstream (including coreboot, vboot project). I have picked this CL and performed 20 cycles. I don't see 5ms savings in run to run variation.
I don't what to say because I do. What about the 505-506 interval ? Do you at least observe a saving with that patch ?
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Change subject: mb/hp/compaq_elite_8300_usdt: Add VBT
......................................................................
Patch Set 6: Code-Review+2
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Change subject: mb/hp/compaq_elite_8300_usdt: Add VBT
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/hp/compaq_elite_8300_usdt/Kconfig:
https://review.coreboot.org/c/coreboot/+/79430/comment/c2e2ee63_3303b543 :
PS5, Line 34: config INTEL_GMA_VBT_FILE
> Not needed as this already is the default
Done
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79430?usp=email
to look at the new patch set (#6).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: mb/hp/compaq_elite_8300_usdt: Add VBT
......................................................................
mb/hp/compaq_elite_8300_usdt: Add VBT
Extracted from a system running OEM BIOS v03.08 (latest as of now).
Build-tested and boots Linux (through SeaBIOS).
Command used:
intelvbttool --inlegacy --outvbt data.vbt
Change-Id: Ibd999d30d6e8fea1368afae67f4dc1c3039d3ae1
Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com>
---
M src/mainboard/hp/compaq_elite_8300_usdt/Kconfig
A src/mainboard/hp/compaq_elite_8300_usdt/data.vbt
2 files changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/79430/6
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Change subject: mb/hp/compaq_elite_8300_usdt: Add VBT
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/hp/compaq_elite_8300_usdt/Kconfig:
https://review.coreboot.org/c/coreboot/+/79430/comment/78866610_a5f4d354 :
PS5, Line 34: config INTEL_GMA_VBT_FILE
Not needed as this already is the default
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Change subject: intelmetool: Add PCI ID for TGL-U, ADL-P, ADL-S
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/73972/comment/4f397348_75b30064 :
PS1, Line 7: TGL,ADL
> The patch does not add an exhaustive list of PCI IDs for TGL and ADL. […]
Done
File util/intelmetool/intelmetool.h:
https://review.coreboot.org/c/coreboot/+/73972/comment/c1f6ad3a_0edacfed :
PS1, Line 441: #define PCI_DEVICE_ID_INTEL_TIGERLAKE 0xA0E0 /* Tiger Lake */
: #define PCI_DEVICE_ID_INTEL_ALDERLAKE_P 0x51E0 /* Alder Lake P */
: #define PCI_DEVICE_ID_INTEL_ALDERLAKE_S 0x7AE8 /* Alder Lake S */
> I think that was fixed, would you like to take a look again?
Now when I look at it, those extra IDs are for HECI2/3/4 devices, which typically are not available. My bad. All we need is the include the IDs ending with *_CSE0
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Change subject: soc/intel/apollolake: Create IBB, IBBL and OBB
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Patch Set 25:
(1 comment)
Patchset:
PS25:
> I have been banging my head against a wall because of this recovery mode on a GLK platform and then […]
It looks like I won't be able to boot with IBB loading via CSE/TXE unless I make use of the MEU and friends right? Shame Intel designed it that way. I can at least give it a try.
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Change subject: vendorcode/google/chromeos: Add API for Chromebook Plus check
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Patch Set 4: Code-Review+2
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Change subject: mb/google/rex/var/karis: Enhance CNVi and PCIe switching
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Patch Set 2: Code-Review+2
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Change subject: mb/google/rex/var/karis: Enhance CNVi and PCIe switching
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Patch Set 2:
This change is ready for review.
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