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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78243?usp=email )
Change subject: soc/intel/cse: Add API to check if CSE Firmware update is required
......................................................................
Patch Set 14:
(1 comment)
Patchset:
PS14:
> Done
thanks, i will also take a look and get back with a review.
Till then marking this comment section unresolved
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Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78794?usp=email )
Change subject: mb/google/rex: Avoid hang for pre-prod SoC by setting SAGV_POINTS_0_1_2
......................................................................
mb/google/rex: Avoid hang for pre-prod SoC by setting SAGV_POINTS_0_1_2
Intel has identified an idle hang issue on pre-prod silicon that will
not be fixed or root-caused. To avoid the issue, this commit sets
SaGvWpMask to SAGV_POINTS_0_1_2 in the devicetree.
Note: This change will affect system power.
BUG=b:287170545
TEST=Able to idle for more than 5+ hours without any hang on
google/screebo.
Change-Id: Id0b8db0076d983d336c3bec6d6c33614c69964d1
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78794
Reviewed-by: Kapil Porwal <kapilporwal(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
M src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
2 files changed, 4 insertions(+), 0 deletions(-)
Approvals:
Kapil Porwal: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
index 0835ded..7358eeb 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
@@ -52,6 +52,8 @@
register "cnvi_bt_core" = "true"
register "sagv" = "SAGV_ENABLED"
+ # TODO(b/287170545): workaround avoid DUT random hang
+ register "sagv_wp_bitmap" = "SAGV_POINTS_0_1_2"
register "sagv_freq_mhz[0]" = "3200"
register "sagv_gear[0]" = "4"
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
index 5894fe6..625a36b 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
@@ -49,6 +49,8 @@
register "cnvi_bt_core" = "true"
register "sagv" = "SAGV_ENABLED"
+ # TODO(b/287170545): workaround avoid DUT random hang
+ register "sagv_wp_bitmap" = "SAGV_POINTS_0_1_2"
register "sagv_freq_mhz[0]" = "3200"
register "sagv_gear[0]" = "4"
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Attention is currently required from: David Wu, Eric Lai, Karthik Ramasubramanian, Nick Vaccaro, Reka Norman, Ren Kuo, Subrata Banik, Tyler Wang.
Hello David Wu, Eric Lai, Karthik Ramasubramanian, Nick Vaccaro, Reka Norman, Subrata Banik, Tyler Wang, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/78791?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed:
Code-Review+1 by Ren Kuo, Verified-1 by build bot (Jenkins)
Change subject: mb/google/nissa: Add AUDIO_CONFIG in fw_config
......................................................................
mb/google/nissa: Add AUDIO_CONFIG in fw_config
The codec alc5650 has different setting from other amp codec in
depthcharge. Since nissa has a single shared depthcharge target,
add the fw_config field to allow different audio_configs.
(refer to chromium:4983866)
BUG=b:307410704
TEST=With depthcharge change, set fw_config and gbb flags on craaskana
and check beep sound on firmware screen is workable.
Change-Id: I7446fce57557204d91151f1a31755381c1813c6f
Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/78791/5
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Matt DeVillier has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78831?usp=email )
Change subject: Makefile.inc: Add filter_dupes macro
......................................................................
Abandoned
nod needed; will use makefile sort() instead
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The change is no longer submittable: Code-Review and Verified are unsatisfied now.
Change subject: soc/amd/*: Ensure PSP soft fuse bitmask set properly
......................................................................
soc/amd/*: Ensure PSP soft fuse bitmask set properly
Commit e728766f4596 ("soc/amd/mendocino: Do not load MP2 Firmware when
in RO") added logic to ensure that the MP2 disable soft fuse bit was set
for the RO section, but failed to check if the bit was already set
otherwise (as it is for non-ChromeOS builds). This caused the bit to
appear twice in the PSP_RO_SOFTFUSE_BITS string, and when the string
was converted to a series of numeric values and added together, bit
(n+1) ended up being set instead of bit n.
To mitigate this, use the makefile sort() function to ensure the
PSP_[RO_]SOFTFUSE_BITS string does not contain and duplicates before
the bistmask is calculated. Apply this to all AMD SoC makefiles where
the softfuse bits are added.
TEST=build/boot google/skyrim (frostflow). Use a verbose build (V=1)
to verify that the correct soft fuse value is passed to amdfwtool for
RO and RW_A/B for both ChromeOS and non-ChromeOS builds.
Change-Id: I2e207e20132d44016fbcb986bdfd8e935d8fead5
Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
---
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/genoa/Makefile.inc
M src/soc/amd/glinda/Makefile.inc
M src/soc/amd/mendocino/Makefile.inc
M src/soc/amd/phoenix/Makefile.inc
M src/soc/amd/picasso/Makefile.inc
6 files changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/78823/3
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Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78791?usp=email )
Change subject: mb/google/nissa: Add AUDIO_CONFIG in fw_config
......................................................................
Patch Set 4: Code-Review+1
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I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Code-Review+1 by Ren Kuo, Verified-1 by build bot (Jenkins)
Change subject: mb/google/nissa: Add AUDIO_CONFIG in fw_config
......................................................................
mb/google/nissa: Add AUDIO_CONFIG in fw_config
The codec alc5650 has different setting from other amp codec in
deptcharge.Since nissa has a single shared depthcharge target,
add the fw_config field to allow different audio_configs.
(refer to chromium:4983866)
BUG=b:307410704
TEST=With depthcharge change, set fw_config and gbb flags on craaskana
and check beep sound on firmware screen is workable.
Change-Id: I7446fce57557204d91151f1a31755381c1813c6f
Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/78791/4
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