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Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78648?usp=email )
Change subject: soc/intel/meteorlake: Consolidate settings for enabling tracehub
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
Could we get this code reviewed? This will help us for debug.
thank you 😊
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Change subject: mb/google/brya/var/marasov: Enable wifi sar table for Intel module
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Eric, Kyle please give +2 for landing this CL
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Change subject: mb/google/brya/var/marasov: Enable wifi sar table for Intel module
......................................................................
Patch Set 3: Code-Review+2
(2 comments)
File src/mainboard/google/brya/variants/marasov/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/78310/comment/21c1dbaa_3a47b744 :
PS2, Line 20: option WIFI_SAR_ID_0 0
> In our project, "WIFI_SAR_ID_0" is for MTK wifi module and "WIFI_SAR_ID_1" is for Intel wifi module. […]
Acknowledged
File src/mainboard/google/brya/variants/marasov/variant.c:
https://review.coreboot.org/c/coreboot/+/78310/comment/2233d6db_7efe4ca8 :
PS2, Line 13: printk(BIOS_INFO, "Use wifi_sar_1.hex.\n");
> This is just to print information to know when we used for Intel wifi module AX211NGW.
> If you have concern that we don't need this msg, I can remove it.
lets keep it in that way
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Hello Arthur Heymans, Julius Werner, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: commonlib: Add GCD function
......................................................................
commonlib: Add GCD function
Implement a simple GCD function.
BUG=b:307790895
TEST=emerge-geralt coreboot
TEST=make tests/commonlib/bsd/gcd-test
Change-Id: I21819cda4299b3809b8ca7a95cbdc6a87e4b3481
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/commonlib/Makefile.inc
A src/commonlib/bsd/gcd.c
A src/commonlib/bsd/include/commonlib/bsd/gcd.h
M tests/commonlib/bsd/Makefile.inc
A tests/commonlib/bsd/gcd-test.c
5 files changed, 55 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/78798/4
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Change subject: arch/arm64/arch_timer: Fix possible overflow in multiplication
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS3:
> Would be great if you could also add a patch to fix this in libpayload!
CB:78888
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Change subject: commonlib: Add GCD function
......................................................................
Patch Set 3:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78798/comment/588a39a0_aa98441a :
PS2, Line 7: lib: Add GCD function
> path is no longer "lib"
Done
Patchset:
PS2:
> Can we add some tests?
Done
File src/commonlib/bsd/gcd.c:
https://review.coreboot.org/c/coreboot/+/78798/comment/64b31191_c4218a1d :
PS2, Line 6: unsigned long gcd(unsigned long a, unsigned long b)
> Looks like all the use cases we have are 32-bit and on x86 doing this at 64-bit would be expensive, […]
gcd32 sounds good to me
https://review.coreboot.org/c/coreboot/+/78798/comment/ade8c89d_9ba0d1a7 :
PS2, Line 10: if (a == 0 || b == 0)
> Shouldn't we just let these cases run into the divide-by-zero? I wouldn't consider asking for the GC […]
Done.
https://review.coreboot.org/c/coreboot/+/78798/comment/4984ad14_e1c410c0 :
PS2, Line 12: if (a < b)
> I think writing this explicitly is unnecessary. […]
Removed
File src/commonlib/bsd/include/commonlib/bsd/gcd.h:
https://review.coreboot.org/c/coreboot/+/78798/comment/aaa9d894_c14a56fa :
PS2, Line 3: #ifndef __GCD_H__
> nit: Include guards should include the COMMONLIB_BSD somewhere so that there won't be any clashes in […]
Done
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Change subject: libpayload/libc/time: Fix possible overflow in multiplication
......................................................................
libpayload/libc/time: Fix possible overflow in multiplication
The value from raw_read_cntfrq_el0() could be large enough to cause
overflow when multiplied by 1000000. To prevent this, both 1000000 and
hz can be reduced by dividing them by their GCD.
BUG=b:307790895
TEST=boot to kernel and check the timestamps from `cbmem`
Change-Id: Ia55532490651fcf47128b83a8554751f050bcc89
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M payloads/libpayload/libc/time.c
1 file changed, 12 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/78888/1
diff --git a/payloads/libpayload/libc/time.c b/payloads/libpayload/libc/time.c
index 6780008..b6be116 100644
--- a/payloads/libpayload/libc/time.c
+++ b/payloads/libpayload/libc/time.c
@@ -33,6 +33,7 @@
#define __STDC_FORMAT_MACROS
+#include <commonlib/bsd/gcd.h>
#include <libpayload-config.h>
#include <libpayload.h>
#if CONFIG(LP_ARCH_X86) && CONFIG(LP_NVRAM)
@@ -171,6 +172,8 @@
u64 timer_us(u64 base)
{
static u64 hz;
+ static u32 mult;
+ u32 div;
// Only check timer_hz once. Assume it doesn't change.
if (hz == 0) {
@@ -180,7 +183,15 @@
"must be at least 1MHz.\n", hz);
halt();
}
+ mult = 1000000;
+ /*
+ * Bits[63:32] of CNTFRQ_EL0 are reserved. So it is safe to cast
+ * hz to uint32_t.
+ */
+ div = gcd32(hz, mult);
+ hz /= div;
+ mult /= div;
}
- return (1000000 * timer_raw_value()) / hz - base;
+ return (mult * timer_raw_value()) / hz - base;
}
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Hello Arthur Heymans, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
The following approvals got outdated and were removed:
Code-Review+2 by Julius Werner
Change subject: arch/arm64/arch_timer: Fix possible overflow in multiplication
......................................................................
arch/arm64/arch_timer: Fix possible overflow in multiplication
The value from raw_read_cntfrq_el0() could be large enough to cause
overflow when multiplied by 1000000. To prevent this, both 1000000 and
tfreq can be reduced by dividing them by their GCD.
BUG=b:307790895
TEST=emerge-geralt coreboot
TEST=boot to kernel and check the timestamps from `cbmem`
Change-Id: I366667de05392913150414f0fa9058725be71c52
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/arch/arm64/arch_timer.c
1 file changed, 20 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/78800/4
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The change is no longer submittable: Code-Review and Verified are unsatisfied now.
Change subject: Use common GCD function
......................................................................
Use common GCD function
Change-Id: I30e4b02a9ca6a15c9bc4edcf4143ffa13a21a732
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/drivers/analogix/anx7625/anx7625.c
M src/northbridge/intel/ironlake/quickpath.c
M src/soc/rockchip/rk3288/clock.c
M src/soc/rockchip/rk3399/clock.c
4 files changed, 11 insertions(+), 59 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/78799/3
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