coreboot-gerrit October 2023

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[S] Change in coreboot[master]: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function
by Rex Chou (Code Review) 06 Oct '23

06 Oct '23

Rex Chou has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78263?usp=email ) Change subject: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/78263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Gerrit-Change-Number: 78263 Gerrit-PatchSet: 2 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: abandon

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[S] Change in coreboot[main]: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function
by Rex Chou (Code Review) 06 Oct '23

06 Oct '23

Rex Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78147?usp=email ) Change subject: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function ...................................................................... mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function Modify GPIOs based on schematics and confirm with EE to remove TOF function. BUG=b:290891557 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/craaskov/gpio.c 1 file changed, 4 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/78147/1 diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c index f3ed2c5..8b1446d 100644 --- a/src/mainboard/google/brya/variants/craaskov/gpio.c +++ b/src/mainboard/google/brya/variants/craaskov/gpio.c @@ -11,10 +11,10 @@ PAD_NC(GPP_A21, NONE), /* A21 : GPP_A22 ==> NC */ PAD_NC(GPP_A22, NONE), - /* B5 : I2C2_SDA ==> TOF_I2C_DAT */ - PAD_CFG_NF_LOCK(GPP_B5, NONE, NF1, LOCK_CONFIG), - /* B6 : I2C2_SCL ==> TOF_I2C_CLK */ - PAD_CFG_NF_LOCK(GPP_B6, NONE, NF1, LOCK_CONFIG), + /* B5 : GPP_B5 ==> NC */ + PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG), + /* B6 : GPP_B6 ==> NC */ + PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG), /* D3 : ISH_GP3 ==> NC */ PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), /* D8 : SRCCLKREQ3# ==> NC */ @@ -37,8 +37,6 @@ PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG), /* H13 : UART0_CTS# ==> NC */ PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG), - /* H19 : SRCCLKREQ4# ==> TOF_INT# */ - PAD_CFG_GPI_INT(GPP_H19, NONE, PLTRST, EDGE_BOTH), /* H22 : IMGCLKOUT3 ==> NC */ PAD_NC(GPP_H22, NONE), /* R6 : DMIC_CLK_A_1A ==> NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/78147?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Gerrit-Change-Number: 78147 Gerrit-PatchSet: 1 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function
by Rex Chou (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Chen-Tsung Hsieh, Derek Huang, Dtrain Hsu, Ian Feng, Kenny Pan, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik. Hello Chen-Tsung Hsieh, Derek Huang, Dtrain Hsu, Ian Feng, Kenny Pan, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78263?usp=email to look at the new patch set (#2). Change subject: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function ...................................................................... mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function Modify GPIOs based on schematics and confirm with EE to remove TOF function. BUG=b:290891557 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/craaskov/gpio.c 1 file changed, 4 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/78263/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Gerrit-Change-Number: 78263 Gerrit-PatchSet: 2 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function
by Rex Chou (Code Review) 06 Oct '23

06 Oct '23

Rex Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78263?usp=email ) Change subject: mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function ...................................................................... mb/google/nissa/var/craaskov: Modify GPIOs to remove TOF function Modify GPIOs based on schematics and confirm with EE to remove TOF function. BUG=b:290891557 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 --- M src/mainboard/google/brya/variants/craaskov/gpio.c 1 file changed, 4 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/78263/1 diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c index f3ed2c5..8b1446d 100644 --- a/src/mainboard/google/brya/variants/craaskov/gpio.c +++ b/src/mainboard/google/brya/variants/craaskov/gpio.c @@ -11,10 +11,10 @@ PAD_NC(GPP_A21, NONE), /* A21 : GPP_A22 ==> NC */ PAD_NC(GPP_A22, NONE), - /* B5 : I2C2_SDA ==> TOF_I2C_DAT */ - PAD_CFG_NF_LOCK(GPP_B5, NONE, NF1, LOCK_CONFIG), - /* B6 : I2C2_SCL ==> TOF_I2C_CLK */ - PAD_CFG_NF_LOCK(GPP_B6, NONE, NF1, LOCK_CONFIG), + /* B5 : GPP_B5 ==> NC */ + PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG), + /* B6 : GPP_B6 ==> NC */ + PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG), /* D3 : ISH_GP3 ==> NC */ PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), /* D8 : SRCCLKREQ3# ==> NC */ @@ -37,8 +37,6 @@ PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG), /* H13 : UART0_CTS# ==> NC */ PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG), - /* H19 : SRCCLKREQ4# ==> TOF_INT# */ - PAD_CFG_GPI_INT(GPP_H19, NONE, PLTRST, EDGE_BOTH), /* H22 : IMGCLKOUT3 ==> NC */ PAD_NC(GPP_H22, NONE), /* R6 : DMIC_CLK_A_1A ==> NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/78263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443 Gerrit-Change-Number: 78263 Gerrit-PatchSet: 1 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: commonlib/bsd/cbfs_serialized.h: Use C99 flexible arrays
by Kyösti Mälkki (Code Review) 06 Oct '23

06 Oct '23

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76786?usp=email ) Change subject: commonlib/bsd/cbfs_serialized.h: Use C99 flexible arrays ...................................................................... Patch Set 3: (1 comment) File src/commonlib/bsd/include/commonlib/bsd/cbfs_serialized.h: https://review.coreboot.org/c/coreboot/+/76786/comment/cc72bbb9_00261ccb : PS3, Line 63: uint32_t pad[]; Future CB:78239 reverts this case. -- To view, visit https://review.coreboot.org/c/coreboot/+/76786?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00807a435a21e078c89f797cfd0b00d03604ea0e Gerrit-Change-Number: 76786 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 05:47:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: cbfs: Restore 32-bit padding in cbfs_header
by Kyösti Mälkki (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Elyes Haouas, Ivan Jager. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78239?usp=email ) Change subject: cbfs: Restore 32-bit padding in cbfs_header ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78239?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4199dcc4823469c5986ac967a55b1c85cc62f780 Gerrit-Change-Number: 78239 Gerrit-PatchSet: 1 Gerrit-Owner: Ivan Jager Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ivan Jager Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 06 Oct 2023 05:46:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Add wait for HPD function
by Joey Peng (Code Review) 06 Oct '23

06 Oct '23

Joey Peng has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78262?usp=email ) Change subject: mb/google/dedede/var/boxy: Add wait for HPD function ...................................................................... Abandoned Will submit to main branch -- To view, visit https://review.coreboot.org/c/coreboot/+/78262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I208fdf8234886b2ef43a4b972e6682892238e8e9 Gerrit-Change-Number: 78262 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Warn about slow PCIe downstream devices
by Kyösti Mälkki (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78229?usp=email ) Change subject: sb/intel/bd82x6x: Warn about slow PCIe downstream devices ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/southbridge/intel/bd82x6x/pcie.c: https://review.coreboot.org/c/coreboot/+/78229/comment/b8c08f00_d2056238 : PS2, Line 242: if ((pci_read_config16(dev, cap + PCI_EXP_SLTSTA) & PCI_EXP_SLTSTA_PDS) && For PCH, if we followed the specs and had cleared SI=0, we would always read PDS=1, and the message below saying a downstream device is present is incorrect. If this was moved to common code, SLTSTA probably should not be read at all if SI=0. -- To view, visit https://review.coreboot.org/c/coreboot/+/78229?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86b498b89d672b239d9951e116dc3680030666a6 Gerrit-Change-Number: 78229 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 05:35:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/dedede/var/boxy: Add wait for HPD function
by Joey Peng (Code Review) 06 Oct '23

06 Oct '23

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78146?usp=email ) Change subject: mb/google/dedede/var/boxy: Add wait for HPD function ...................................................................... mb/google/dedede/var/boxy: Add wait for HPD function Boxy project need to wait for HPD ready to continue boot in ramstage to avoid no display in DEV screen and recovery screen BUG=b:303346324 TEST=Both type-c ports can display in DEV screen and recovery screen Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: I208fdf8234886b2ef43a4b972e6682892238e8e9 --- M src/mainboard/google/dedede/variants/boxy/ramstage.c 1 file changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/78146/1 diff --git a/src/mainboard/google/dedede/variants/boxy/ramstage.c b/src/mainboard/google/dedede/variants/boxy/ramstage.c index c317d3b..2700c8e 100644 --- a/src/mainboard/google/dedede/variants/boxy/ramstage.c +++ b/src/mainboard/google/dedede/variants/boxy/ramstage.c @@ -1,7 +1,17 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <bootmode.h> +#include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <console/console.h> +#include <delay.h> +#include <ec/google/chromeec/ec.h> +#include <gpio.h> +#include <intelblocks/gpio.h> +#include <timer.h> +#define GPIO_USB_C0_HPD GPP_B23 +#define GPIO_USB_C1_HPD GPP_A16 /* * Psys_pmax considerations * @@ -22,6 +32,25 @@ * and the Psys_pmax setting is 120W. Then IMVP9.1 can calculate the current system * power = 120W * 5A / 6.009A = 100W, which is the actual system power. */ + +static void wait_for_hpd(gpio_t gpio, long timeout) +{ + struct stopwatch sw; + + printk(BIOS_INFO, "Waiting for HPD\n"); + stopwatch_init_msecs_expire(&sw, timeout); + while (!gpio_get(gpio)) { + if (stopwatch_expired(&sw)) { + printk(BIOS_WARNING, + "HPD not ready after %ldms. Abort.\n", timeout); + return; + } + mdelay(200); + } + printk(BIOS_INFO, "HPD ready after %ld ms\n", + stopwatch_duration_msecs(&sw)); +} + const struct psys_config psys_config = { .efficiency = 97, .psys_imax_ma = 6009, @@ -31,5 +60,21 @@ void variant_devtree_update(void) { + static const long display_timeout_ms = 3000; + + if (display_init_required() + && !gpio_get(GPIO_USB_C0_HPD)) { + /* This has to be done before FSP-S runs. */ + if (google_chromeec_wait_for_displayport(display_timeout_ms)){ + wait_for_hpd(GPIO_USB_C0_HPD, display_timeout_ms); + } + } + else if (display_init_required() + && !gpio_get(GPIO_USB_C1_HPD)) { + /* This has to be done before FSP-S runs. */ + if (google_chromeec_wait_for_displayport(display_timeout_ms)){ + wait_for_hpd(GPIO_USB_C1_HPD, display_timeout_ms); + } + } variant_update_psys_power_limits(&psys_config); } -- To view, visit https://review.coreboot.org/c/coreboot/+/78146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I208fdf8234886b2ef43a4b972e6682892238e8e9 Gerrit-Change-Number: 78146 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Add wait for HPD function
by Joey Peng (Code Review) 06 Oct '23

06 Oct '23

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78262?usp=email ) Change subject: mb/google/dedede/var/boxy: Add wait for HPD function ...................................................................... mb/google/dedede/var/boxy: Add wait for HPD function Boxy project need to wait for HPD ready to continue boot in ramstage to avoid no display in DEV screen and recovery screen BUG=b:303346324 TEST=Both type-c ports can display in DEV screen and recovery screen Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: I208fdf8234886b2ef43a4b972e6682892238e8e9 --- M src/mainboard/google/dedede/variants/boxy/ramstage.c 1 file changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/78262/1 diff --git a/src/mainboard/google/dedede/variants/boxy/ramstage.c b/src/mainboard/google/dedede/variants/boxy/ramstage.c index c317d3b..2700c8e 100644 --- a/src/mainboard/google/dedede/variants/boxy/ramstage.c +++ b/src/mainboard/google/dedede/variants/boxy/ramstage.c @@ -1,7 +1,17 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <bootmode.h> +#include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <console/console.h> +#include <delay.h> +#include <ec/google/chromeec/ec.h> +#include <gpio.h> +#include <intelblocks/gpio.h> +#include <timer.h> +#define GPIO_USB_C0_HPD GPP_B23 +#define GPIO_USB_C1_HPD GPP_A16 /* * Psys_pmax considerations * @@ -22,6 +32,25 @@ * and the Psys_pmax setting is 120W. Then IMVP9.1 can calculate the current system * power = 120W * 5A / 6.009A = 100W, which is the actual system power. */ + +static void wait_for_hpd(gpio_t gpio, long timeout) +{ + struct stopwatch sw; + + printk(BIOS_INFO, "Waiting for HPD\n"); + stopwatch_init_msecs_expire(&sw, timeout); + while (!gpio_get(gpio)) { + if (stopwatch_expired(&sw)) { + printk(BIOS_WARNING, + "HPD not ready after %ldms. Abort.\n", timeout); + return; + } + mdelay(200); + } + printk(BIOS_INFO, "HPD ready after %ld ms\n", + stopwatch_duration_msecs(&sw)); +} + const struct psys_config psys_config = { .efficiency = 97, .psys_imax_ma = 6009, @@ -31,5 +60,21 @@ void variant_devtree_update(void) { + static const long display_timeout_ms = 3000; + + if (display_init_required() + && !gpio_get(GPIO_USB_C0_HPD)) { + /* This has to be done before FSP-S runs. */ + if (google_chromeec_wait_for_displayport(display_timeout_ms)){ + wait_for_hpd(GPIO_USB_C0_HPD, display_timeout_ms); + } + } + else if (display_init_required() + && !gpio_get(GPIO_USB_C1_HPD)) { + /* This has to be done before FSP-S runs. */ + if (google_chromeec_wait_for_displayport(display_timeout_ms)){ + wait_for_hpd(GPIO_USB_C1_HPD, display_timeout_ms); + } + } variant_update_psys_power_limits(&psys_config); } -- To view, visit https://review.coreboot.org/c/coreboot/+/78262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I208fdf8234886b2ef43a4b972e6682892238e8e9 Gerrit-Change-Number: 78262 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2023