coreboot-gerrit October 2023

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[M] Change in coreboot[main]: [WIP]sb/intel/i82801ix: Support CFR
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78283?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: [WIP]sb/intel/i82801ix: Support CFR ...................................................................... [WIP]sb/intel/i82801ix: Support CFR Add CFR for i82801ix to test CFR on qemu Q35. Test: The CFR firmware menu allows to change southbridge options. Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/i82801ix/Makefile.inc A src/southbridge/intel/i82801ix/cfr.c 2 files changed, 60 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/78283/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78283?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Gerrit-Change-Number: 78283 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: ec/starlabs/merlin: Add CFR support
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Sean Rhodes. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78296?usp=email ) Change subject: ec/starlabs/merlin: Add CFR support ...................................................................... ec/starlabs/merlin: Add CFR support Change-Id: Ie98dc122721f0ddfbda033b46a265018f2dc4573 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/ec/starlabs/merlin/Makefile.inc A src/ec/starlabs/merlin/cfr.c 2 files changed, 104 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/78296/1 diff --git a/src/ec/starlabs/merlin/Makefile.inc b/src/ec/starlabs/merlin/Makefile.inc index ac0d5e3..8fd28cb 100644 --- a/src/ec/starlabs/merlin/Makefile.inc +++ b/src/ec/starlabs/merlin/Makefile.inc @@ -34,4 +34,6 @@ all-y += nuvoton.c +ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c + endif diff --git a/src/ec/starlabs/merlin/cfr.c b/src/ec/starlabs/merlin/cfr.c new file mode 100644 index 0000000..2915af225 --- /dev/null +++ b/src/ec/starlabs/merlin/cfr.c @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/option/cfr.h> +#include <inttypes.h> +#include <types.h> + +static const struct sm_enum_value kbl_timeout_values[] = { + {"30 seconds", 0}, + {"1 minute", 1}, + {"3 minutes", 2}, + {"5 minutes", 3}, + {"Never", 4}, + SM_ENUM_VALUE_END, +}; + +static const struct sm_object kbl_timeout = SM_DECLARE_ENUM({ + .opt_name = "kbl_timeout", + .ui_name = "Keyboard Backlight Timeout", + .ui_helptext = "Set the amount of time before the keyboard backlight turns off when un-used", + .default_value = 0, + .values = kbl_timeout_values, +}); + +static const struct sm_enum_value fan_mode_values[] = { + {"Normal", 0}, + {"Aggressive", 1}, + {"Quiet", 2}, + SM_ENUM_VALUE_END, +}; + +static const struct sm_object fan_mode = SM_DECLARE_ENUM({ + .opt_name = "fan_mode", + .ui_name = "Fan Mode", + .ui_helptext = "Adjust the fan curve to priotise performance or noise levels.", + .default_value = 1, + .values = fan_mode_values, +}); + +static const struct sm_enum_value max_charge_values[] = { + {"100%", 0}, + {"80%", 1}, + {"60%", 2}, + SM_ENUM_VALUE_END, +}; + +static const struct sm_object max_charge = SM_DECLARE_ENUM({ + .opt_name = "max_charge", + .ui_name = "Maximum Charge Level", + .ui_helptext = "Set the maximum level the battery will charge to.", + .default_value = 0, + .values = max_charge_values, +}); + +static const struct sm_object fast_charge = SM_DECLARE_BOOL({ + .flags = (CONFIG(EC_STARLABS_FAST_CHARGE) && + CONFIG(EC_STARLABS_NUVOTON)) ? + 0 : CFR_OPTFLAG_SUPPRESS; + .opt_name = "fast_charge", + .ui_name = "Fast Charge", + .ui_helptext = "Charge the battery faster at the cost of heat and battery wear.", + .default_value = false, +}); + +static const struct sm_object fn_ctrl_swap = SM_DECLARE_BOOL({ + .opt_name = "fn_ctrl_swap", + .ui_name = "Fn Ctrl Reverse", + .ui_helptext = "Swap the functions of the [Fn] and [Ctrl] keys", + .default_value = false, +}); + +static const struct sm_object mirror_flag = SM_DECLARE_BOOL({ + .flags = (CONFIG(EC_STARLABS_MIRROR_SUPPORT) && + !CONFIG(DRIVERS_INTEL_USB4_RETIMER)) ? + 0 : CFR_OPTFLAG_SUPPRESS; + .opt_name = "mirror_flag", + .ui_name = "Mirror Flag", + .ui_helptext = "Use the mirror flag to automatically update the EC firmware from coreboot.", + .default_value = false, +}); + +static const struct sm_object mirror_flag_counter = SM_DECLARE_NUMBER({ + .flags = CONFIG(EC_STARLABS_MIRROR_SUPPORT) ? + 0 : CFR_OPTFLAG_SUPPRESS; + .opt_name = "mirror_flag_counter", + .ui_name = "Mirror Flag Counter", + .flags = CFR_OPTFLAG_SUPPRESS, + .default_value = 0, +}); + +static const __cfr_form struct sm_obj_form ec_options = { + .ui_name = "Embedded Controller", + .obj_list = (const struct sm_object *[]) { + &fan_mode, + &max_charge, + &fast_charge, + &kbl_timeout, + &fn_ctrl_swap, + &mirror_flag, + &mirror_flag_counter, + NULL + }, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/78296?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie98dc122721f0ddfbda033b46a265018f2dc4573 Gerrit-Change-Number: 78296 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: sb/intel/common/spi: Fix I/O alignment
by Kyösti Mälkki (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Angel Pons, Felix Held, Patrick Rudolph, Paul Menzel. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78090?usp=email ) Change subject: sb/intel/common/spi: Fix I/O alignment ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id05b1a080911b71b94ef781c6e26d98165f02f67 Gerrit-Change-Number: 78090 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 07:13:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x/pcie: Use defines
by Kyösti Mälkki (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78293?usp=email ) Change subject: sb/intel/bd82x6x/pcie: Use defines ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78293?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie8fc7cc863017da07dd3ed37b487dae18de92b18 Gerrit-Change-Number: 78293 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 10 Oct 2023 07:11:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Improve SLCAP
by Kyösti Mälkki (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78228?usp=email ) Change subject: sb/intel/bd82x6x: Improve SLCAP ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03aeb0a1ff0041901acc20fe700d3f7995d22366 Gerrit-Change-Number: 78228 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 10 Oct 2023 07:08:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: include/stddef: define SIZE_MAX
by Patrick Georgi (Code Review) 10 Oct '23

10 Oct '23

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78269?usp=email ) Change subject: include/stddef: define SIZE_MAX ...................................................................... include/stddef: define SIZE_MAX It's needed for future work. Change-Id: I3419d11072bc0e3791ad08144c2a25c607550f28 Signed-off-by: Patrick Georgi <patrick(a)coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78269 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/include/stddef.h 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Julius Werner: Looks good to me, approved Kyösti Mälkki: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/include/stddef.h b/src/include/stddef.h index 484017d..82d38c3 100644 --- a/src/include/stddef.h +++ b/src/include/stddef.h @@ -7,6 +7,7 @@ typedef __PTRDIFF_TYPE__ ptrdiff_t; typedef __SIZE_TYPE__ size_t; +#define SIZE_MAX __SIZE_MAX__ /* There is a GCC macro for a size_t type, but not * for a ssize_t type. Below construct tricks GCC * into making __SIZE_TYPE__ signed. -- To view, visit https://review.coreboot.org/c/coreboot/+/78269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3419d11072bc0e3791ad08144c2a25c607550f28 Gerrit-Change-Number: 78269 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: [WIP]sb/intel/i82801ix: Support CFR
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78283?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: [WIP]sb/intel/i82801ix: Support CFR ...................................................................... [WIP]sb/intel/i82801ix: Support CFR Add CFR for i82801ix to test CFR on qemu Q35. Test: The CFR firmware menu allows to change southbridge options. Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/i82801ix/Makefile.inc A src/southbridge/intel/i82801ix/cfr.c 2 files changed, 60 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/78283/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78283?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Gerrit-Change-Number: 78283 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: [WIP]drivers/option/cfr: Collect CFR forms generated at compile time
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78240?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [WIP]drivers/option/cfr: Collect CFR forms generated at compile time ...................................................................... [WIP]drivers/option/cfr: Collect CFR forms generated at compile time Add CFR forms not passed as argument, but those present in ramstage. Change-Id: Ia5bcc42b5098a019bdf1c28cb5ebdfba2a3ff3f0 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/option/cfr.c M src/drivers/option/cfr.h M src/include/boot/coreboot_tables.h M src/lib/coreboot_table.c M src/lib/program.ld 5 files changed, 50 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/78240/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78240?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5bcc42b5098a019bdf1c28cb5ebdfba2a3ff3f0 Gerrit-Change-Number: 78240 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: [RFC] drivers/option: Add option list in cbtables
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Lean Sheng Tan, Maximilian Brune, Nico Huber, Patrick Rudolph, Sean Rhodes. Patrick Rudolph has uploaded a new patch set (#15) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [RFC] drivers/option: Add option list in cbtables ...................................................................... [RFC] drivers/option: Add option list in cbtables TODO: add proper documentation, add tests. Introduce a mechanism so that coreboot can provide a list of options to post-coreboot code. This can be used to let payloads know which options should be displayed in a setup menu, for instance. Although this system was written to be used with edk2, it has been designed with flexibility in mind so that other payloads can also make use of this mechanism. The system currently lacks a way to describe where to find option values. This information is stored in a set of data structures specifically created for this purpose. This format is known as CFR, which means "coreboot forms representation" or "cursed forms representation". Although the "forms representation" is borrowed from UEFI, CFR can be used in non-UEFI scenarios as well. The data structures are implemented as an extension of cbtables records to support nesting. It should not break backwards compatibility because the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children records. The concept of record nesting is borrowed from the records for CMOS options. It is not possible to reuse the CMOS records because they are too closely coupled with CMOS options; using these structures would needlessly restrict more capable backends to what can be done with CMOS options, which is undesired. Because CFR supports variable-length components, directly transforming options into CFR structures is not a trivial process. Furthermore, CFR structures need to be written in one go. Because of this, abstractions exist to generate CFR structures from a set of "setup menu" structures that are coreboot-specific and could be integrated with the devicetree at some point. Note that `struct sm_object` is a tagged union. This is used to have lists of options in an array, as building linked lists of options at runtime is extremely impractical because options would have to be added at the end of the linked list to maintain option order. To avoid mistakes defining `struct sm_object` values, helper macros exist for supported option types. The macros also provide some type checking as they initialise specific union members. It should be possible to extend CFR to support additional functionality such as being able to describe dependencies between options, or support for more sophisticated options like fan curve points. However, this may require having a version field in the CFR root record to avoid problems with CFR consumers that do not support these extensions. Feedback about this is highly appreciated. Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- A src/drivers/option/Kconfig A src/drivers/option/Makefile.inc A src/drivers/option/cfr.c A src/drivers/option/cfr.h 4 files changed, 433 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/74121/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 15 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Improve SLCAP
by Patrick Rudolph (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Kyösti Mälkki. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78228?usp=email ) Change subject: sb/intel/bd82x6x: Improve SLCAP ...................................................................... Patch Set 5: (1 comment) File src/southbridge/intel/bd82x6x/pcie.c: https://review.coreboot.org/c/coreboot/+/78228/comment/cae254ad_77ad1f4b : PS4, Line 142: * PCI device enumeration hasn't started yet, thus any downstream devide here > > `'devide' may be misspelled - perhaps 'divide'?` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03aeb0a1ff0041901acc20fe700d3f7995d22366 Gerrit-Change-Number: 78228 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 10 Oct 2023 06:33:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit October 2023