coreboot-gerrit October 2023

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[S] Change in coreboot[main]: util/amdfwtool: Check for pkg-config presence
by Felix Held (Code Review) 10 Oct '23

10 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78191?usp=email ) Change subject: util/amdfwtool: Check for pkg-config presence ...................................................................... util/amdfwtool: Check for pkg-config presence Check for pkg-config presence and fail out with actionable message. BUG=b:302521446 TEST=Build successfully with working pkg-config and failed build with no pkg-config Change-Id: I5d604145c919e7f71680d1e095dc68cb21868319 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78191 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M util/amdfwtool/Makefile M util/amdfwtool/Makefile.inc 2 files changed, 8 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/util/amdfwtool/Makefile b/util/amdfwtool/Makefile index e9bc1ab..9392f02 100644 --- a/util/amdfwtool/Makefile +++ b/util/amdfwtool/Makefile @@ -14,7 +14,7 @@ HEADER=amdfwtool.h TARGETS = amdfwread amdfwtool WERROR=-Werror -CFLAGS=-O2 -Wall -Wextra -Wshadow ${WERROR} +CFLAGS :=-O2 -Wall -Wextra -Wshadow ${WERROR} CFLAGS += -I $(top)/src/commonlib/bsd/include CFLAGS += -D_GNU_SOURCE # memmem() from string.h @@ -24,6 +24,9 @@ HOSTPKGCONFIG ?= pkg-config endif CFLAGS += $(shell $(HOSTPKGCONFIG) --cflags libcrypto) +ifneq ($(.SHELLSTATUS),0) +$(error "Ensure that pkg-config is installed.") +endif LDFLAGS += $(shell $(HOSTPKGCONFIG) --libs libcrypto) all: $(TARGETS) diff --git a/util/amdfwtool/Makefile.inc b/util/amdfwtool/Makefile.inc index 067a137..6a83cb9 100644 --- a/util/amdfwtool/Makefile.inc +++ b/util/amdfwtool/Makefile.inc @@ -3,13 +3,16 @@ amdfwtoolobj = amdfwtool.o data_parse.o signed_psp.o handle_file.o amdfwreadobj = amdfwread.o -AMDFWTOOLCFLAGS=-O2 -Wall -Wextra -Wshadow -Werror +AMDFWTOOLCFLAGS :=-O2 -Wall -Wextra -Wshadow -Werror AMDFWTOOLCFLAGS += -I $(top)/src/commonlib/bsd/include AMDFWTOOLCFLAGS += -D_GNU_SOURCE # memmem() from string.h HOSTPKGCONFIG ?= pkg-config AMDFWTOOLCFLAGS += $(shell $(HOSTPKGCONFIG) --cflags libcrypto) +ifneq ($(.SHELLSTATUS),0) +$(error "Ensure that pkg-config is installed.") +endif LDFLAGS += $(shell $(HOSTPKGCONFIG) --libs libcrypto) $(objutil)/amdfwtool/%.o: $(top)/util/amdfwtool/%.c # $(HEADER) -- To view, visit https://review.coreboot.org/c/coreboot/+/78191?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d604145c919e7f71680d1e095dc68cb21868319 Gerrit-Change-Number: 78191 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/dedede: Wait for HPD on dibbi variants
by Felix Held (Code Review) 10 Oct '23

10 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78294?usp=email ) Change subject: mb/google/dedede: Wait for HPD on dibbi variants ...................................................................... mb/google/dedede: Wait for HPD on dibbi variants Some Type-C monitors do not immediately assert HPD. If we enter FSP-S before HDP is asserted, display initialisation may fail. So wait for HPD. This is similar to commit b40c6009141e ("mainboard/hatch: Fix puff DP output on cold boots") on puff, except we don't use google_chromeec_wait_for_displayport() since that EC command was removed for TCPMv2 (https://crrev.com/c/4221975). Instead we use the HPD signals only. By waiting for any HPD signal (Type-C or HDMI), we skip waiting if HDMI is connected, which is the same behaviour as puff and fizz. TEST=On dibbi, connect a display via a Type-C to HDMI dongle and check the dev and recovery screens are now displayed correctly. Also check the logs in the following cases: Cold reboot in dev mode, Type-C to HDMI dongle: HPD ready after 800 ms Warm reboot in dev mode, Type-C to HDMI dongle: HPD ready after 0 ms Cold/warm reboot in dev mode, direct Type-C: HPD ready after 0 ms Cold/warm reboot in dev mode, direct HDMI: HPD ready after 0 ms Cold/warm reboot in dev mode, no display: HPD not ready after 3000 ms. Abort. Change-Id: Id4657b5d5a95a68ecbd9efcf3585cf96ad1e13e1 Signed-off-by: Reka Norman <rekanorman(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78294 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sam McNally <sammc(a)google.com> --- M src/mainboard/google/dedede/mainboard.c M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/dedede/variants/boxy/gpio.c M src/mainboard/google/dedede/variants/dibbi/gpio.c M src/mainboard/google/dedede/variants/taranza/gpio.c 6 files changed, 105 insertions(+), 0 deletions(-) Approvals: Sam McNally: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c index a0a537c..b381d98 100644 --- a/src/mainboard/google/dedede/mainboard.c +++ b/src/mainboard/google/dedede/mainboard.c @@ -3,12 +3,15 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> #include <baseboard/variants.h> +#include <bootmode.h> #include <console/console.h> +#include <delay.h> #include <device/device.h> #include <drivers/tpm/cr50.h> #include <ec/ec.h> #include <security/tpm/tss.h> #include <soc/soc_chip.h> +#include <timer.h> #include <vb2_api.h> static void mainboard_update_soc_chip_config(void) @@ -30,12 +33,62 @@ } } +static bool any_hpd_ready(const gpio_t *gpios, size_t num_gpios) +{ + for (size_t i = 0; i < num_gpios; i++) { + if (gpio_get(gpios[i])) + return true; + } + + return false; +} + +static void mainboard_wait_for_hpd(void) +{ + static const long display_timeout_ms = 3000; + struct stopwatch sw; + size_t num_gpios; + const gpio_t *hpd_gpios = variant_hpd_gpios(&num_gpios); + + if (num_gpios == 0) { + printk(BIOS_WARNING, "No HPD GPIOs, skip waiting\n"); + return; + } + + printk(BIOS_INFO, "Waiting for HPD\n"); + + /* Pins will be configured back by gpio_configure_pads. */ + for (size_t i = 0; i < num_gpios; i++) { + gpio_input(hpd_gpios[i]); + } + + stopwatch_init_msecs_expire(&sw, display_timeout_ms); + while (!any_hpd_ready(hpd_gpios, num_gpios)) { + if (stopwatch_expired(&sw)) { + printk(BIOS_WARNING, + "HPD not ready after %ld ms. Abort.\n", + display_timeout_ms); + return; + } + mdelay(200); + } + printk(BIOS_INFO, "HPD ready after %lld ms\n", + stopwatch_duration_msecs(&sw)); +} + static void mainboard_init(void *chip_info) { const struct pad_config *base_pads; const struct pad_config *override_pads; size_t base_num, override_num; + /* + * For chromeboxes, wait for DP HPD to be asserted before + * entering FSP-S, otherwise display init may fail. + */ + if (!CONFIG(SYSTEM_TYPE_LAPTOP) && display_init_required()) + mainboard_wait_for_hpd(); + base_pads = baseboard_gpio_table(&base_num); override_pads = variant_override_gpio_table(&override_num); diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index f377d9a..557f6bf 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -489,3 +489,9 @@ }; DECLARE_WEAK_CROS_GPIOS(cros_gpios); + +const gpio_t *__weak variant_hpd_gpios(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index b258481..bb9fd5d 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -15,6 +15,7 @@ const struct pad_config *variant_sleep_gpio_table(size_t *num); const struct pad_config *variant_override_gpio_table(size_t *num); const struct pad_config *variant_romstage_gpio_table(size_t *num); +const gpio_t *variant_hpd_gpios(size_t *num); enum s0ix_entry { S0IX_EXIT, diff --git a/src/mainboard/google/dedede/variants/boxy/gpio.c b/src/mainboard/google/dedede/variants/boxy/gpio.c index f8ed0cf..e8cb9ff 100644 --- a/src/mainboard/google/dedede/variants/boxy/gpio.c +++ b/src/mainboard/google/dedede/variants/boxy/gpio.c @@ -87,3 +87,18 @@ *num = ARRAY_SIZE(gpio_table); return gpio_table; } + +static const gpio_t hpd_gpios[] = { + /* HDMI1 */ + GPP_A17, + /* USB C0 */ + GPP_B23, + /* USB C1 */ + GPP_A16, +}; + +const gpio_t *variant_hpd_gpios(size_t *num) +{ + *num = ARRAY_SIZE(hpd_gpios); + return hpd_gpios; +} diff --git a/src/mainboard/google/dedede/variants/dibbi/gpio.c b/src/mainboard/google/dedede/variants/dibbi/gpio.c index 89a7a77..2998592 100644 --- a/src/mainboard/google/dedede/variants/dibbi/gpio.c +++ b/src/mainboard/google/dedede/variants/dibbi/gpio.c @@ -91,3 +91,18 @@ *num = ARRAY_SIZE(gpio_table); return gpio_table; } + +static const gpio_t hpd_gpios[] = { + /* HDMI1 */ + GPP_A17, + /* HDMI2 */ + GPP_A16, + /* USB C0 */ + GPP_B23, +}; + +const gpio_t *variant_hpd_gpios(size_t *num) +{ + *num = ARRAY_SIZE(hpd_gpios); + return hpd_gpios; +} diff --git a/src/mainboard/google/dedede/variants/taranza/gpio.c b/src/mainboard/google/dedede/variants/taranza/gpio.c index 89a7a77..2998592 100644 --- a/src/mainboard/google/dedede/variants/taranza/gpio.c +++ b/src/mainboard/google/dedede/variants/taranza/gpio.c @@ -91,3 +91,18 @@ *num = ARRAY_SIZE(gpio_table); return gpio_table; } + +static const gpio_t hpd_gpios[] = { + /* HDMI1 */ + GPP_A17, + /* HDMI2 */ + GPP_A16, + /* USB C0 */ + GPP_B23, +}; + +const gpio_t *variant_hpd_gpios(size_t *num) +{ + *num = ARRAY_SIZE(hpd_gpios); + return hpd_gpios; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/78294?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id4657b5d5a95a68ecbd9efcf3585cf96ad1e13e1 Gerrit-Change-Number: 78294 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Derek Huang <derekhuang(a)google.com> Gerrit-CC: Ricky Chang <rickytlchang(a)google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/rex/var/screebo: Update DTT settings for thermal control
by Felix Held (Code Review) 10 Oct '23

10 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78290?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/rex/var/screebo: Update DTT settings for thermal control ...................................................................... mb/google/rex/var/screebo: Update DTT settings for thermal control update DTT settings for thermal control, as follows: 1.Cancel TCPU trip point and fine tune other protection temperature on the Critical policy table 2.Fine tune EC/Bios protection temperature BUG=b:291217859 TEST=emerge-rex coreboot Change-Id: I0e2ff6eea9fed71ad7680c1fac4921984b87aca5 Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78290 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/rex/variants/screebo/overridetree.cb 1 file changed, 6 insertions(+), 10 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified zhongtian wu: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb index f5f491f..f2a9e55 100644 --- a/src/mainboard/google/rex/variants/screebo/overridetree.cb +++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb @@ -147,7 +147,6 @@ TEMP_PCT(60, 60), TEMP_PCT(55, 50), TEMP_PCT(50, 40), - TEMP_PCT(45, 30), } }, [1] = { @@ -159,7 +158,6 @@ TEMP_PCT(60, 60), TEMP_PCT(55, 50), TEMP_PCT(50, 40), - TEMP_PCT(45, 30), } }, [2] = { @@ -194,19 +192,17 @@ ## Passive Policy # TODO: below values are initial reference values only register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000), - [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000), - [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 85, 5000), + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 5000), }" ## Critical Policy # TODO: below values are initial reference values only register "policies.critical" = "{ - [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN), - [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), - [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN), + [0] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN), }" ## Power Limits Control -- To view, visit https://review.coreboot.org/c/coreboot/+/78290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e2ff6eea9fed71ad7680c1fac4921984b87aca5 Gerrit-Change-Number: 78290 Gerrit-PatchSet: 4 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yunhao wang <wangyunhao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/rex/var/rex0: update thermal settings to start fan earlier
by Felix Held (Code Review) 10 Oct '23

10 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78279?usp=email ) Change subject: mb/google/rex/var/rex0: update thermal settings to start fan earlier ...................................................................... mb/google/rex/var/rex0: update thermal settings to start fan earlier Internal testing showed that CPU heatsink gets hot and temperature goes over 75C. In this situation, the fan does not even start to lower down CPU temperature. This is because of existing temperature thresholds of TSR0 and TSR1 sensors are set at 45C to start fan. With updated new settings based on tuning from thermal team, the fan starts early at 43C for TSR0 and TSR1 so the CPU temperature stays below 75C. BUG=b:302673874 TEST=Built and tested on google/rex board Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> Change-Id: I6580652d6165946e98ecf1b46ace3352cd34dcdf Reviewed-on: https://review.coreboot.org/c/coreboot/+/78279 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 14 insertions(+), 14 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index 1d4ba63..034a694 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -186,25 +186,25 @@ [0] = { .target = DPTF_TEMP_SENSOR_0, .thresholds = { - TEMP_PCT(75, 90), - TEMP_PCT(70, 80), - TEMP_PCT(65, 70), - TEMP_PCT(60, 60), - TEMP_PCT(55, 50), - TEMP_PCT(50, 40), - TEMP_PCT(45, 30), + TEMP_PCT(70, 97), + TEMP_PCT(65, 90), + TEMP_PCT(60, 80), + TEMP_PCT(55, 75), + TEMP_PCT(50, 65), + TEMP_PCT(45, 45), + TEMP_PCT(43, 30), } }, [1] = { .target = DPTF_TEMP_SENSOR_1, .thresholds = { - TEMP_PCT(75, 90), - TEMP_PCT(70, 80), - TEMP_PCT(65, 70), - TEMP_PCT(60, 60), - TEMP_PCT(55, 50), - TEMP_PCT(50, 40), - TEMP_PCT(45, 30), + TEMP_PCT(70, 97), + TEMP_PCT(65, 90), + TEMP_PCT(60, 80), + TEMP_PCT(55, 75), + TEMP_PCT(50, 65), + TEMP_PCT(45, 45), + TEMP_PCT(43, 30), } }, [2] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/78279?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6580652d6165946e98ecf1b46ace3352cd34dcdf Gerrit-Change-Number: 78279 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/amd/onyx: Use BMC SOL by default
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin Roth. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76509?usp=email ) Change subject: mb/amd/onyx: Use BMC SOL by default ...................................................................... Patch Set 13: (1 comment) File src/mainboard/amd/onyx/Kconfig: https://review.coreboot.org/c/coreboot/+/76509/comment/183bcb9d_973d1517 : PS12, Line 19: # Use BMC SOL console by default > maybe "Use BMC SOL console on SoC UART1 by default"? at least for me that would make it a bit cleare […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/76509?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefe61d25367bbe5cff0cacbfbafa32607de77d0f Gerrit-Change-Number: 76509 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 13:16:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/amd/onyx: use AMD SoC UART
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Felix Held. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78267?usp=email ) Change subject: mb/amd/onyx: use AMD SoC UART ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78267/comment/85c3b7ec_b609b8c8 : PS6, Line 7: mb/amd/onyx: Add UART Kconfig > "mb/amd/onyx: use AMD SoC UART" would be a bit more descriptive Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78267?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I79ebbcc6a4a3a93e8437ef56aebdcf72f9a3e6ab Gerrit-Change-Number: 78267 Gerrit-PatchSet: 7 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 13:15:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/genoa: Add GPIO support
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Felix Held, Martin Roth. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78222?usp=email ) Change subject: soc/amd/genoa: Add GPIO support ...................................................................... Patch Set 8: (1 comment) File src/soc/amd/genoa/gpio.c: https://review.coreboot.org/c/coreboot/+/78222/comment/93b93f0b_16196185 : PS7, Line 16: { GPIO_7, GEVENT_11 }, > GPIO7 can't cause a gevent. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78222?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e827e9ffbb2ec1be0f1247b77660a9fdeb04f7b Gerrit-Change-Number: 78222 Gerrit-PatchSet: 8 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 13:15:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/amd/genoa: Add SMI support
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Felix Held, Martin Roth, Paul Menzel. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78221?usp=email ) Change subject: soc/amd/genoa: Add SMI support ...................................................................... Patch Set 8: (3 comments) File src/soc/amd/genoa/include/soc/smi.h: https://review.coreboot.org/c/coreboot/+/78221/comment/cbfb1873_3470f11c : PS7, Line 9: 59 > i'd say that this should be 64; the highest sci map is scimap_63 in FCH::SMI::SCIMAP15 Done https://review.coreboot.org/c/coreboot/+/78221/comment/c4170dde_dbd4f276 : PS7, Line 56: > one tab too many. […] Done https://review.coreboot.org/c/coreboot/+/78221/comment/dae29b40_a5612413 : PS7, Line 84: SMITYPE_WLAN_BT_PME > SMITYPE_ESPI1_WAKE_PME Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I491f4075cef8976e4b0762752c9e2e3c2ef886d5 Gerrit-Change-Number: 78221 Gerrit-PatchSet: 8 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 13:14:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: soc/amd/genoa: Add GPIO definitions
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Felix Held, Martin Roth. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78220?usp=email ) Change subject: soc/amd/genoa: Add GPIO definitions ...................................................................... Patch Set 7: (4 comments) File src/soc/amd/genoa/include/soc/gpio.h: https://review.coreboot.org/c/coreboot/+/78220/comment/6360475d_ec5b43df : PS6, Line 146: GPIO_26_IOMUX_PCIE_RST_L > GPIO_26_IOMUX_PCIE_RST1_L -> the 1 is missing there Done https://review.coreboot.org/c/coreboot/+/78220/comment/4dc3b322_37f1bda5 : PS6, Line 192: #define GPIO_126_IOMUX_ESPI_CS2_L 0 > GPIO_126_IOMUX_SPI_CS2_L -> that's for spi and not espi Done https://review.coreboot.org/c/coreboot/+/78220/comment/0abbbd67_971567c3 : PS6, Line 252: #define GPIO_257_IOMUX_SGPIO1_CLK 1 > GPIO_257_IOMUX_CLK_REQ01_L for gpio mux = 2 is missing Done https://review.coreboot.org/c/coreboot/+/78220/comment/dd9e8538_e69d03d6 : PS6, Line 254: #define GPIO_258_IOMUX_SGPIO2_CLK 1 > GPIO_258_IOMUX_CLK_REQ02_L for gpio mux == 2 is missing Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78220?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0c4e425699c9a158ca95a1baf94f7756f0b12b44 Gerrit-Change-Number: 78220 Gerrit-PatchSet: 7 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 10 Oct 2023 13:13:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/amd/onyx: Use BMC SOL by default
by Varshit Pandya (Code Review) 10 Oct '23

10 Oct '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin Roth, Varshit Pandya. Varshit Pandya has uploaded a new patch set (#13) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76509?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Felix Held, Code-Review+2 by Martin Roth, Verified+1 by build bot (Jenkins) Change subject: mb/amd/onyx: Use BMC SOL by default ...................................................................... mb/amd/onyx: Use BMC SOL by default Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Iefe61d25367bbe5cff0cacbfbafa32607de77d0f --- M src/mainboard/amd/onyx/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/76509/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/76509?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefe61d25367bbe5cff0cacbfbafa32607de77d0f Gerrit-Change-Number: 76509 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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