coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

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3354 discussions

[XS] Change in coreboot[main]: mb/google/brya: Set WWAN_PCIE_WAKE_ODL as interrupt on Redrix
by Paweł Anikiel (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Nick Vaccaro, Paweł Anikiel. Hello Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78416?usp=email to look at the new patch set (#3). Change subject: mb/google/brya: Set WWAN_PCIE_WAKE_ODL as interrupt on Redrix ...................................................................... mb/google/brya: Set WWAN_PCIE_WAKE_ODL as interrupt on Redrix This signal gets deasserted by the WWAN modem to reactivate the PCIe link when in low power mode. In order to handle this efficiently, the kernel needs to setup an interrupt. BUG=b:301150499 TEST=Compiled and tested on google/redrix Signed-off-by: Paweł Anikiel <panikiel(a)google.com> Change-Id: I37f6836aefe4a374eaff3e4bc11358be274cf563 --- M src/mainboard/google/brya/variants/baseboard/brya/gpio.c M src/mainboard/google/brya/variants/redrix/overridetree.cb 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/78416/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78416?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I37f6836aefe4a374eaff3e4bc11358be274cf563 Gerrit-Change-Number: 78416 Gerrit-PatchSet: 3 Gerrit-Owner: Paweł Anikiel <panikiel(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <czapiga(a)google.com> Gerrit-CC: Kornel Dulęba <korneld(a)google.com> Gerrit-Attention: Paweł Anikiel <panikiel(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: drivers/wwan/fm: Wake up modem on PEWAKE# signal change
by Subrata Banik (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Kornel Dulęba, Nick Vaccaro, Paweł Anikiel. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78297?usp=email ) Change subject: drivers/wwan/fm: Wake up modem on PEWAKE# signal change ...................................................................... Patch Set 3: (1 comment) File src/drivers/wwan/fm/acpi_fm350gl.c: https://review.coreboot.org/c/coreboot/+/78297/comment/1ad21421_ac7e7728 : PS3, Line 287: #if CONFIG(GENERIC_GPIO_LIB) > I needed to get the pin number and the GPIO controller's scope name from a `struct acpi_gpio`. I looked at the implementation of `acpi_device_write_gpio()`, because it writes out both of these things. This implementation uses lots of GENERIC_GPIO_LIB ifdefs, so I copied over exactly what it did. > > Is there a better way of doing this? If so, I'll use it. why not ``` if (CONFIG(GENERIC_GPIO_LIB)) pin = gpio_acpi_pin(pin); ``` what would happen when GENERIC_GPIO_LIB is not enabled? shouldn't u bail out early ? -- To view, visit https://review.coreboot.org/c/coreboot/+/78297?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32257689da85ea71f9de781093b3ede0cfe70a0e Gerrit-Change-Number: 78297 Gerrit-PatchSet: 3 Gerrit-Owner: Paweł Anikiel <panikiel(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <czapiga(a)google.com> Gerrit-CC: Kornel Dulęba <korneld(a)google.com> Gerrit-Attention: Paweł Anikiel <panikiel(a)google.com> Gerrit-Attention: Kornel Dulęba <korneld(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Oct 2023 08:54:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paweł Anikiel <panikiel(a)google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/wwan/fm: Wake up modem on PEWAKE# signal change
by Paweł Anikiel (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Kornel Dulęba, Nick Vaccaro, Subrata Banik. Paweł Anikiel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78297?usp=email ) Change subject: drivers/wwan/fm: Wake up modem on PEWAKE# signal change ...................................................................... Patch Set 3: (2 comments) File src/drivers/wwan/fm/acpi_fm350gl.c: https://review.coreboot.org/c/coreboot/+/78297/comment/3bfe923e_817341f0 : PS3, Line 6: #if CONFIG(GENERIC_GPIO_LIB) : #include <gpio.h> : #endif > order please. […] Same as below, it's copied over from `acpi/device.c`. https://review.coreboot.org/c/coreboot/+/78297/comment/6b44fd77_29d78d85 : PS3, Line 287: #if CONFIG(GENERIC_GPIO_LIB) > why preprocessing guard ? I needed to get the pin number and the GPIO controller's scope name from a `struct acpi_gpio`. I looked at the implementation of `acpi_device_write_gpio()`, because it writes out both of these things. This implementation uses lots of GENERIC_GPIO_LIB ifdefs, so I copied over exactly what it did. Is there a better way of doing this? If so, I'll use it. -- To view, visit https://review.coreboot.org/c/coreboot/+/78297?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32257689da85ea71f9de781093b3ede0cfe70a0e Gerrit-Change-Number: 78297 Gerrit-PatchSet: 3 Gerrit-Owner: Paweł Anikiel <panikiel(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <czapiga(a)google.com> Gerrit-CC: Kornel Dulęba <korneld(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kornel Dulęba <korneld(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Oct 2023 08:48:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: soc/intel/xeon_sp: Redesign resource allocation
by Patrick Rudolph (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78327?usp=email ) Change subject: soc/intel/xeon_sp: Redesign resource allocation ...................................................................... Patch Set 1: (1 comment) File src/device/pci_device.c: https://review.coreboot.org/c/coreboot/+/78327/comment/6250be57_d3a01221 : PS1, Line 602: 0xffffffffffff Why is it limited to 48bit? That's not clear from the code. -- To view, visit https://review.coreboot.org/c/coreboot/+/78327?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb29c24b71a18e2e092f9d4953d106e6ca0a5fe1 Gerrit-Change-Number: 78327 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 17 Oct 2023 08:08:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brya/var/dochi: update gpio settings
by David Wu (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Bob Moragues, Bob Moragues, Lucas Chen, Morris Hsu, Nick Vaccaro, Ren Kuo, Subrata Banik, YH Lin. David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78384?usp=email ) Change subject: mb/google/brya/var/dochi: update gpio settings ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78384?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ccab46b9f622fb98920d316c31800f39dc8ff95 Gerrit-Change-Number: 78384 Gerrit-PatchSet: 2 Gerrit-Owner: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Gerrit-Attention: Bob Moragues <moragues(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Oct 2023 07:48:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/stoneyridge: Use common block graphics driver
by CoolStar (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78428?usp=email to look at the new patch set (#2). Change subject: soc/amd/stoneyridge: Use common block graphics driver ...................................................................... soc/amd/stoneyridge: Use common block graphics driver Select the common block graphics driver for Stoney. Decouple the common driver from FSP for Stoney, and don't write the ACPI device for the GPU as stoney already defines it statically. Change-Id: I260b964be59c1a208ff907c474243a9ace03f206 Signed-off-by: CoolStar <coolstarorganization(a)gmail.com> --- M src/soc/amd/common/block/graphics/graphics.c M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/chipset_cz.cb M src/soc/amd/stoneyridge/chipset_st.cb 4 files changed, 9 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/78428/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78428?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I260b964be59c1a208ff907c474243a9ace03f206 Gerrit-Change-Number: 78428 Gerrit-PatchSet: 2 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/kahlee: Fix backlight settings in Windows
by CoolStar (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Jason Nien, Martin Roth. CoolStar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78429?usp=email ) Change subject: mb/google/kahlee: Fix backlight settings in Windows ...................................................................... mb/google/kahlee: Fix backlight settings in Windows Utilize the SOC_AMD_COMMON_BLOCK_GRAPHICS_ATIF to provide the Windows driver with information on backlight settings. TEST: Boot google/careena to Win10. Observe display turns on after 30 minutes with brightness controls functional. Change-Id: I6792a91f26a5f6e4dc478cdde776ff749f08946f Signed-off-by: CoolStar <coolstarorganization(a)gmail.com> --- M src/mainboard/google/kahlee/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/78429/1 diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 7b4fa10..5a42f5e 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -7,6 +7,7 @@ select AMD_APU_PKG_FT4 select ALWAYS_LOAD_OPROM select ALWAYS_RUN_OPROM + select SOC_AMD_COMMON_BLOCK_GRAPHICS_ATIF select BOARD_ROMSIZE_KB_16384 select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID -- To view, visit https://review.coreboot.org/c/coreboot/+/78429?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6792a91f26a5f6e4dc478cdde776ff749f08946f Gerrit-Change-Number: 78429 Gerrit-PatchSet: 1 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: soc/amd/stoneyridge: Use common block graphicd driver
by CoolStar (Code Review) 17 Oct '23

17 Oct '23

CoolStar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78428?usp=email ) Change subject: soc/amd/stoneyridge: Use common block graphicd driver ...................................................................... soc/amd/stoneyridge: Use common block graphicd driver Select the common block graphics driver for Stoney. Decouple the common driver from FSP for Stoney, and don't write the ACPI device for the GPU as stoney already defines it statically. Change-Id: I260b964be59c1a208ff907c474243a9ace03f206 Signed-off-by: CoolStar <coolstarorganization(a)gmail.com> --- M src/soc/amd/common/block/graphics/graphics.c M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/chipset_cz.cb M src/soc/amd/stoneyridge/chipset_st.cb 4 files changed, 9 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/78428/1 diff --git a/src/soc/amd/common/block/graphics/graphics.c b/src/soc/amd/common/block/graphics/graphics.c index 4d33cad..b8b0e5c 100644 --- a/src/soc/amd/common/block/graphics/graphics.c +++ b/src/soc/amd/common/block/graphics/graphics.c @@ -9,7 +9,9 @@ #include <console/console.h> #include <device/pci.h> #include <fmap.h> +#if CONFIG(RUN_FSP_GOP) #include <fsp/graphics.h> +#endif #include <security/vboot/vbios_cache_hash_tpm.h> #include <soc/intel/common/vbt.h> #include <timestamp.h> @@ -115,7 +117,8 @@ static void graphics_fill_ssdt(const struct device *dev) { - acpi_device_write_pci_dev(dev); + if (!CONFIG(SOC_AMD_STONEYRIDGE)) + acpi_device_write_pci_dev(dev); /* Use the VFCT copy when using GOP */ if (!CONFIG(RUN_FSP_GOP)) @@ -177,7 +180,7 @@ static void graphics_dev_init(struct device *const dev) { - if (CONFIG(RUN_FSP_GOP)) { + #if CONFIG(RUN_FSP_GOP) struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res && res->base) @@ -185,7 +188,7 @@ else printk(BIOS_ERR, "%s: Unable to find resource for %s\n", __func__, dev_path(dev)); - } + #endif /* Initialize PCI device, load/execute BIOS Option ROM */ pci_dev_init(dev); diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 6ff135e..b692e48 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -25,6 +25,7 @@ select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS select SOC_AMD_COMMON_BLOCK_CAR select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H + select SOC_AMD_COMMON_BLOCK_GRAPHICS select SOC_AMD_COMMON_BLOCK_HDA select SOC_AMD_COMMON_BLOCK_I2C select SOC_AMD_COMMON_BLOCK_IOMMU diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb index 004ff91..1122ae8 100644 --- a/src/soc/amd/stoneyridge/chipset_cz.cb +++ b/src/soc/amd/stoneyridge/chipset_cz.cb @@ -8,7 +8,7 @@ ops stoneyridge_pci_domain_ops device pci 00.0 alias gnb on ops stoneyridge_northbridge_operations end device pci 00.2 alias iommu off ops amd_iommu_ops end - device pci 01.0 alias gfx off end # internal GPU + device pci 01.0 alias gfx off ops amd_graphics_ops end # internal GPU device pci 01.1 alias gfx_hda off end # display HD Audio controller device pci 02.0 on end # Dummy Host Bridge, do not disable device pci 02.1 alias gpp_bridge_0 off end diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb index 34a0384..fd148a8 100644 --- a/src/soc/amd/stoneyridge/chipset_st.cb +++ b/src/soc/amd/stoneyridge/chipset_st.cb @@ -8,7 +8,7 @@ ops stoneyridge_pci_domain_ops device pci 00.0 alias gnb on ops stoneyridge_northbridge_operations end device pci 00.2 alias iommu off ops amd_iommu_ops end - device pci 01.0 alias gfx off end # internal GPU + device pci 01.0 alias gfx off ops amd_graphics_ops end # internal GPU device pci 01.1 alias gfx_hda off end # display HD Audio controller device pci 02.0 on end # Dummy Host Bridge, do not disable device pci 02.1 alias gpp_bridge_0 off end -- To view, visit https://review.coreboot.org/c/coreboot/+/78428?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I260b964be59c1a208ff907c474243a9ace03f206 Gerrit-Change-Number: 78428 Gerrit-PatchSet: 1 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/kahlee: Rework I2S/ACP ACPI for new Windows driver
by CoolStar (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: Jason Nien, Martin Roth, Martin Roth, Matt DeVillier, Nico Huber, Paul Menzel. CoolStar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78406?usp=email ) Change subject: mb/google/kahlee: Rework I2S/ACP ACPI for new Windows driver ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio_common.asl: https://review.coreboot.org/c/coreboot/+/78406/comment/6b68afeb_991135b1 : PS4, Line 5: { > move bracket to new line Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78406?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I51527a1bfae3e12ce5cf1da8a3465bbc9ddfa76e Gerrit-Change-Number: 78406 Gerrit-PatchSet: 5 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 17 Oct 2023 07:29:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/kahlee: Rework I2S/ACP ACPI for new Windows driver
by CoolStar (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: CoolStar, Jason Nien, Martin Roth, Martin Roth, Matt DeVillier, Nico Huber, Paul Menzel. Hello Jason Nien, Martin Roth, Martin Roth, Matt DeVillier, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78406?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: mb/google/kahlee: Rework I2S/ACP ACPI for new Windows driver ...................................................................... mb/google/kahlee: Rework I2S/ACP ACPI for new Windows driver Supports a brand new ACP driver for STONEY / Grunt chromebooks. AMD's Audio CoProcessor handles i2s/tdm audio, and is located on the GPU. On Windows the PCIe device for the GPU is owned by the AMD proprietary driver, hence a separate device has to be added for the ACP driver. Fortunately since IOMMU is disabled on STONEY, the driver itself can pull BAR5 from the GPU and use that to initialize, so no special configuration is required in ACPI other than the ID. Change-Id: I51527a1bfae3e12ce5cf1da8a3465bbc9ddfa76e Signed-off-by: CoolStar <coolstarorganization(a)gmail.com> --- M src/mainboard/google/kahlee/dsdt.asl A src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio_common.asl 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/78406/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/78406?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I51527a1bfae3e12ce5cf1da8a3465bbc9ddfa76e Gerrit-Change-Number: 78406 Gerrit-PatchSet: 5 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2023