coreboot-gerrit October 2023

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[S] Change in coreboot[main]: mb/google/guybrush: Set PS2K_IRQ to level/low
by Mark Hasemeyer (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Jason Nien, Karthik Ramasubramanian, Mark Hasemeyer, Martin L Roth, Raul Rangel. Hello Jason Nien, Karthik Ramasubramanian, Martin L Roth, Martin Roth, Raul Rangel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78137?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+2 by Karthik Ramasubramanian, Code-Review+2 by Martin L Roth, Code-Review+2 by Raul Rangel, Verified+1 by build bot (Jenkins) Change subject: mb/google/guybrush: Set PS2K_IRQ to level/low ...................................................................... mb/google/guybrush: Set PS2K_IRQ to level/low On guybrush, keyboard presses are signaled by the EC via eSPI virtual wire. The interrupt is shared with others and should be active low. From https://review.coreboot.org/c/coreboot/+/54924: > The default state for the IRQ lines when the eSPI controller comes > out of reset is high. This is because the IRQ lines are shared with > the other IRQ sources using AND gates. This means that in order to > not cause any spurious interrupts or miss any interrupts, the > IO-APIC must use a low polarity trigger. Setting `vw_irq_polarity` in the device tree provides an option to invert interrupts from the eSPI controller, but the register is initialized from verstage which is baked into RO. As a workaround, the necessary interrupts on the EC have been reconfigured to be active low, and we can modify the IO-APIC accordingly. EC related CL here: https://crrev.com/c/4891663 BUG=b:218874489 TEST=-`emerge-guybrush chromeos-ec coreboot chromeos-bootimage` -Flash new RW fw and verify keyboard is functional -`suspend_stress_test -c 1` and verify i8042 irq is removed as a wake source -`echo mem > /sys/power/state`. Press key and verify system wake from i8042. Cq-Depend: chromium:4891663 Change-Id: I7d093d94a666263684645ef724e945069c68c806 Signed-off-by: Mark Hasemeyer <markhas(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/ec.h 2 files changed, 5 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/78137/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78137?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d093d94a666263684645ef724e945069c68c806 Gerrit-Change-Number: 78137 Gerrit-PatchSet: 3 Gerrit-Owner: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/brya/var/*: Mark fingerprint reader as hidden
by Felix Held (Code Review) 31 Oct '23

31 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78811?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brya/var/*: Mark fingerprint reader as hidden ...................................................................... mb/google/brya/var/*: Mark fingerprint reader as hidden Windows doesn't have / will likely never have a signed driver for the FPR, so set the device status as hidden so it will not appear as an unknown device in Windows Device Manager. Linux does not check/care about the ACPI device status. TEST=build/boot Win11 on google/brya (kano), verify FPR does not show up as unknown device under Device Manager. Change-Id: Ie73fd9d448ecca9e9112abc0d92b4ab46ce3618d Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78811 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/anahera4es/overridetree.cb M src/mainboard/google/brya/variants/brask/overridetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb M src/mainboard/google/brya/variants/crota/overridetree.cb M src/mainboard/google/brya/variants/gimble/overridetree.cb M src/mainboard/google/brya/variants/gimble4es/overridetree.cb M src/mainboard/google/brya/variants/kano/overridetree.cb M src/mainboard/google/brya/variants/marasov/overridetree.cb M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/primus4es/overridetree.cb M src/mainboard/google/brya/variants/redrix/overridetree.cb M src/mainboard/google/brya/variants/redrix4es/overridetree.cb M src/mainboard/google/brya/variants/skolas/overridetree.cb M src/mainboard/google/brya/variants/skolas4es/overridetree.cb M src/mainboard/google/brya/variants/taeko/overridetree.cb M src/mainboard/google/brya/variants/taeko4es/overridetree.cb M src/mainboard/google/brya/variants/vell/overridetree.cb M src/mainboard/google/brya/variants/zydron/overridetree.cb 19 files changed, 19 insertions(+), 19 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 9a09072..0a72246 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -327,7 +327,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 421514d..ed4037e 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -309,7 +309,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index b2169c3..995f20c 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -153,7 +153,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index f0b6c69..d7eadbe 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -1065,7 +1065,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index d4ce367..b3cab3c 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -322,7 +322,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index 2b4a5ab..b35a64f 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -261,7 +261,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb index 90afbb0..1962127 100644 --- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb @@ -225,7 +225,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index d5cf7c3..8ef5ed2 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -486,7 +486,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index ce86d763..7fd0ef1 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -354,7 +354,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index e42480e..a06578d 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -314,7 +314,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)" register "wake" = "GPE0_DW2_15" - device spi 0 on end + device spi 0 hidden end register "has_power_resource" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb index 559d16c..baec228 100644 --- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb @@ -308,7 +308,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index f5556f0..7301615 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -495,7 +495,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index b16c3ff..1a619f8 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -494,7 +494,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index 70b0005..388ea4f 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -989,7 +989,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/skolas4es/overridetree.cb b/src/mainboard/google/brya/variants/skolas4es/overridetree.cb index 0d6eacb..b020d01 100644 --- a/src/mainboard/google/brya/variants/skolas4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas4es/overridetree.cb @@ -769,7 +769,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 4422191..744a870 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -578,7 +578,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb index 9c2d8da..a2c79d5 100644 --- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb @@ -438,7 +438,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 31cc240..30df62a 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -433,7 +433,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on diff --git a/src/mainboard/google/brya/variants/zydron/overridetree.cb b/src/mainboard/google/brya/variants/zydron/overridetree.cb index 7957cca..f0d4d05 100644 --- a/src/mainboard/google/brya/variants/zydron/overridetree.cb +++ b/src/mainboard/google/brya/variants/zydron/overridetree.cb @@ -464,7 +464,7 @@ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_delay_ms" = "3" - device spi 0 on end + device spi 0 hidden end end # FPMCU end device ref pch_espi on -- To view, visit https://review.coreboot.org/c/coreboot/+/78811?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie73fd9d448ecca9e9112abc0d92b4ab46ce3618d Gerrit-Change-Number: 78811 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/hatch/var/*: Mark fingerprint reader as hidden
by Felix Held (Code Review) 31 Oct '23

31 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78810?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/hatch/var/*: Mark fingerprint reader as hidden ...................................................................... mb/google/hatch/var/*: Mark fingerprint reader as hidden Windows doesn't have / will likely never have a signed driver for the FPR, so set the device status as hidden so it will not appear as an unknown device in Windows Device Manager. Linux does not check/care about the ACPI device status. TEST=build/boot Win11 on google/hatch (jinlon), verify FPR does not show up as unknown device under Device Manager. Change-Id: Ia4a908afdabad0ae8db45c4731a00c9cb17b42bb Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78810 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/hatch/variants/dratini/overridetree.cb M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/helios/overridetree.cb M src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb M src/mainboard/google/hatch/variants/jinlon/overridetree.cb M src/mainboard/google/hatch/variants/kohaku/overridetree.cb M src/mainboard/google/hatch/variants/mushu/overridetree.cb 7 files changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb index 0de4433..7e25df5 100644 --- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb @@ -167,7 +167,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref lpc_espi on diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 952bf75..e302aff 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -166,7 +166,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index 341ebf0..3a624d9 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -184,7 +184,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on diff --git a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb index 38ab269..691e51f 100644 --- a/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios_diskswap/overridetree.cb @@ -194,7 +194,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb index 7a64510..61ebf24 100644 --- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb +++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb @@ -191,7 +191,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 9b55d90..8c7a9e8 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -221,7 +221,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on diff --git a/src/mainboard/google/hatch/variants/mushu/overridetree.cb b/src/mainboard/google/hatch/variants/mushu/overridetree.cb index 2344e405..0424da2 100644 --- a/src/mainboard/google/hatch/variants/mushu/overridetree.cb +++ b/src/mainboard/google/hatch/variants/mushu/overridetree.cb @@ -186,7 +186,7 @@ register "compat_string" = ""google,cros-ec-spi"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)" register "wake" = "GPE0_DW0_23" - device spi 1 on end + device spi 1 hidden end end # FPMCU end device ref hda on -- To view, visit https://review.coreboot.org/c/coreboot/+/78810?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia4a908afdabad0ae8db45c4731a00c9cb17b42bb Gerrit-Change-Number: 78810 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XL] Change in coreboot[main]: mb/emulation: Add SIMICS QSP support
by Nico Huber (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Christian Walter, Lean Sheng Tan, Leon Groß, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email ) Change subject: mb/emulation: Add SIMICS QSP support ...................................................................... Patch Set 13: (1 comment) Patchset: PS4: I'm not sure if I follow. You expect current users of Simics to adopt this? Currently, with QEMU it's as simple as running `make qemu`. Are there plans to make Simics as easy to use? if not, wouldn't it be better to teach people about QEMU? > i mean it is no harm to add more support to the platform for coreboot i guess? Every addition also adds at least some maintenance overhead. I've often seen redundant additions to be abandoned and bit rot. > It is a nice addition as well. As it does have specific use cases (although quite limited): as Intel or silicon vendors usually use Simics for the RTL simulation before the actual silicon is available, actively used by the internal engineers for that. Do they use QSP? > EDK2 and Slimbootloader already have nice support for Simics: > https://slimbootloader.github.io/supported-hardware/qsp.html > https://github.com/tianocore/edk2-platforms/tree/master/Platform/Intel/Simi… And others have support for other open-source emulators, e.g. Bochs. Still we don't add those, why? -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 13 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:36:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display
by Subrata Banik (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Eric Lai, Kapil Porwal, Nick Vaccaro, Nico Huber, Paz Zcharya. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78691?usp=email ) Change subject: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Sorry, I missed all the MBUS reviews. This looks like workarounds for using > the FSP/GOP as it would otherwise be implemented as part of the gfx init. > Have you considered to implement this in `drivers/intel/fsp/`? Intel GFX team will eventually implement MBUS joining in proper sometime after Q2 24. > > The logic in get_external_display_status() looks suspiciously as it would > only work for the default pipe allocation chosen by the GOP. The internal > display is often but not always on PORT_A. you are right, the current assumption is that eDP/internal display using pipe-A > And PORT_A can also be used with > any pipe (i.e. not always pipe A). If the intend is to only make it work > with the GOP, please move the code. SOC_INTEL_GFX_MBUS_JOIN kconfig is implementation specific for ChromeOS device and plan is to move it into GFX driver sooner. -- To view, visit https://review.coreboot.org/c/coreboot/+/78691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie2a3b9f1212a9dcab2b7305078fe22ee35e7423c Gerrit-Change-Number: 78691 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:36:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: lib: Add GCD function
by Paul Menzel (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Julius Werner, Yidi Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78798?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: lib: Add GCD function ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78798/comment/e56ad555_964783d9 : PS1, Line 9: Linux kernel Please denote the version/commit you took this from. -- To view, visit https://review.coreboot.org/c/coreboot/+/78798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21819cda4299b3809b8ca7a95cbdc6a87e4b3481 Gerrit-Change-Number: 78798 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:32:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/arm64/arch_timer: Fix possible overflow in multiplication
by Paul Menzel (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Julius Werner, Yidi Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78800?usp=email ) Change subject: arch/arm64/arch_timer: Fix possible overflow in multiplication ...................................................................... Patch Set 2: (1 comment) File src/arch/arm64/arch_timer.c: https://review.coreboot.org/c/coreboot/+/78800/comment/a71a194a_06da4a16 : PS2, Line 11: static uint32_t tfreq, mult; : uint32_t div; : : if (tfreq == 0) { : tfreq = raw_read_cntfrq_el0(); : assert(tfreq > 0) : mult = 1000000; : div = gcd(mult, tfreq); : tfreq /= div; : mult /= div; : } : : long usecs = (tvalue * mult) / tfreq; Nice, but why not just cast `tvalue`, and let the compiler figure out the rest? Is that possible? -- To view, visit https://review.coreboot.org/c/coreboot/+/78800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I366667de05392913150414f0fa9058725be71c52 Gerrit-Change-Number: 78800 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:31:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display
by Nico Huber (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Eric Lai, Kapil Porwal, Nick Vaccaro, Paz Zcharya, Subrata Banik. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78691?usp=email ) Change subject: soc/intel/cmn/gfx: Fix GFX modeset issue with dual-display ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: Sorry, I missed all the MBUS reviews. This looks like workarounds for using the FSP/GOP as it would otherwise be implemented as part of the gfx init. Have you considered to implement this in `drivers/intel/fsp/`? The logic in get_external_display_status() looks suspiciously as it would only work for the default pipe allocation chosen by the GOP. The internal display is often but not always on PORT_A. And PORT_A can also be used with any pipe (i.e. not always pipe A). If the intend is to only make it work with the GOP, please move the code. -- To view, visit https://review.coreboot.org/c/coreboot/+/78691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie2a3b9f1212a9dcab2b7305078fe22ee35e7423c Gerrit-Change-Number: 78691 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paz Zcharya <pazz(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:27:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/arm64/arch_timer: Fix possible overflow in multiplication
by Arthur Heymans (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Julius Werner, Yidi Lin, Yu-Ping Wu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78800?usp=email ) Change subject: arch/arm64/arch_timer: Fix possible overflow in multiplication ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78800/comment/37f88cbf_66e493a3 : PS2, Line 9: The value from raw_read_cntfrq_el0() could be large enough to cause : overflow when multiplied by 1000000. To prevent this, both 1000000 and : tfreq can be reduced by dividing them by their GCD. I think it's worth adding this as a comment to the code. -- To view, visit https://review.coreboot.org/c/coreboot/+/78800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I366667de05392913150414f0fa9058725be71c52 Gerrit-Change-Number: 78800 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:17:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: [RFC] drivers/option: Add forms in cbtables
by Patrick Rudolph (Code Review) 31 Oct '23

31 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Lean Sheng Tan, Maximilian Brune, Nico Huber, Sean Rhodes. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) Change subject: [RFC] drivers/option: Add forms in cbtables ...................................................................... Patch Set 18: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74121/comment/6844eea8_49bc7309 : PS1, Line 7: [RFC] drivers/option: Add option list in cbtable > Historical coreboot provided a (CMOS) option list in a cbtable. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 18 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Oct 2023 16:13:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

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