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Change subject: [WIP] mb/amd/birman: Move EC FW to FMAP
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> I assume putting to 0x81000 is a must.
The EC can be placed at any offset that ends in 00. The first four bytes of the ROM are a signature that tells the EC where to look for its binary.
To move the EC.bin anywhere, the only necessary change is the EC_sig.bin
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Change subject: mb/google/brya/var/omnigul: Update GPIO settings
......................................................................
Patch Set 2:
(2 comments)
File src/mainboard/google/brya/variants/omnigul/gpio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167735):
https://review.coreboot.org/c/coreboot/+/71706/comment/e896ebfa_166d4da7
PS2, Line 73:
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167735):
https://review.coreboot.org/c/coreboot/+/71706/comment/f80470cb_5c483799
PS2, Line 73:
please, no spaces at the start of a line
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Change subject: mb/google/skyrim: Switch from LZMA to LZ4 compression for ramstage
......................................................................
Patch Set 1: Code-Review+2
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Change subject: src/lib: Include LZMA in romstage for FSP-M
......................................................................
Patch Set 1: Code-Review+2
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Change subject: Kconfig: Add option to compress ramstage with LZ4
......................................................................
Patch Set 1:
(1 comment)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/71673/comment/063a1075_ccae9664
PS1, Line 185: # Default value set at the end of the file
This comment no longer seems accurate
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Hello build bot (Jenkins), Sean Rhodes, Jeff Daly, Vanessa Eusebio, Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70050
to look at the new patch set (#7).
Change subject: soc/intel: Adopt new common/pmbase
......................................................................
soc/intel: Adopt new common/pmbase
Change-Id: I473ebefcf8e0c929f6cbf6b5c0d7e8f5af72856d
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/acer/aspire_vn7_572g/mainboard.c
M src/soc/intel/apollolake/pmutil.c
M src/soc/intel/common/block/pmc/pmclib.c
M src/soc/intel/common/block/smm/smihandler.c
M src/soc/intel/common/block/smm/smitraphandler.c
M src/soc/intel/denverton_ns/pmutil.c
M src/soc/intel/denverton_ns/smihandler.c
M src/soc/intel/denverton_ns/smm.c
M src/soc/intel/skylake/pmc.c
9 files changed, 53 insertions(+), 95 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/70050/7
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Hello build bot (Jenkins), Tarun Tuli, Sean Rhodes, Subrata Banik, Kapil Porwal, Lean Sheng Tan, Werner Zeh, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70052
to look at the new patch set (#6).
Change subject: soc/intel: Improve TCO accessors
......................................................................
soc/intel: Improve TCO accessors
Renames tco_read_reg() to tco_read16().
Renames tco_write_reg() to tco_write16().
Implement bitwise operations using <arch/io_ops.h>.
Change-Id: I0090585bf6f30482952af40a985b086cf7bd91e6
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/soc/intel/alderlake/pmutil.c
M src/soc/intel/apollolake/pmutil.c
M src/soc/intel/cannonlake/pmutil.c
M src/soc/intel/common/block/include/intelblocks/tco.h
M src/soc/intel/common/block/smbus/tco.c
M src/soc/intel/common/pch/include/intelpch/smbus.h
M src/soc/intel/elkhartlake/bootblock/bootblock.c
M src/soc/intel/elkhartlake/pmutil.c
M src/soc/intel/icelake/pmutil.c
M src/soc/intel/jasperlake/pmutil.c
M src/soc/intel/meteorlake/pmutil.c
M src/soc/intel/skylake/pmutil.c
M src/soc/intel/tigerlake/pmutil.c
13 files changed, 84 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/70052/6
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