coreboot-gerrit January 2023

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[S] Change in coreboot[master]: mb/google/dedede/var/dibbi: Generate SPD ID for supported parts Add s...
by Liam Flaherty (Code Review) 06 Jan '23

06 Jan '23

Liam Flaherty has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71710 ) Change subject: mb/google/dedede/var/dibbi: Generate SPD ID for supported parts Add supported memory parts in the mem_parts_used.txt and generate the SPD ID for the parts. ...................................................................... mb/google/dedede/var/dibbi: Generate SPD ID for supported parts Add supported memory parts in the mem_parts_used.txt and generate the SPD ID for the parts. BUG=b:260934724, b:255447299 BRANCH=dedede TEST=build Change-Id: I8c95ced79e14bb4a99aa1fa5f4fc3bc0681cc1cc Signed-off-by: Liam Flaherty <liamflaherty(a)chromium.org> --- M src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc M src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt 3 files changed, 27 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/71710/1 diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc b/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc index eace2e4..e354c9d 100644 --- a/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! -# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. +# Generated by: +# ./util/spd_tools/bin/part_id_gen JSL lp4x ./src/mainboard/google/dedede/variants/dibbi/memory ./src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt -SPD_SOURCES = placeholder +SPD_SOURCES = +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D1NP-046 WT:B diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt index fa24790..8f91664 100644 --- a/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt @@ -1 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# ./util/spd_tools/bin/part_id_gen JSL lp4x ./src/mainboard/google/dedede/variants/dibbi/memory ./src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt + DRAM Part Name ID to assign +MT53E512M32D1NP-046 WT:B 0 (0000) diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt index 9621137..5d306f1 100644 --- a/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt @@ -1,11 +1 @@ -# This is a CSV file containing a list of memory parts used by this variant. -# One part per line with an optional fixed ID in column 2. -# Only include a fixed ID if it is required for legacy reasons! -# Generated IDs are dependent on the order of parts in this file, -# so new parts must always be added at the end of the file! -# -# Generate an updated Makefile.inc and dram_id.generated.txt by running the -# part_id_gen tool from util/spd_tools. -# See util/spd_tools/README.md for more details and instructions. - -# Part Name +MT53E512M32D1NP-046 WT:B -- To view, visit https://review.coreboot.org/c/coreboot/+/71710 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c95ced79e14bb4a99aa1fa5f4fc3bc0681cc1cc Gerrit-Change-Number: 71710 Gerrit-PatchSet: 1 Gerrit-Owner: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/dedede: Create dibbi variant Create the dibbi variant of th...
by Liam Flaherty (Code Review) 06 Jan '23

06 Jan '23

Liam Flaherty has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71709 ) Change subject: mb/google/dedede: Create dibbi variant Create the dibbi variant of the waddledee reference board by copying the template files to a new directory. ...................................................................... mb/google/dedede: Create dibbi variant Create the dibbi variant of the waddledee reference board by copying the template files to a new directory. BUG=b:260934018 BRANCH=dedede TEST=util/abuild/abuild -p none -t google/dedede -x -a includes GOOGLE_DIBBI Change-Id: I3b8d4e7f8a53323f56567cbbc03bab7f8804f286 Signed-off-by: Liam Flaherty <liamflaherty(a)chromium.org> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Kconfig.name A src/mainboard/google/dedede/variants/dibbi/include/variant/ec.h A src/mainboard/google/dedede/variants/dibbi/include/variant/gpio.h A src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc A src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt A src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt A src/mainboard/google/dedede/variants/dibbi/overridetree.cb 8 files changed, 97 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/71709/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 8901da3..ca72da1 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -88,6 +88,7 @@ config MAINBOARD_PART_NUMBER default "Boten" if BOARD_GOOGLE_BOTEN + default "Dibbi" if BOARD_GOOGLE_DIBBI default "Dedede" if BOARD_GOOGLE_DEDEDE default "Drawcia" if BOARD_GOOGLE_DRAWCIA default "Madoo" if BOARD_GOOGLE_MADOO @@ -127,6 +128,7 @@ config VARIANT_DIR default "boten" if BOARD_GOOGLE_BOTEN + default "dibbi" if BOARD_GOOGLE_DIBBI default "dedede" if BOARD_GOOGLE_DEDEDE default "drawcia" if BOARD_GOOGLE_DRAWCIA default "madoo" if BOARD_GOOGLE_MADOO diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 4f2fa04..eeed1aa 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -8,6 +8,10 @@ select DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR +config BOARD_GOOGLE_DIBBI + bool "-> Dibbi" + select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 + config BOARD_GOOGLE_DEDEDE bool "-> Dedede" select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 diff --git a/src/mainboard/google/dedede/variants/dibbi/include/variant/ec.h b/src/mainboard/google/dedede/variants/dibbi/include/variant/ec.h new file mode 100644 index 0000000..08870e0 --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/dedede/variants/dibbi/include/variant/gpio.h b/src/mainboard/google/dedede/variants/dibbi/include/variant/gpio.h new file mode 100644 index 0000000..9078664 --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc b/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt new file mode 100644 index 0000000..fa24790 --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt new file mode 100644 index 0000000..9621137 --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb new file mode 100644 index 0000000..404024b --- /dev/null +++ b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb @@ -0,0 +1,42 @@ +chip soc/intel/jasperlake + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C0 | Trackpad | + #| I2C1 | Digitizer | + #| I2C2 | Touchscreen | + #| I2C3 | Camera | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + }" + + device domain 0 on + device pci 15.0 on end + end +end -- To view, visit https://review.coreboot.org/c/coreboot/+/71709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b8d4e7f8a53323f56567cbbc03bab7f8804f286 Gerrit-Change-Number: 71709 Gerrit-PatchSet: 1 Gerrit-Owner: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/common: Add Kconfig option for Intel Key Locker
by Sridhar Siricilla (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Felix Singer, Paul Menzel, Pratikkumar V Prajapati. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71118 ) Change subject: soc/intel/common: Add Kconfig option for Intel Key Locker ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia78e9bfe7ba2fd4e45b4821c95b19b8e580dccab Gerrit-Change-Number: 71118 Gerrit-PatchSet: 14 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Fri, 06 Jan 2023 03:38:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro
by Sridhar Siricilla (Code Review) 06 Jan '23

06 Jan '23

Sridhar Siricilla has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71646 ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro ...................................................................... soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro to get extended CPU capabilities flags using cpuid_ext inline function. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71646 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 23 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Sridhar Siricilla: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 534feb1..1f98325 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -506,8 +506,8 @@ { struct cpuid_result cpuid_regs; - cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[13] is feature capability */ - + /* ECX[13] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); return (cpuid_regs.ecx & TME_SUPPORTED); } @@ -529,7 +529,8 @@ struct cpuid_result cpuid_regs; msr_t msr; - cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ + /* EBX[2] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); } @@ -539,7 +540,8 @@ struct cpuid_result cpuid_regs; msr_t msr; - cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[23] is feature capability */ + /* ECX[23] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); } -- To view, visit https://review.coreboot.org/c/coreboot/+/71646 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 Gerrit-Change-Number: 71646 Gerrit-PatchSet: 5 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/hp/z220_series: Drop VBOOT support
by Yu-Ping Wu (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Felix Singer, Patrick Rudolph, Julius Werner. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70295 ) Change subject: mb/hp/z220_series: Drop VBOOT support ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > What's the benefit here? I don't understand the problem. […] The original goal is to deprecate VBOOT_VBNV_CMOS and replace with VBOOT_VBNV_FLASH. However, when I tried to enable VBOOT for HP_Z220_CMT_WORKSTATION (by `select VBOOT` for BOARD_HP_Z220_SERIES_COMMON), the build failed: E: Image is missing 'GBB' region The problem is that the board doesn't even have a valid .fmd file for VBOOT. For VBOOT to work the GBB and RW regions must exist. Therefore I just think VBOOT was never supported from the very first. -- To view, visit https://review.coreboot.org/c/coreboot/+/70295 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dcabda5e8ee3a0084736d3674dca31d1f5a641f Gerrit-Change-Number: 70295 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 06 Jan 2023 03:34:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku
by Frank Chu (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Tarun Tuli. Hello Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71691 to look at the new patch set (#3). Change subject: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku ...................................................................... mb/google/brya/var/marasov: Disable touch panel power for non-touch sku Disable touch panel power for non-touch sku by fw_config TOUCH field. BUG=b:263452842 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I4736f94481512806377b733b26fdc7290046c555 --- M src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/fw_config.c M src/mainboard/google/brya/variants/marasov/overridetree.cb 3 files changed, 52 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/71691/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/71691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4736f94481512806377b733b26fdc7290046c555 Gerrit-Change-Number: 71691 Gerrit-PatchSet: 3 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku
by Frank Chu (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Tarun Tuli. Hello Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71691 to look at the new patch set (#2). Change subject: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku ...................................................................... mb/google/brya/var/marasov: Disable touch panel power for non-touch sku Disable touch panel power for non-touch sku by fw_config TOUCH field. BUG=b:263452842 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I4736f94481512806377b733b26fdc7290046c555 --- M src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/fw_config.c M src/mainboard/google/brya/variants/marasov/overridetree.cb 3 files changed, 53 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/71691/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4736f94481512806377b733b26fdc7290046c555 Gerrit-Change-Number: 71691 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: src/sbom/Makefile.inc: Fix quotes on CONFIG paths
by Felix Singer (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Maximilian Brune. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71519 ) Change subject: src/sbom/Makefile.inc: Fix quotes on CONFIG paths ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71519/comment/04b67789_fb65104c PS2, Line 9: Make will not find the build targets unless quotes are removed Missing dot. -- To view, visit https://review.coreboot.org/c/coreboot/+/71519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddf4e0cd8a11eaf327d6f55baf38a30c566d0f28 Gerrit-Change-Number: 71519 Gerrit-PatchSet: 2 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Fri, 06 Jan 2023 03:21:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya/variants/marasov: Disable touch panel power for non-to...
by Frank Chu (Code Review) 06 Jan '23

06 Jan '23

Frank Chu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71691 ) Change subject: mb/google/brya/variants/marasov: Disable touch panel power for non-touch sku ...................................................................... mb/google/brya/variants/marasov: Disable touch panel power for non-touch sku Disable touch panel power for non-touch sku by fw_config TOUCH field. BUG=b:263452842 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I4736f94481512806377b733b26fdc7290046c555 --- M src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/fw_config.c M src/mainboard/google/brya/variants/marasov/overridetree.cb 3 files changed, 53 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/71691/1 diff --git a/src/mainboard/google/brya/variants/marasov/Makefile.inc b/src/mainboard/google/brya/variants/marasov/Makefile.inc index 139345f..4d25f34e 100644 --- a/src/mainboard/google/brya/variants/marasov/Makefile.inc +++ b/src/mainboard/google/brya/variants/marasov/Makefile.inc @@ -2,6 +2,7 @@ bootblock-y += gpio.c romstage-y += gpio.c +ramstage-$(CONFIG_FW_CONFIG) += fw_config.c romstage-y += memory.c diff --git a/src/mainboard/google/brya/variants/marasov/fw_config.c b/src/mainboard/google/brya/variants/marasov/fw_config.c new file mode 100644 index 0000000..4e923c8 --- /dev/null +++ b/src/mainboard/google/brya/variants/marasov/fw_config.c @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootstate.h> +#include <console/console.h> +#include <fw_config.h> +#include <gpio.h> + +static const struct pad_config touch_enable_pads[] = { + /* C0 : SMBCLK ==> EN_PP3300_TCHSCR */ + PAD_CFG_GPO(GPP_C0, 1, DEEP), +}; + +static const struct pad_config touch_disable_pads[] = { + /* C0 : SMBCLK ==> NC */ + PAD_NC(GPP_C0, NONE), +}; + +static void fw_config_handle(void *unused) +{ + if (fw_config_probe(FW_CONFIG(TOUCH, TOUCH_ELAN0001))) { + printk(BIOS_INFO, "Configure Touch GPIO GPP_C0 to GPO_H.\n"); + gpio_configure_pads(touch_enable_pads, ARRAY_SIZE(touch_enable_pads)); + } else if (fw_config_probe(FW_CONFIG(TOUCH, TOUCH_NONE))) { + printk(BIOS_INFO, "Configure Touch GPIO GPP_C0 to NC.\n"); + gpio_configure_pads(touch_disable_pads, ARRAY_SIZE(touch_disable_pads)); + } +} +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index bf9d5e0..e90df9e 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -12,6 +12,10 @@ option UFC_USB 0 option UFC_MIPI 1 end + field TOUCH 5 5 + option TOUCH_NONE 0 + option TOUCH_ELAN0001 1 + end field STORAGE 30 31 option STORAGE_UNKNOWN 0 option STORAGE_NVME 1 @@ -163,7 +167,9 @@ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "stop_off_delay_ms" = "1" register "has_power_resource" = "1" - device i2c 10 on end + device i2c 10 on + probe TOUCH TOUCH_ELAN0001 + end end end #I2C3 device ref i2c5 on -- To view, visit https://review.coreboot.org/c/coreboot/+/71691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4736f94481512806377b733b26fdc7290046c555 Gerrit-Change-Number: 71691 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: mb/google/brya/var/omnigul: Update GPIO settings
by Jamie Chen (Code Review) 06 Jan '23

06 Jan '23

Attention is currently required from: Tarun Tuli, Dtrain Hsu, Ian Feng. Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71706 ) Change subject: mb/google/brya/var/omnigul: Update GPIO settings ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/71706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5cfaa8fce6df7f09b744fb3e0b7b1d5b6acdc79b Gerrit-Change-Number: 71706 Gerrit-PatchSet: 4 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 06 Jan 2023 03:14:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2023