coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: utils/cbfstool: Disable Wstrict-prototypes warning
by Manoj Gupta (Code Review) 02 May '22

02 May '22

Attention is currently required from: Paul Menzel. Manoj Gupta has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63936 ) Change subject: utils/cbfstool: Disable Wstrict-prototypes warning ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Can the LZ4 code be updated instead? As noted in commit message, the original attempt in crrev.com/c/3612466 did that way but disabling the warning was suggested. -- To view, visit https://review.coreboot.org/c/coreboot/+/63936 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f3ae01821447f43b4082598dd618d9f8325dca2 Gerrit-Change-Number: 63936 Gerrit-PatchSet: 2 Gerrit-Owner: Manoj Gupta <manojgupta(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 02 May 2022 16:51:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cmn/spi: Add ACPI SSDT extension for fast SPI
by Nico Huber (Code Review) 02 May '22

02 May '22

Attention is currently required from: Werner Zeh. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63982 ) Change subject: soc/intel/cmn/spi: Add ACPI SSDT extension for fast SPI ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: The implementation looks good. However TBH, I would prefer a separate driver under fast_spi/. This file is already used as a dump for random things with SPI in its name, AFAICS. The fast_spi controllers are not useful for generic SPI slaves but only for NOR flash and TPMs and abs- tract all SPI details in both cases. While the original purpose of this driver seems to be to handle generic SPI slaves. File src/soc/intel/common/block/spi/spi.c: https://review.coreboot.org/c/coreboot/+/63982/comment/418636c0_fea4038e PS1, Line 192: .acpi_hid = spi_acpi_hid, : .acpi_name = spi_acpi_name, Technically, these two hooks are only useful if another driver generates the ACPI code and needs to call these for an abstract device pointer. With the local .acpi_fill_ssdt implementation, we know what device we have anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/63982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa89cdf41f42d4df5b46f095e22924157d9f3c3f Gerrit-Change-Number: 63982 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 02 May 2022 16:35:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
by Ethan Tsao (Code Review) 02 May '22

02 May '22

Attention is currently required from: Felix Singer, Jamie Ryu, Wonkyu Kim, Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Angel Pons, Raj Astekar. Ethan Tsao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 ) Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock ...................................................................... Patch Set 9: (2 comments) File src/soc/intel/meteorlake/include/soc/pci_devs.h: https://review.coreboot.org/c/coreboot/+/62772/comment/881dc01d_361dfd0a PS7, Line 110: #define PCI_DEVFN_CSE_IDER _PCI_DEVFN(CSE, 2) : #define PCI_DEVFN_CSE_KT _PCI_DEVFN(CSE, 3) > Do these still exist? Yes, It is still exist. File src/soc/intel/meteorlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/62772/comment/8a488610_fad12ac4 PS7, Line 29: #define PID_IOM 0xAA : #define PID_TC_IOM 0xAA > Is it intentional that these defines have the same value? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 9 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Ethan Tsao <ethan.tsao(a)intel.corp-partner.google.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Mon, 02 May 2022 16:33:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/../systemagent: Add sa_get_mchbar_base api
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Wonkyu Kim, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Michael Niewöhner. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63615 ) Change subject: intel/common/../systemagent: Add sa_get_mchbar_base api ...................................................................... Patch Set 16: (1 comment) Patchset: PS16: > IO decoding/extend BIOS area/TCO base etc. @Subrata, I'm not worried about #2 because if one forgets to enable MCHBAR early the resulting issues will be easy to notice. I'm pretty sure that the MMIO accesses to "MCHBAR" (when MCHBAR MMIO window is not enabled) would hit DRAM, and IIRC the SA prevents accesses to DRAM before it has been initialized (on Haswell, the system locks up). -- To view, visit https://review.coreboot.org/c/coreboot/+/63615 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4c7af3ea8c2b2b6afcc76e1165fadbe15e0bceb Gerrit-Change-Number: 63615 Gerrit-PatchSet: 16 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Mon, 02 May 2022 16:11:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/acpi/debug.asl: Drop POST code stuff
by Lean Sheng Tan (Code Review) 02 May '22

02 May '22

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Angel Pons. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63986 ) Change subject: arch/x86/acpi/debug.asl: Drop POST code stuff ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd73e5c1f700fd7e735bed1668f02da8f9a3adf3 Gerrit-Change-Number: 63986 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 15:58:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Implement IOC driver
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Jamie Ryu, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Tim Wawrzynczak, Arthur Heymans, Nick Vaccaro. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63198 ) Change subject: soc/intel/common: Implement IOC driver ...................................................................... Patch Set 21: (2 comments) File src/soc/intel/common/block/ioc/ioc.c: https://review.coreboot.org/c/coreboot/+/63198/comment/161154a1_d1e3c8cd PS21, Line 26: uint16_t Why is this offset 16-bit? File src/soc/intel/common/pch/lockdown/lockdown.c: https://review.coreboot.org/c/coreboot/+/63198/comment/4427434e_70860b1e PS21, Line 41: : #if !CONFIG(SOC_INTEL_COMMON_BLOCK_IOC) > using C is not working unless we define dummy definitions for GPMR_DMICTL which is not exist in IOC […] You could use the `dead_code_t` macro, put this in ioc_gpmr.c: #include <assert.h> #define GPMR_DMICTL dead_code_t(unsigned int) -- To view, visit https://review.coreboot.org/c/coreboot/+/63198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I768027c2ca78310c03845f70f17df19dc8cd0982 Gerrit-Change-Number: 63198 Gerrit-PatchSet: 21 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 15:57:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
by Jonathan Zhang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Arthur Heymans, Patrick Rudolph, Paul Menzel, Jingle Hsu, Angel Pons, Nill Ge, Marc Jones, Subrata Banik, Johnny Lin, lichenchen.carl, Tim Chu, Shelly Chang. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63882 ) Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63882 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3ff1353667f9d3bd302db42c739b7be9d3f4a32 Gerrit-Change-Number: 63882 Gerrit-PatchSet: 8 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Patrick Rudolph Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Comment-Date: Mon, 02 May 2022 15:55:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines
by Jonathan Zhang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Angel Pons, Arthur Heymans, Morgan Jang, Tim Chu. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63989 ) Change subject: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5 Gerrit-Change-Number: 63989 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 02 May 2022 15:53:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/amd/common: Move RAM calcualtion to common code
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Nico Huber, Michał Żygowski, Michał Kopeć, Paul Menzel, Arthur Heymans, Krystian Hebel, Kyösti Mälkki. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61682 ) Change subject: nb/amd/common: Move RAM calcualtion to common code ...................................................................... Patch Set 6: (1 comment) File src/northbridge/amd/agesa/family14/northbridge.c: https://review.coreboot.org/c/coreboot/+/61682/comment/4d9898d2_17d2e5d3 PS6, Line 27: static unsigned int fx_devs = 0; > Started working on the follow-up patch in CB:63985 I'd simplify the fx_devs stuff first. -- To view, visit https://review.coreboot.org/c/coreboot/+/61682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d222f6cbd26fe78d968d2883984f25e8b62ab5c Gerrit-Change-Number: 61682 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 15:03:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Kopeć <michal.kopec(a)3mdeb.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Morgan Jang, Tim Chu. Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63989 ) Change subject: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines ...................................................................... mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines Use common ASL defines for POST code handling. Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/ocp/deltalake/acpi/platform.asl M src/mainboard/ocp/tiogapass/acpi/platform.asl M src/soc/intel/xeon_sp/acpi/iiostack.asl 3 files changed, 3 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/63989/1 diff --git a/src/mainboard/ocp/deltalake/acpi/platform.asl b/src/mainboard/ocp/deltalake/acpi/platform.asl index fa6a451..5a15b29 100644 --- a/src/mainboard/ocp/deltalake/acpi/platform.asl +++ b/src/mainboard/ocp/deltalake/acpi/platform.asl @@ -21,13 +21,7 @@ APMS, 8 // APM status } -/* Port 80 POST */ -OperationRegion (DBG0, SystemIO, 0x80, 0x02) -Field (DBG0, ByteAcc, Lock, Preserve) -{ - IO80, 8, - IO81, 8 -} +#include <arch/x86/acpi/post.asl> /* IO-Trap at 0x800. * This is the ACPI->SMI communication interface. diff --git a/src/mainboard/ocp/tiogapass/acpi/platform.asl b/src/mainboard/ocp/tiogapass/acpi/platform.asl index 9f51fdf..782d2cd 100644 --- a/src/mainboard/ocp/tiogapass/acpi/platform.asl +++ b/src/mainboard/ocp/tiogapass/acpi/platform.asl @@ -21,13 +21,7 @@ APMS, 8 // APM status } -/* Port 80 POST */ -OperationRegion (DBG0, SystemIO, 0x80, 0x02) -Field (DBG0, ByteAcc, Lock, Preserve) -{ - IO80, 8, - IO81, 8 -} +#include <arch/x86/acpi/post.asl> /* IO-Trap at 0x800. * This is the ACPI->SMI communication interface. diff --git a/src/soc/intel/xeon_sp/acpi/iiostack.asl b/src/soc/intel/xeon_sp/acpi/iiostack.asl index 4b2b65b..73f9937 100644 --- a/src/soc/intel/xeon_sp/acpi/iiostack.asl +++ b/src/soc/intel/xeon_sp/acpi/iiostack.asl @@ -58,7 +58,7 @@ { \ /* indicate unrecognized UUID */ \ CDW1 |= 0x04 \ - IO80 = 0xEE \ + DBG0 = 0xEE \ Return (Arg3) \ } \ } \ -- To view, visit https://review.coreboot.org/c/coreboot/+/63989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5 Gerrit-Change-Number: 63989 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newchange

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