coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/nissa/var/craask: Add supported touchpad
by Reka Norman (Code Review) 05 May '22

05 May '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Tyler Wang, Nick Vaccaro. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64071 ) Change subject: mb/google/nissa/var/craask: Add supported touchpad ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b3bb5cec56901dadaaa1c5699781df45c237257 Gerrit-Change-Number: 64071 Gerrit-PatchSet: 3 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cathy Chen <cathy_chen(a)quanta.corp-partner.google.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 06 May 2022 00:54:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/mp_init.c: Add wait_finished_mp_run_on_all_cpus
by Kane Chen (Code Review) 05 May '22

05 May '22

Attention is currently required from: Arthur Heymans, Kane Chen. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63566 to look at the new patch set (#8). Change subject: cpu/x86/mp_init.c: Add wait_finished_mp_run_on_all_cpus ...................................................................... cpu/x86/mp_init.c: Add wait_finished_mp_run_on_all_cpus This patch adds a parameter wait_ap_complete in mp_callback to decide when APs call store_callback to notify BSP it already takes jobs. This can allow the caller to decide whether it should wait all APs to continue or not. Change-Id: I8d1d49bca410c821a3ad0347548afc42eb860594 Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c M src/include/cpu/x86/mp.h 2 files changed, 61 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/63566/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/63566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d1d49bca410c821a3ad0347548afc42eb860594 Gerrit-Change-Number: 63566 Gerrit-PatchSet: 8 Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/spd: Demote log about using default DDR4 params to NOTICE
by Subrata Banik (Code Review) 05 May '22

05 May '22

Attention is currently required from: Reka Norman, Paul Menzel, Ivy Jian, Julius Werner, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63774 ) Change subject: lib/spd: Demote log about using default DDR4 params to NOTICE ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55f0968b78baaa2fc9a6bbebf6712fb8bfd349f6 Gerrit-Change-Number: 63774 Gerrit-PatchSet: 5 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 06 May 2022 00:05:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/system76: TGL-U: Disable AER for CPU PCIe RP
by Tim Crawford (Code Review) 05 May '22

05 May '22

Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64080 ) Change subject: mb/system76: TGL-U: Disable AER for CPU PCIe RP ...................................................................... mb/system76: TGL-U: Disable AER for CPU PCIe RP Disable PCIe Advanced Error Reporting on the CPU root port to prevent some SSDs from timing out on suspend. Change-Id: I79da6b08ef1949f3bf1c6111aaa7e658bd29c0e2 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/galp5/ramstage.c M src/mainboard/system76/lemp10/ramstage.c 2 files changed, 8 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/64080/1 diff --git a/src/mainboard/system76/galp5/ramstage.c b/src/mainboard/system76/galp5/ramstage.c index dec2a89..7510ecb 100644 --- a/src/mainboard/system76/galp5/ramstage.c +++ b/src/mainboard/system76/galp5/ramstage.c @@ -3,11 +3,10 @@ #include <soc/ramstage.h> #include "gpio.h" -static void mainboard_init(void *chip_info) +void mainboard_silicon_init_params(FSP_S_CONFIG *params) { + // Disable AER to fix suspend failing with some SSDs. + params->CpuPcieRpAdvancedErrorReporting[0] = 0; + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } - -struct chip_operations mainboard_ops = { - .init = mainboard_init, -}; diff --git a/src/mainboard/system76/lemp10/ramstage.c b/src/mainboard/system76/lemp10/ramstage.c index a3b12bb..633d6c5 100644 --- a/src/mainboard/system76/lemp10/ramstage.c +++ b/src/mainboard/system76/lemp10/ramstage.c @@ -3,11 +3,10 @@ #include <mainboard/gpio.h> #include <soc/ramstage.h> -static void mainboard_init(void *chip_info) +void mainboard_silicon_init_params(FSP_S_CONFIG *params) { + // Disable AER to fix suspend failing with some SSDs. + params->CpuPcieRpAdvancedErrorReporting[0] = 0; + mainboard_configure_gpios(); } - -struct chip_operations mainboard_ops = { - .init = mainboard_init, -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/64080 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79da6b08ef1949f3bf1c6111aaa7e658bd29c0e2 Gerrit-Change-Number: 64080 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: ec/acpi: Refactor to reduce code duplication, use named constants
by Abel Briggs (Code Review) 05 May '22

05 May '22

Attention is currently required from: Lean Sheng Tan. Abel Briggs has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64012 ) Change subject: ec/acpi: Refactor to reduce code duplication, use named constants ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > has this been tested with any hardware? Not yet. I am currently in the process of rebasing the WIP patchset for the (currently unsupported) Lenovo mainboard I have in order to test the general refactoring changes in this patchset, but for other affected boards, I would need to consult the mailing list for willing testers to ensure there are no regressions. I can move this back to WIP until I have testing artifacts, if that's preferred. The rationale for this patchset was that I needed to factor out the EC of `mb/lenovo/s230u` into its own standalone folder to reuse it for my mainboard, but after seeing the current state of various standalone ECs, I was not comfortable duplicating code. Semantically, this patchset (at least, this commit) should behave identically to master in cases where the UUT has a known-working EC which follows the standard EC hardware API. If the EC is non-functional, the `send` and `recv` functions will now avoid reading and writing to I/O space. The vast majority of callers on these functions do not read the return value and effectively do not care about errors, so this patch should change little (they're already invoking the equivalent of undefined behavior if the EC fails). For the callers which do care about errors, we should try to ensure correct behavior. I could not find a rationale as to why the return statements were commented out in the original implementation of these functions. -- To view, visit https://review.coreboot.org/c/coreboot/+/64012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifda5c030ff81f1046be58aa1fcafdcf71a27cd41 Gerrit-Change-Number: 64012 Gerrit-PatchSet: 2 Gerrit-Owner: Abel Briggs <abelbriggs1(a)hotmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 05 May 2022 23:15:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/nissa: add RO_GSCVD section to WP_RO
by Reka Norman (Code Review) 05 May '22

05 May '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64067 ) Change subject: mb/google/nissa: add RO_GSCVD section to WP_RO ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64067 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5c03aca56e659d61c31613b284a55d0eba0d843 Gerrit-Change-Number: 64067 Gerrit-PatchSet: 1 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 05 May 2022 23:02:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Raul Rangel (Code Review) 05 May '22

05 May '22

Attention is currently required from: Robert Zieba, Nico Huber, Paul Menzel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63657 ) Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... Patch Set 12: (11 comments) File src/arch/x86/breakpoint.c: https://review.coreboot.org/c/coreboot/+/63657/comment/94fb64ca_3df2dccc PS12, Line 44: = { 0 } nit: IMO you should remove this. https://review.coreboot.org/c/coreboot/+/63657/comment/7450605e_022d6003 PS12, Line 105: breakpoints[i].handler = NULL; Did you want to clear the type as well? https://review.coreboot.org/c/coreboot/+/63657/comment/13190eb3_e9208b7f PS12, Line 176: type Don't you need to assign the type to res->type? https://review.coreboot.org/c/coreboot/+/63657/comment/8154bfdb_4bb0f5af PS12, Line 199: breakpoints[bp].handler = NULL; Maybe remove the clear from the allocate method? https://review.coreboot.org/c/coreboot/+/63657/comment/59a36ee5_e34e4ac2 PS12, Line 250: ; ;; File src/arch/x86/exception.c: https://review.coreboot.org/c/coreboot/+/63657/comment/6883cbab_8e685a6d PS12, Line 3: #include "include/arch/breakpoint.h" Is this different than the one in line 5? File src/arch/x86/include/arch/breakpoint.h: https://review.coreboot.org/c/coreboot/+/63657/comment/7927dd17_26eed4d4 PS12, Line 8: ENV_ROMSTAGE Does this not work in bootblock? https://review.coreboot.org/c/coreboot/+/63657/comment/19b5e0d8_c54c0c69 PS12, Line 40: breakpoint_get_type Does this need to be public? https://review.coreboot.org/c/coreboot/+/63657/comment/64ccd91b_4ea15a54 PS12, Line 49: breakpoint_is_hit Does this need to be public? File src/arch/x86/null_breakpoint.c: https://review.coreboot.org/c/coreboot/+/63657/comment/7f3fafbc_1862a95c PS12, Line 29: int Should we use uintptr_t? https://review.coreboot.org/c/coreboot/+/63657/comment/635db1f7_e4bcfd99 PS12, Line 41: 1 true -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 12 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 05 May 2022 22:17:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
by Subrata Banik (Code Review) 05 May '22

05 May '22

Attention is currently required from: Felix Singer, Jamie Ryu, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Angel Pons, Raj Astekar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 ) Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock ...................................................................... Patch Set 15: (1 comment) File src/soc/intel/meteorlake/bootblock/report_platform.c: https://review.coreboot.org/c/coreboot/+/62772/comment/51d58620_6fd889e3 PS9, Line 16: #define PCI_DID_INTEL_NO_GT 0xffff > Remove? It's unused. yes for sure, thanks, I missed it. -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 15 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ethan Tsao <ethan.tsao(a)intel.corp-partner.google.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Thu, 05 May 2022 22:04:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
by Angel Pons (Code Review) 05 May '22

05 May '22

Attention is currently required from: Felix Singer, Jamie Ryu, Subrata Banik, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 ) Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock ...................................................................... Patch Set 15: (2 comments) File src/soc/intel/meteorlake/bootblock/report_platform.c: https://review.coreboot.org/c/coreboot/+/62772/comment/9b8fc0c8_1711651d PS9, Line 16: #define PCI_DID_INTEL_NO_GT 0xffff Remove? It's unused. File src/soc/intel/meteorlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/62772/comment/5e76aeaf_8c2fd777 PS13, Line 63: : #define IOE_PCR_ABOVE_4G_BASE_ADDR 0x3fff0000000 : #define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR : #define IOE_P2SB_SIZE (256 * MiB) : : #define IOM_BASE_ADDR 0x3fff0aa0000 : #define IOM_BASE_SIZE 0x1600 : #define IOM_BASE_ADDR_MAX 0x3fff0aa15ff > Done But these ranges are above 4 GiB, how can coreboot access them? -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 15 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ethan Tsao <ethan.tsao(a)intel.corp-partner.google.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Thu, 05 May 2022 21:50:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Tim Wawrzynczak (Code Review) 05 May '22

05 May '22

Attention is currently required from: Robert Zieba, Raul Rangel, Nico Huber, Paul Menzel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63657 ) Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... Patch Set 12: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 12 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 05 May 2022 21:27:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2022