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Hello Shelley Chen, Hung-Te Lin, build bot (Jenkins), Angel Pons, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56789
to look at the new patch set (#54).
Change subject: libpayload/pci: Add support for bus mapping
......................................................................
libpayload/pci: Add support for bus mapping
Move the common APIs to pci_ops.c and IO based operations to
pci_io_ops.c, add pci_map_bus_ops.c to support bus mapping.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
BRANCH=cherry
Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com>
Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554
---
M payloads/libpayload/Kconfig
M payloads/libpayload/drivers/Makefile.inc
A payloads/libpayload/drivers/pci_io_ops.c
A payloads/libpayload/drivers/pci_map_bus_ops.c
R payloads/libpayload/drivers/pci_ops.c
M payloads/libpayload/include/pci.h
6 files changed, 138 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/56789/54
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Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56789 )
Change subject: libpayload/pci: Add support for bus mapping
......................................................................
Patch Set 53:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56789/comment/c473ea48_ef79f83b
PS2, Line 7: Split PCI interfaces as common and chip related
> Shelly, could you take over to review this? […]
I think that it's fine to have the different definitions for the pci_*config* functions structured like this.
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56789 )
Change subject: libpayload/pci: Add support for bus mapping
......................................................................
Patch Set 53: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56789/comment/efcd291f_3e71d387
PS53, Line 9: pci_common.c
No such file. Please update the commit message.
Patchset:
PS53:
> nit: do we need to update the copyright dates to 2022?
The old pci.c is split into pci_io_ops.c and pci_ops.c without modifying anything, so I guess the license doesn't need to be updated?
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Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63366 )
Change subject: mb/google/brya/var/nereid: Configure descriptor for either Type-C or HDMI
......................................................................
Patch Set 11: Code-Review+2
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Change subject: hardwaremain.c: Drop checking the S3 resume
......................................................................
Patch Set 1:
(1 comment)
File src/lib/hardwaremain.c:
https://review.coreboot.org/c/coreboot/+/63413/comment/e055745b_4f354cc7
PS1, Line 464: acpi_is_wakeup_s3();
It's here to trigger the printk() in romstage_handoff_is_resume() early, and at same location in the log, regardless of platform code.
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