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Change subject: qualcomm/sc7280: Add support for edp and mdp driver
......................................................................
qualcomm/sc7280: Add support for edp and mdp driver
- Add support for edp aux read and write.
- Update edp panel properties based on edid read.
- Configure edp controller and edp phy.
BUG=b:182963902,b:216687885
TEST=Validated on qualcomm sc7280 development board.
Signed-off-by: Vinod Polimera <quic_vpolimer(a)quicinc.com>
Change-Id: If89abb76028766b19450e756889a5d7776106f95
---
M src/mainboard/google/herobrine/mainboard.c
M src/soc/qualcomm/sc7280/Kconfig
M src/soc/qualcomm/sc7280/Makefile.inc
A src/soc/qualcomm/sc7280/display/edp_aux.c
A src/soc/qualcomm/sc7280/display/edp_ctrl.c
A src/soc/qualcomm/sc7280/display/edp_phy_7nm.c
A src/soc/qualcomm/sc7280/display/mdss.c
A src/soc/qualcomm/sc7280/include/soc/display/edp_aux.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_ctrl.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_phy.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_reg.h
A src/soc/qualcomm/sc7280/include/soc/display/mdssreg.h
12 files changed, 3,142 insertions(+), 0 deletions(-)
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Change subject: sc7280: Performance improvement by removing delays in cpucp init
......................................................................
sc7280: Performance improvement by removing delays in cpucp init
As cpucp prepare takes 300 msec moving to before ramstage
BUG=b:218406702
TEST=Validated on qualcomm sc7280 development board
Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb
Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad(a)quicinc.com>
---
M src/mainboard/google/herobrine/romstage.c
M src/soc/qualcomm/sc7280/cpucp_load_reset.c
2 files changed, 11 insertions(+), 11 deletions(-)
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#46).
Change subject: libpayload: Add support for PCI MMIO CONFIG access.
......................................................................
libpayload: Add support for PCI MMIO CONFIG access.
Add MMIO method to access PCIe config space from payloads.
Defined read/write config 8/16/32 functions for ARM arch in
libpayload pci driver. In pci driver, PCIe MMIO config base
info extracts through coreboot tables and initializes the ATU
for every read/write config access.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
---
M payloads/libpayload/Kconfig
M payloads/libpayload/configs/config.herobrine
M payloads/libpayload/drivers/Makefile.inc
R payloads/libpayload/drivers/pci_io_ops.c
C payloads/libpayload/drivers/pci_mmio_ops.c
A payloads/libpayload/drivers/qc_pci_mmio_ops.c
M payloads/libpayload/include/pci.h
A payloads/libpayload/include/qc_pci.h
8 files changed, 250 insertions(+), 49 deletions(-)
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I'd like you to reexamine a change. Please visit
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Change subject: libpayload: Export PCIe config info from coreboot to libpayload
......................................................................
libpayload: Export PCIe config info from coreboot to libpayload
Export PCIe config base info to payloads through coreboot tables.
Fill PCIe config base, ATU address and config size in cbmem entry.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
Change-Id: I1ca2be55b98c8d1b86576072078cdda02ac55940
---
M payloads/libpayload/include/sysinfo.h
M payloads/libpayload/libc/coreboot.c
M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
M src/commonlib/include/commonlib/coreboot_tables.h
M src/include/boot/coreboot_tables.h
M src/lib/coreboot_table.c
6 files changed, 36 insertions(+), 2 deletions(-)
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Hello build bot (Jenkins),
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Change subject: sc7280: Add PCI config base address and length.
......................................................................
sc7280: Add PCI config base address and length.
Define PCIe config base address and config length
to allow config access from payloads.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
Change-Id: I492b2b5fb97e775e5928b1326209270f719f5651
---
M src/device/Kconfig
M src/soc/qualcomm/sc7280/Kconfig
2 files changed, 24 insertions(+), 0 deletions(-)
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Hello Shelley Chen, build bot (Jenkins), Julius Werner, mturney mturney,
I'd like you to reexamine a change. Please visit
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Change subject: sc7280: Add PCIe host controller driver
......................................................................
sc7280: Add PCIe host controller driver
Add support for PCIe host driver to configure
in RC (root complex) mode. Host driver will power on
the PHY, enable the PCIe link and start the bus enumeration.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
---
M src/mainboard/google/herobrine/mainboard.c
M src/soc/qualcomm/sc7280/Makefile.inc
M src/soc/qualcomm/sc7280/include/soc/addressmap.h
A src/soc/qualcomm/sc7280/include/soc/pcie.h
A src/soc/qualcomm/sc7280/include/soc/qcom_qmp_phy.h
A src/soc/qualcomm/sc7280/pcie_host.c
6 files changed, 1,594 insertions(+), 1 deletion(-)
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Change subject: soc/qualcomm/common: Fix bugs introduced with CB:59195
......................................................................
soc/qualcomm/common: Fix bugs introduced with CB:59195
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281
---
M src/soc/qualcomm/common/qclib.c
1 file changed, 17 insertions(+), 9 deletions(-)
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Change subject: src/commonlib/bsd: Add mem_chip_info_size() function
......................................................................
src/commonlib/bsd: Add mem_chip_info_size() function
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Change-Id: Iaada45d63b82c28495166024a9655d871ba65b20
---
M src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h
1 file changed, 7 insertions(+), 0 deletions(-)
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Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63339 )
Change subject: soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR Kconfig
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63339/comment/df0893f4_62974ac9
PS6, Line 11: stepping
> stepping A0
KConfig indicates the change is meant for A0. Since minor comment, I'm ignoring it.
https://review.coreboot.org/c/coreboot/+/63339/comment/4b4b0b9f_e90fef54
PS6, Line 12: removing
> remove
Since minor comment, I'm ignoring it.
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