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Hello build bot (Jenkins), Julius Werner,
I'd like you to reexamine a change. Please visit
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Change subject: src/commonlib/bsd: Add mem_chip_info_size() function
......................................................................
src/commonlib/bsd: Add mem_chip_info_size() function
Added helper function mem_chip_info_size() as size of mem_chip_info strcuture
is using in multiple places.
This fix bugs introduced with CB:59195
and commit sha: 4573ca42e675fb8b61bcf05591d8d4d05f93944d
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Change-Id: Iaada45d63b82c28495166024a9655d871ba65b20
---
M src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/63407/3
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Gerrit-Change-Number: 63407
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Hello Shelley Chen, build bot (Jenkins), Paul Menzel, Julius Werner, mturney mturney,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/53902
to look at the new patch set (#83).
Change subject: sc7280: Add PCIe host controller driver
......................................................................
sc7280: Add PCIe host controller driver
Add support for PCIe host driver to configure
in RC (root complex) mode. Host driver will power on
the PHY, enable the PCIe link and start the bus enumeration.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
---
M src/mainboard/google/herobrine/mainboard.c
M src/soc/qualcomm/sc7280/Makefile.inc
M src/soc/qualcomm/sc7280/include/soc/addressmap.h
A src/soc/qualcomm/sc7280/include/soc/pcie.h
A src/soc/qualcomm/sc7280/include/soc/qcom_qmp_phy.h
A src/soc/qualcomm/sc7280/pcie_host.c
6 files changed, 1,594 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/53902/83
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Hello Shelley Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: soc/qualcomm/common: Update helper function to know size of memchipinfo
......................................................................
soc/qualcomm/common: Update helper function to know size of memchipinfo
Update mem_chip_info_size() function with CB:63407 as size of mem_chip_info
strcuture is using in multiple places.
This fix bugs introduced with CB:59195
and commit sha: 4573ca42e675fb8b61bcf05591d8d4d05f93944d
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281
---
M src/soc/qualcomm/common/qclib.c
1 file changed, 17 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/63026/8
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63421 )
Change subject: mb/qemu-armv7: Initialize cbmem
......................................................................
Patch Set 3: Verified-1
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Attention is currently required from: Ravi Kumar Bokka, Shelley Chen, Furquan Shaikh, Arthur Heymans, Prasad Malisetty.
Hello build bot (Jenkins), Furquan Shaikh, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57615
to look at the new patch set (#47).
Change subject: libpayload: Add support for PCI MMIO CONFIG access.
......................................................................
libpayload: Add support for PCI MMIO CONFIG access.
Add MMIO method to access PCIe config space from payloads.
Defined read/write config 8/16/32 functions for ARM arch in
libpayload pci driver. In pci driver, PCIe MMIO config base
info extracts through coreboot tables and initializes the ATU
for every read/write config access.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
---
M payloads/libpayload/Kconfig
M payloads/libpayload/configs/config.herobrine
M payloads/libpayload/drivers/Makefile.inc
R payloads/libpayload/drivers/pci_io_ops.c
C payloads/libpayload/drivers/pci_mmio_ops.c
A payloads/libpayload/drivers/qc_pci_mmio_ops.c
M payloads/libpayload/include/pci.h
A payloads/libpayload/include/qc_pci.h
8 files changed, 250 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/57615/47
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Ravi Kumar Bokka has uploaded a new patch set (#263) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/36278 )
Change subject: HACK trogdor: optimize coreboot.rom for T32 flash script HACK
......................................................................
HACK trogdor: optimize coreboot.rom for T32 flash script HACK
Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8
Signed-off-by: T Michael Turney <mturney(a)codeaurora.org>
---
M src/security/vboot/Makefile.inc
A util/qualcomm/optimize_coreboot
2 files changed, 2 insertions(+), 0 deletions(-)
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Hello Shelley Chen, build bot (Jenkins),
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to look at the new patch set (#8).
Change subject: sc7280: Performance improvement by removing delays in cpucp init
......................................................................
sc7280: Performance improvement by removing delays in cpucp init
As cpucp prepare takes 300 msec moving to before ramstage
BUG=b:218406702
TEST=Validated on qualcomm sc7280 development board
Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb
Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad(a)quicinc.com>
---
M src/mainboard/google/herobrine/romstage.c
M src/soc/qualcomm/sc7280/cpucp_load_reset.c
2 files changed, 11 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/63085/8
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Hello Shelley Chen, build bot (Jenkins), mturney mturney, Furquan Shaikh, Arthur Heymans, Kyösti Mälkki,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57614
to look at the new patch set (#47).
Change subject: libpayload: Export PCIe config info from coreboot to libpayload
......................................................................
libpayload: Export PCIe config info from coreboot to libpayload
Export PCIe config base info to payloads through coreboot tables.
Fill PCIe config base, ATU address and config size in cbmem entry.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
Change-Id: I1ca2be55b98c8d1b86576072078cdda02ac55940
---
M payloads/libpayload/include/sysinfo.h
M payloads/libpayload/libc/coreboot.c
M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
M src/commonlib/include/commonlib/coreboot_tables.h
M src/include/boot/coreboot_tables.h
M src/lib/coreboot_table.c
6 files changed, 36 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/57614/47
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to look at the new patch set (#18).
Change subject: qualcomm/sc7280: Add support for edp and mdp driver
......................................................................
qualcomm/sc7280: Add support for edp and mdp driver
- Add support for edp aux read and write.
- Update edp panel properties based on edid read.
- Configure edp controller and edp phy.
BUG=b:182963902,b:216687885
TEST=Validated on qualcomm sc7280 development board.
Signed-off-by: Vinod Polimera <quic_vpolimer(a)quicinc.com>
Change-Id: If89abb76028766b19450e756889a5d7776106f95
---
M src/mainboard/google/herobrine/mainboard.c
M src/soc/qualcomm/sc7280/Kconfig
M src/soc/qualcomm/sc7280/Makefile.inc
A src/soc/qualcomm/sc7280/display/edp_aux.c
A src/soc/qualcomm/sc7280/display/edp_ctrl.c
A src/soc/qualcomm/sc7280/display/edp_phy_7nm.c
A src/soc/qualcomm/sc7280/display/mdss.c
A src/soc/qualcomm/sc7280/include/soc/display/edp_aux.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_ctrl.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_phy.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_reg.h
A src/soc/qualcomm/sc7280/include/soc/display/mdssreg.h
12 files changed, 3,142 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/61342/18
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#31).
Change subject: sc7280: Add PCI config base address and length.
......................................................................
sc7280: Add PCI config base address and length.
Define PCIe config base address and config length
to allow config access from payloads.
BUG=b:182963902,b:216686574,b:181098581
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com>
Change-Id: I492b2b5fb97e775e5928b1326209270f719f5651
---
M src/device/Kconfig
M src/soc/qualcomm/sc7280/Kconfig
2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/61773/31
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