Attention is currently required from: V Sowmya, Kangheui Won, Reka Norman, Rizwan Qureshi, Krishna P Bhat D, Usha P.
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62915 )
Change subject: mb/intel/adlrvp: Disable PM Timer for ADL-N
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62915/comment/98301c64_cd423129
PS3, Line 9: Keeping the PM timer enabled will disqualify an ADL system from entering
> We already have it disabled for all brya variants including nivviks and nereid. […]
Hi Kangheui/Reka,
Yes, It'll apply to all ADL-N platforms and all the boards including ADLRVP.
@Reka, We have not disabled it for ADL-P RVP for 2 reasons.
1. We were using reference platform Brya for most of the power measurement, so ADL-P RVP was not used for s0i3 measurement.
2. if we want to use Tianocore payload, we might require PM timer enabled.
Hope this clarifies :)
--
To view, visit https://review.coreboot.org/c/coreboot/+/62915
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I44651bf55df8e71a0a5a9a33ecbb8322ecd18575
Gerrit-Change-Number: 62915
Gerrit-PatchSet: 3
Gerrit-Owner: Usha P <usha.p(a)intel.com>
Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org>
Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com>
Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com>
Gerrit-Attention: Kangheui Won <khwon(a)chromium.org>
Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-Attention: Usha P <usha.p(a)intel.com>
Gerrit-Comment-Date: Thu, 07 Apr 2022 06:29:49 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Kangheui Won <khwon(a)chromium.org>
Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org>
Gerrit-MessageType: comment
Attention is currently required from: Arthur Heymans.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63421 )
Change subject: mb/qemu-armv7: Initialize cbmem
......................................................................
Patch Set 4: Verified-1
--
To view, visit https://review.coreboot.org/c/coreboot/+/63421
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I607205a0d44c71eb26031ced7a8af303efacd6f2
Gerrit-Change-Number: 63421
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Comment-Date: Thu, 07 Apr 2022 06:27:57 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Hung-Te Lin, Angel Pons, Jianjun Wang.
Hello build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56794
to look at the new patch set (#57).
Change subject: libpayload/pci: Add pci_map_bus function for MediaTek platform
......................................................................
libpayload/pci: Add pci_map_bus function for MediaTek platform
Add 'pci_map_bus' function and PCIE_MEDIATEK config for MediaTek
platform.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15b7
PCI SSVID : 0x15b7
SN : 21517J440114
MN : WDC PC SN530 SDBPTPZ-256G-1006
RAB : 0x4
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
BRANCH=cherry
Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com>
Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577
---
M payloads/libpayload/Kconfig
M payloads/libpayload/drivers/Makefile.inc
A payloads/libpayload/drivers/pcie_mediatek.c
3 files changed, 27 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/56794/57
--
To view, visit https://review.coreboot.org/c/coreboot/+/56794
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577
Gerrit-Change-Number: 56794
Gerrit-PatchSet: 57
Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-CC: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Paul Menzel, Julius Werner.
Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63407 )
Change subject: commonlib/bsd: Add mem_chip_info_size() function
......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63407/comment/94785272_baa05977
PS1, Line 7: src/commonlib/bsd: Fix bugs introduced with CB:59195
> This patch looks good to me code-wise but the commit message is wrong. […]
hi julius,
updated commit message with detailed description
Commit Message:
https://review.coreboot.org/c/coreboot/+/63407/comment/1ad1e9cd_e427109f
PS2, Line 7: src/
> Remove.
hi paul,
i have updated commit message
https://review.coreboot.org/c/coreboot/+/63407/comment/c6d83009_2f904ffd
PS2, Line 8:
> What is the function going to be used for?
updated commit message with detail information
--
To view, visit https://review.coreboot.org/c/coreboot/+/63407
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaada45d63b82c28495166024a9655d871ba65b20
Gerrit-Change-Number: 63407
Gerrit-PatchSet: 4
Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Comment-Date: Thu, 07 Apr 2022 06:14:01 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>
Gerrit-MessageType: comment