coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Kconfig: Set better defaults for building romstage
by Arthur Heymans (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Andrey Petrov. Hello build bot (Jenkins), Andrey Petrov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63419 to look at the new patch set (#10). Change subject: Kconfig: Set better defaults for building romstage ...................................................................... Kconfig: Set better defaults for building romstage On x86 there is generally no reason to have a separate romstage unless VBOOT is used. Change-Id: I4c53b6fa7a3e66415c5b1c539918a6c1cd8defa1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/Kconfig M src/soc/intel/apollolake/Kconfig 2 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/63419/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/63419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c53b6fa7a3e66415c5b1c539918a6c1cd8defa1 Gerrit-Change-Number: 63419 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7280: Performance improvement by removing delays in cpucp init
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Shelley Chen, Ravi Kumar Bokka. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63085 ) Change subject: sc7280: Performance improvement by removing delays in cpucp init ...................................................................... Patch Set 8: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb Gerrit-Change-Number: 63085 Gerrit-PatchSet: 8 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 06:12:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Add support for PCI MMIO CONFIG access.
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, Shelley Chen, Furquan Shaikh, Arthur Heymans, Prasad Malisetty. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57615 ) Change subject: libpayload: Add support for PCI MMIO CONFIG access. ...................................................................... Patch Set 47: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57615 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c Gerrit-Change-Number: 57615 Gerrit-PatchSet: 47 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 06:11:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add PCIe host controller driver
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, Furquan Shaikh, Julius Werner, Prasad Malisetty, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe host controller driver ...................................................................... Patch Set 82: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 82 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 06:10:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: HACK trogdor: optimize coreboot.rom for T32 flash script HACK
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, Shelley Chen, Sudheer Amrabadi, Julius Werner, Yu-Ping Wu. Ravi Kumar Bokka has uploaded a new patch set (#264) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/36278 ) Change subject: HACK trogdor: optimize coreboot.rom for T32 flash script HACK ...................................................................... HACK trogdor: optimize coreboot.rom for T32 flash script HACK Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/security/vboot/Makefile.inc A util/qualcomm/optimize_coreboot 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/36278/264 -- To view, visit https://review.coreboot.org/c/coreboot/+/36278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8 Gerrit-Change-Number: 36278 Gerrit-PatchSet: 264 Gerrit-Owner: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: qualcomm/sc7280: Add support for edp and mdp driver
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Shelley Chen, Ravi Kumar Bokka. Hello Shelley Chen, build bot (Jenkins), Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61342 to look at the new patch set (#19). Change subject: qualcomm/sc7280: Add support for edp and mdp driver ...................................................................... qualcomm/sc7280: Add support for edp and mdp driver - Add support for edp aux read and write. - Update edp panel properties based on edid read. - Configure edp controller and edp phy. BUG=b:182963902,b:216687885 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Vinod Polimera <quic_vpolimer(a)quicinc.com> Change-Id: If89abb76028766b19450e756889a5d7776106f95 --- M src/mainboard/google/herobrine/mainboard.c M src/soc/qualcomm/sc7280/Kconfig M src/soc/qualcomm/sc7280/Makefile.inc A src/soc/qualcomm/sc7280/display/edp_aux.c A src/soc/qualcomm/sc7280/display/edp_ctrl.c A src/soc/qualcomm/sc7280/display/edp_phy_7nm.c A src/soc/qualcomm/sc7280/display/mdss.c A src/soc/qualcomm/sc7280/include/soc/display/edp_aux.h A src/soc/qualcomm/sc7280/include/soc/display/edp_ctrl.h A src/soc/qualcomm/sc7280/include/soc/display/edp_phy.h A src/soc/qualcomm/sc7280/include/soc/display/edp_reg.h A src/soc/qualcomm/sc7280/include/soc/display/mdssreg.h 12 files changed, 3,142 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/61342/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/61342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If89abb76028766b19450e756889a5d7776106f95 Gerrit-Change-Number: 61342 Gerrit-PatchSet: 19 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7280: Performance improvement by removing delays in cpucp init
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Shelley Chen, Ravi Kumar Bokka. Hello Shelley Chen, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63085 to look at the new patch set (#9). Change subject: sc7280: Performance improvement by removing delays in cpucp init ...................................................................... sc7280: Performance improvement by removing delays in cpucp init As cpucp prepare takes 300 msec moving to before ramstage BUG=b:218406702 TEST=Validated on qualcomm sc7280 development board Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad(a)quicinc.com> --- M src/mainboard/google/herobrine/romstage.c M src/soc/qualcomm/sc7280/cpucp_load_reset.c 2 files changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/63085/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/63085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb Gerrit-Change-Number: 63085 Gerrit-PatchSet: 9 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload: Add support for PCI MMIO CONFIG access.
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, Shelley Chen, Furquan Shaikh, Arthur Heymans, Prasad Malisetty. Hello build bot (Jenkins), Furquan Shaikh, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57615 to look at the new patch set (#48). Change subject: libpayload: Add support for PCI MMIO CONFIG access. ...................................................................... libpayload: Add support for PCI MMIO CONFIG access. Add MMIO method to access PCIe config space from payloads. Defined read/write config 8/16/32 functions for ARM arch in libpayload pci driver. In pci driver, PCIe MMIO config base info extracts through coreboot tables and initializes the ATU for every read/write config access. BUG=b:182963902,b:216686574,b:181098581 TEST=Validated on qualcomm sc7280 development board Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com> --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.herobrine M payloads/libpayload/drivers/Makefile.inc R payloads/libpayload/drivers/pci_io_ops.c C payloads/libpayload/drivers/pci_mmio_ops.c A payloads/libpayload/drivers/qc_pci_mmio_ops.c M payloads/libpayload/include/pci.h A payloads/libpayload/include/qc_pci.h 8 files changed, 250 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/57615/48 -- To view, visit https://review.coreboot.org/c/coreboot/+/57615 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c Gerrit-Change-Number: 57615 Gerrit-PatchSet: 48 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpayload: Export PCIe config info from coreboot to libpayload
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, mturney mturney, Arthur Heymans, Furquan Shaikh, Kyösti Mälkki. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Furquan Shaikh, Arthur Heymans, Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57614 to look at the new patch set (#48). Change subject: libpayload: Export PCIe config info from coreboot to libpayload ...................................................................... libpayload: Export PCIe config info from coreboot to libpayload Export PCIe config base info to payloads through coreboot tables. Fill PCIe config base, ATU address and config size in cbmem entry. BUG=b:182963902,b:216686574,b:181098581 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com> Change-Id: I1ca2be55b98c8d1b86576072078cdda02ac55940 --- M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/commonlib/include/commonlib/coreboot_tables.h M src/include/boot/coreboot_tables.h M src/lib/coreboot_table.c 6 files changed, 36 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/57614/48 -- To view, visit https://review.coreboot.org/c/coreboot/+/57614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ca2be55b98c8d1b86576072078cdda02ac55940 Gerrit-Change-Number: 57614 Gerrit-PatchSet: 48 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7280: Add PCI config base address and length.
by Ravi Kumar Bokka (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Ravi Kumar Bokka, Arthur Heymans. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61773 to look at the new patch set (#32). Change subject: sc7280: Add PCI config base address and length. ...................................................................... sc7280: Add PCI config base address and length. Define PCIe config base address and config length to allow config access from payloads. BUG=b:182963902,b:216686574,b:181098581 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Prasad Malisetty <quic_pmaliset(a)quicinc.com> Change-Id: I492b2b5fb97e775e5928b1326209270f719f5651 --- M src/device/Kconfig M src/soc/qualcomm/sc7280/Kconfig 2 files changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/61773/32 -- To view, visit https://review.coreboot.org/c/coreboot/+/61773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I492b2b5fb97e775e5928b1326209270f719f5651 Gerrit-Change-Number: 61773 Gerrit-PatchSet: 32 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2022