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Change subject: cpu/x86/smm_module_loader.c: Clean up printing the CPU map
......................................................................
Patch Set 1: Code-Review+2
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Change subject: cpu/x86/smm_module_load: Rewrite setup_stub
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Patch Set 4: Code-Review+1
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Change subject: soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
File src/soc/intel/alderlake/chip.h:
https://review.coreboot.org/c/coreboot/+/63293/comment/4b672730_a12f5564
PS4, Line 572: Default 0. Set this to 1 in order to disable PCH USB2 Phy Power gating.
> I will add the comment in other CL.
I'd prefer if you could mention doc#723158 here as well.
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63490
to look at the new patch set (#2).
Change subject: mb/msi/ms7d5: add GPIO configuration
......................................................................
mb/msi/ms7d5: add GPIO configuration
Based on the output of:
- inteltool from https://review.coreboot.org/c/coreboot/+/63374
- intelp2m from https://review.coreboot.org/c/coreboot/+/63403
TEST=Build coreboot binary for msi/ms7d5. Actual GPIO setting
not tested, as the board does not yet boot past FSP-M.
Change-Id: If37eaf875f8fcfc64299227744a8c40d304a0214
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
---
A src/mainboard/msi/ms7d25/include/gpio.h
M src/mainboard/msi/ms7d25/mainboard.c
2 files changed, 574 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63490/2
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Hello build bot (Jenkins), Michał Żygowski, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63467
to look at the new patch set (#3).
Change subject: soc/intel/alderlake: add GPIO definitions for PCH-S
......................................................................
soc/intel/alderlake: add GPIO definitions for PCH-S
Add GPIO definitions for ADL-S, similarly to how TGL/TGL-H handles
the split.
Based on:
- Intel PCH-S EDS Vol1 (#621483)
- Alderlake-S FSP
- slimbootloader sources
- Linux alderlake-pinctrl driver
Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
---
M src/soc/intel/alderlake/Makefile.inc
M src/soc/intel/alderlake/acpi/gpio.asl
M src/soc/intel/alderlake/fsp_params.c
A src/soc/intel/alderlake/gpio_pch_s.c
M src/soc/intel/alderlake/include/soc/gpio.h
A src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h
A src/soc/intel/alderlake/include/soc/gpio_soc_defs_pch_s.h
M src/soc/intel/alderlake/include/soc/pmc.h
M src/soc/intel/alderlake/romstage/fsp_params.c
9 files changed, 1,149 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/63467/3
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Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63441 )
Change subject: mb/google/brya/var/vell: Fix camera LED flicker problem
......................................................................
Patch Set 4: Code-Review+1
(2 comments)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/coreboot/+/63441/comment/3efd81e3_1091de3d
PS3, Line 7: mb/google/brya/var/vell: camera LED flicker problem
> Please make it a statement by adding a verb (in imperative mood) [1]. Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/63441/comment/0217f6e7_f9025156
PS3, Line 8:
> Please describe the problem, and the solution.
Done
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