coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: intel/common/block: rename dmi folder to gpmr as starting gpmr migration
by Wonkyu Kim (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Nico Huber, Jamie Ryu, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Angel Pons, Arthur Heymans, Nick Vaccaro, Tim Wawrzynczak. Hello build bot (Jenkins), Jamie Ryu, Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Angel Pons, Nick Vaccaro, Michael Niewöhner, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63170 to look at the new patch set (#18). Change subject: intel/common/block: rename dmi folder to gpmr as starting gpmr migration ...................................................................... intel/common/block: rename dmi folder to gpmr as starting gpmr migration As a start of GPMR(General Purpose Memory Range) driver migration, 1. rename dmi folder to gpmr folder 2. rename dmi.c to gpmr.c TEST=build Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I4d57f4b8bd06e0cf6c9afa4baf4a7bed64ecb56b --- D src/soc/intel/common/block/dmi/Makefile.inc R src/soc/intel/common/block/gpmr/Kconfig A src/soc/intel/common/block/gpmr/Makefile.inc R src/soc/intel/common/block/gpmr/gpmr.c 4 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/63170/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/63170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d57f4b8bd06e0cf6c9afa4baf4a7bed64ecb56b Gerrit-Change-Number: 63170 Gerrit-PatchSet: 18 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: intel/common/block: rename dmi folder to gpmr
by Wonkyu Kim (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Nico Huber, Jamie Ryu, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Angel Pons, Arthur Heymans, Nick Vaccaro, Tim Wawrzynczak. Hello build bot (Jenkins), Jamie Ryu, Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Angel Pons, Nick Vaccaro, Michael Niewöhner, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63170 to look at the new patch set (#17). Change subject: intel/common/block: rename dmi folder to gpmr ...................................................................... intel/common/block: rename dmi folder to gpmr As a start of GPMR(General Purpose Memory Range) driver migration, 1. rename dmi folder to gpmr folder 2. rename dmi.c to gpmr.c TEST=build Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I4d57f4b8bd06e0cf6c9afa4baf4a7bed64ecb56b --- D src/soc/intel/common/block/dmi/Makefile.inc R src/soc/intel/common/block/gpmr/Kconfig A src/soc/intel/common/block/gpmr/Makefile.inc R src/soc/intel/common/block/gpmr/gpmr.c 4 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/63170/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/63170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d57f4b8bd06e0cf6c9afa4baf4a7bed64ecb56b Gerrit-Change-Number: 63170 Gerrit-PatchSet: 17 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [RFC] ChromeOS: Declare CHROMEOS_NO_GPIOS
by Raul Rangel (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Julius Werner, Kyösti Mälkki, Fred Reitberger, Yu-Ping Wu, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58956 ) Change subject: [RFC] ChromeOS: Declare CHROMEOS_NO_GPIOS ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/58956/comment/03c1a52d_216f3f32 PS1, Line 9: Implementation of fill_lb_gpios() is not about VBOOT > fill_Lb_gpios() is an ugly piece of open-coding. […] We should be able to remove the fill_lb_gpios. We override them in depthcharge anyway: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/pla… -- To view, visit https://review.coreboot.org/c/coreboot/+/58956 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f1eaaeffe388a7f8a7fc2430b6593eb8298461b Gerrit-Change-Number: 58956 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 12 Apr 2022 15:02:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Disable EN_SPKR on init on Nipperkin and Dewatt
by Raul Rangel (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Yu-hsuan Hsu. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63540 ) Change subject: mb/google/guybrush: Disable EN_SPKR on init on Nipperkin and Dewatt ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63540/comment/50b649c2_6eebc9bb PS1, Line 17: Signed-off-by: Yu-Hsuan Hsu <yuhsuan(a)google.com> > Signed off line goes before the Change-Id Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id874421d7464b15be6e521576696bb97e6b22d6a Gerrit-Change-Number: 63540 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 14:51:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/baseboard/nissa: Configure I2C lcnt and hcnt
by Tim Wawrzynczak (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Reka Norman, Eric Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63562 ) Change subject: mb/google/brya/baseboard/nissa: Configure I2C lcnt and hcnt ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63562/comment/01792f1b_4f2f320e PS2, Line 9: Configure lcnt and hcnt directly to give the required frequency, tHIGH > When the ODM measured the frequencies they varied from about 387 to 399 on the different buses, but […] Great point Eric, it's good to remember there are tolerances everywhere (AP clock jitter, board-specific resistor tolerances, board layout, and on the peripheral side too, it has tolerances in its clock, etc.,), so aiming for 390 give you 2.5% margin without going over 400 kHz and potentially causing issues later on. -- To view, visit https://review.coreboot.org/c/coreboot/+/63562 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d4f877c1f0cd9aacd3fa152890b7ef82e059f78 Gerrit-Change-Number: 63562 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 14:48:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: Add support for edp and mdp driver
by Vinod Polimera (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Shelley Chen, Ravi Kumar Bokka, Paul Menzel, Julius Werner. Vinod Polimera has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61342 ) Change subject: qualcomm/sc7280: Add support for edp and mdp driver ...................................................................... Patch Set 21: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/61342/comment/cfc26245_bd0c8483 PS1, Line 8: > Please elaborate, how it is implemented. Done Commit Message: https://review.coreboot.org/c/coreboot/+/61342/comment/b2825953_06adc322 PS2, Line 9: BUG=b:182963902 > syntax is BUG=b:182963902, b:216687885 Done Commit Message: https://review.coreboot.org/c/coreboot/+/61342/comment/1307b4a3_27f11d5c PS7, Line 10: TEST=Validated on qualcomm sc7280 development board. > Please elaborate on how you tested this. When I apply this patch, I was seeing a malloc error. […] Done https://review.coreboot.org/c/coreboot/+/61342/comment/5b7850eb_c5efbb15 PS7, Line 10: development > development Done File src/mainboard/google/herobrine/mainboard.c: https://review.coreboot.org/c/coreboot/+/61342/comment/97a599ff_91fb6e4c PS2, Line 61: if (display_init_required()) { > > suspect code indent for conditional statements (8, 24) […] Done File src/soc/qualcomm/sc7280/display/edp_ctrl.c: https://review.coreboot.org/c/coreboot/+/61342/comment/51c71d80_239d1929 PS13, Line 363: GPIO_PULL_DOWN, GPIO_2MA, GPIO_INPUT); > Unless you're explicitly trying to set a non-standard drive strength, you're supposed to just use gp […] Done https://review.coreboot.org/c/coreboot/+/61342/comment/8d454665_dd7ca082 PS13, Line 360: gpio_output(GPIO(80), 1); : mdelay(20); : gpio_configure(GPIO(60), GPIO_FUNC_GPIO, : GPIO_PULL_DOWN, GPIO_2MA, GPIO_INPUT); : mdelay(10); : gpio_output(GPIO(8), 1); : mdelay(20); > These almost certainly don't belong here anyway (maybe the HPD, if that's the only pin the SoC can p […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If89abb76028766b19450e756889a5d7776106f95 Gerrit-Change-Number: 61342 Gerrit-PatchSet: 21 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 12 Apr 2022 14:25:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR
by Subrata Banik (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Tim Wawrzynczak, Arthur Heymans, Nick Vaccaro, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63492 ) Change subject: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/mtrr/mtrrlib.c: https://review.coreboot.org/c/coreboot/+/63492/comment/7d57d8d3_8274ee25 PS1, Line 52: /* Need to restore mtrr later using remove_temp_solution. */ : if (ENV_RAMSTAGE) : need_restore_mtrr(); > > mostly mtrr_use_temp_range() is added for ramstage along using mtrr.c file. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/63492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67fd36080b318ace53f3e34da53d747f9a3aa400 Gerrit-Change-Number: 63492 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 14:16:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR
by Subrata Banik (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Eric Lai. Hello build bot (Jenkins), Tim Wawrzynczak, Arthur Heymans, Nick Vaccaro, Eric Lai, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63492 to look at the new patch set (#2). Change subject: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR ...................................................................... soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR `fast_spi_cache_bios_region()` is calling `set_var_mtrr()` to set temporary MTRRs with commit def18c406 (soc/intel/common/block/fast_spi: Refactor ROM caching implementation). Hence, this patch ensures the `put_back_original_solution` variable is also getting set by `need_restore_mtrr()` after calling into the `set_var_mtrr()`. Later `remove_temp_solution()` discards any temporary MTRRs prior to boot to payload. Ensure `need_restore_mtrr()` is called during ramstage only to set the `put_back_original_solution` variable. BUG=b:225766934 TEST=Able to build and boot google/brya to verify that `remove_temp_solution()` is able to discard ROM caching temporary MTRRs before booting to payload. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I67fd36080b318ace53f3e34da53d747f9a3aa400 --- M src/soc/intel/common/block/fast_spi/fast_spi.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/63492/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67fd36080b318ace53f3e34da53d747f9a3aa400 Gerrit-Change-Number: 63492 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: turn off WLAN ASPM L1ss
by Rob Barnes (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya, Eric Peers. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63537 ) Change subject: mb/google/guybrush/var/nipperkin: turn off WLAN ASPM L1ss ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63537/comment/1b125b3d_1458d96f PS2, Line 11: TEST=emerge-guybrush coreboot chromeos-bootimage We need suspend resume stress testing too. -- To view, visit https://review.coreboot.org/c/coreboot/+/63537 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c61e1d0f3db8b9885040255d6de266616768b68 Gerrit-Change-Number: 63537 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 14:02:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/amd/agesa/family14: Enable PARALLEL_MP
by Michał Kopeć (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Michał Żygowski, Paul Menzel, Arthur Heymans. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59807 ) Change subject: nb/amd/agesa/family14: Enable PARALLEL_MP ...................................................................... Patch Set 19: (1 comment) File src/northbridge/amd/agesa/family14/northbridge.c: https://review.coreboot.org/c/coreboot/+/59807/comment/04105100_23dc34bb PS16, Line 321: uint8_t siblings = cpuid_ecx(0x80000008) & 0xff; : : return siblings + 1; > Should this change? It looks like most other AMD code does read this from the PCI config space. Looks like only stoneyridge reads this from PCI config space, soc/amd/common/block also reads the cpu count from CPUID. -- To view, visit https://review.coreboot.org/c/coreboot/+/59807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39a0779bdf115eebe31290591152b920acde773e Gerrit-Change-Number: 59807 Gerrit-PatchSet: 19 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 12 Apr 2022 13:50:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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