coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/intel/adlrvp: Enable UFS and ISH for ADL-N RVP
by Tim Wawrzynczak (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Daniil Lunev, Subrata Banik, Wonkyu Kim, Paul Menzel, Rizwan Qureshi, Angel Pons, Meera Ravindranath, Patrick Rudolph, Gwendal Grignou. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62662 ) Change subject: mb/intel/adlrvp: Enable UFS and ISH for ADL-N RVP ...................................................................... Patch Set 6: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62662/comment/0ecea88c_f4db7f3b PS6, Line 9: the parent > Actually, `function 0` suggestion: ``` In order to enable the UFS controller (PCI device 12.7), the PCI specification says that the device at function 0 in the same slot must also be enabled, (which is the ISH). Therefore, this CL enables both the UFS controller and ISH. ``` File src/mainboard/intel/adlrvp/devicetree_n.cb: https://review.coreboot.org/c/coreboot/+/62662/comment/ee9a4c80_3de82882 PS3, Line 283: on > FSP should have migrate this PCI device config space under func 0 using swaping isn't it? IIUC, the FSP (and the Intel SoCs themselves AFAIK) only support remapping of the PCIe RPs, therefore I believe it is up to the mainboard designer to ensure that their device is PCI compliant w/r/t function 0 being enabled when other functions are also enabled. Right now, the coreboot PCI scanning code will skip scanning functions 1-7 if function 0 is not enabled, unless the multi-function bit is set in the header type (https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…) -- To view, visit https://review.coreboot.org/c/coreboot/+/62662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If15bcaffc8fd3bbbe4b181820993ab2d882bbbe1 Gerrit-Change-Number: 62662 Gerrit-PatchSet: 6 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniil Lunev <dlunev(a)chromium.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Daniil Lunev <dlunev(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:29:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/atlas: Enable SPI TPM 2.0
by Angel Pons (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Paul Menzel, Christian Walter, Lean Sheng Tan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63720 ) Change subject: mb/prodrive/atlas: Enable SPI TPM 2.0 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63720 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18ca41c143ade024ee2840b619ba777b22a2a86a Gerrit-Change-Number: 63720 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:28:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/nipperkin: Fix WLAN to GEN2 speed
by Rob Barnes (Code Review) 19 Apr '22

19 Apr '22

Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63722 ) Change subject: mb/google/nipperkin: Fix WLAN to GEN2 speed ...................................................................... mb/google/nipperkin: Fix WLAN to GEN2 speed Fix WLAN PCIE speed to GEN2. Dynamic switching between speeds is causing hangs during S0ix suspend. Just disabling PSPP causes poor PLT performance. BUG=b:228830362 BRANCH=guybrush TEST=suspend_stress_test on AC and DC Change-Id: I988365e51aca0d6515c5605b3032521cf59d8d30 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/variants/nipperkin/variant.c 1 file changed, 7 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/63722/1 diff --git a/src/mainboard/google/guybrush/variants/nipperkin/variant.c b/src/mainboard/google/guybrush/variants/nipperkin/variant.c index b70545e..cb79fc0 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/variant.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/variant.c @@ -7,7 +7,11 @@ { dxio_descriptors[WLAN].link_aspm_L1_1 = false; dxio_descriptors[WLAN].link_aspm_L1_2 = false; - /* Disable PSPP to avoid S0ix hangs - b/228830362 */ - memset(dxio_descriptors[WLAN].port_params, 0, - sizeof(dxio_descriptors[WLAN].port_params)); + + /* Fix link speed to GEN2 - b/228830362 */ + dxio_descriptors[WLAN].link_speed_capability = GEN2; + dxio_descriptors[WLAN].port_params[0] = PP_PSPP_AC; + dxio_descriptors[WLAN].port_params[1] = 0x122; + dxio_descriptors[WLAN].port_params[2] = PP_PSPP_DC; + dxio_descriptors[WLAN].port_params[3] = 0x122; } -- To view, visit https://review.coreboot.org/c/coreboot/+/63722 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I988365e51aca0d6515c5605b3032521cf59d8d30 Gerrit-Change-Number: 63722 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/brya0: configure gpio for headset
by Amanda Hwang (Code Review) 19 Apr '22

19 Apr '22

Amanda Hwang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63721 ) Change subject: mb/google/brya/var/brya0: configure gpio for headset ...................................................................... mb/google/brya/var/brya0: configure gpio for headset Configure GPP_R0, GPP_R1, GPP_R2 and GPP_R3 for headset function enable with ALC5682I+MAX98360. BUG=b:202671753 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot Change-Id: I93070a8096d43557a50e5a545227f2906e299d8e Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/brya0/fw_config.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/63721/1 diff --git a/src/mainboard/google/brya/variants/brya0/fw_config.c b/src/mainboard/google/brya/variants/brya0/fw_config.c index 8113627..c2b963f 100644 --- a/src/mainboard/google/brya/variants/brya0/fw_config.c +++ b/src/mainboard/google/brya/variants/brya0/fw_config.c @@ -144,7 +144,7 @@ printk(BIOS_INFO, "Configure audio over I2S with MAX98360 ALC5682I.\n"); gpio_configure_pads(max98360_enable_pads, ARRAY_SIZE(max98360_enable_pads)); printk(BIOS_INFO, "BT offload enabled\n"); - gpio_configure_pads(i2s0_disable_pads, ARRAY_SIZE(i2s0_disable_pads)); + gpio_configure_pads(i2s0_enable_pads, ARRAY_SIZE(i2s0_enable_pads)); gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads)); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/63721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93070a8096d43557a50e5a545227f2906e299d8e Gerrit-Change-Number: 63721 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/prodrive/atlas: Enable UFS and ISH
by Angel Pons (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Paul Menzel, Christian Walter, Lean Sheng Tan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63719 ) Change subject: mb/prodrive/atlas: Enable UFS and ISH ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63719 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8b9561973640edc5f7d0f579dd640e805c0af17 Gerrit-Change-Number: 63719 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:12:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/atlas: Enable PCH PCIe PR7
by Angel Pons (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Paul Menzel, Christian Walter, Lean Sheng Tan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63718 ) Change subject: mb/prodrive/atlas: Enable PCH PCIe PR7 ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63718/comment/255fd17b_e1d1b480 PS1, Line 7: PR7 RP7 -- To view, visit https://review.coreboot.org/c/coreboot/+/63718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f438a7b1dff1a44a81edc8adc983d08708fdd57 Gerrit-Change-Number: 63718 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:12:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v31...
by Saurabh Mishra (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Saurabh Mishra, Kangheui Won, Paul Menzel, Rizwan Qureshi. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63707 ) Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63707/comment/120232d5_4fb67b36 PS1, Line 9: The headers added are generated as per FSP v3133.00 : Previous FSP version was v3054.02 : Changes Include: > And? Then reviewers missed it. […] Sure, resolved with dot in end of sentences. -- To view, visit https://review.coreboot.org/c/coreboot/+/63707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Gerrit-Change-Number: 63707 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:09:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v31...
by Saurabh Mishra (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Saurabh Mishra, Kangheui Won, Rizwan Qureshi. Hello Kangheui Won, Rizwan Qureshi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63707 to look at the new patch set (#3). Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 ...................................................................... vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 The headers added are generated as per FSP v3133.00. Previous FSP version was v3054.02. Changes include: - UPD Enable eMMC Controller Offset removed in FspsUpd.h - UPD UnusedUpdSpace name update in FspmUpd.h BUG=b:229062240 BRANCH=None TEST=Build with "emerge-nissa intel-adlnfsp" and boot check Nivviks. Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspsUpd.h 2 files changed, 4 insertions(+), 56 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/63707/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Gerrit-Change-Number: 63707 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya: Reset XHCI controller while preparing for S5
by Subrata Banik (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Nico Huber, Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Arthur Heymans, Nick Vaccaro, Eric Lai, Felix Held. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 ) Change subject: mb/google/brya: Reset XHCI controller while preparing for S5 ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63552/comment/38edfef9_8863d026 PS4, Line 37: SMI handler > > > > > Sorry, thinking error on my part. coreboot of course does not run anymore during shutdown (besides the installed handlers). > > > > > > > > > > But, why can’t this be worked around/fixed in the OS driver? > > > > > > > > fixing in FW is comparatively easier 😊 and could apply MB specific W/As as well. > > > How so? > > > > - the fixes in FW are effective in timely manner where one can't land those changes easily in kernel. > > Not sure if you are you saying coreboot is a dump for things you > can't land easily in the kernel. In any case, this only seems true > because you work for a company that dominates coreboot development > and is shy when it comes to OS development. But should that affect > where we place things in the ecosystem? I don't think so. > > > - FW qualification is less costly compared to OS. > > Don't you have to qualify both eventually? > > > - we could add device specific W/A as we have mainboard smi handler (originally designed for the same). > > You can also have mainboard-specific ASL code. Designed for the > same? IMO, SMI handlers should be a last resort. Security sensitive > applications that demand no or as little SMI handlers as possible > should be supported too. Implementing XHCI reset as part of _PTS control method sounds good and SMI free. > > But let's not get worked up on this. We should wait for what the > TA says. If this won't stay board specific, I would prefer to do > it in the OS. -- To view, visit https://review.coreboot.org/c/coreboot/+/63552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf06a64f055a0cee3659b410652082f31e18e149 Gerrit-Change-Number: 63552 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:05:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus
by Amanda Hwang (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Frank Wu, Tim Wawrzynczak, Eric Lai. Amanda Hwang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63709 ) Change subject: mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus ...................................................................... Patch Set 2: (2 comments) File src/mainboard/google/brya/variants/brya0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/63709/comment/19057535_7acef9f8 PS1, Line 64: #| I2C2 | | > Please add devices based on the overridetree.cb and the schematic. Done https://review.coreboot.org/c/coreboot/+/63709/comment/4e31fa0f_cdb459ad PS1, Line 70: .speed = I2C_SPEED_FAST, > miss i2c tuning? add i2c tuning parameter done. -- To view, visit https://review.coreboot.org/c/coreboot/+/63709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa6235869f34e0038a8ecad33d59654626cf7815 Gerrit-Change-Number: 63709 Gerrit-PatchSet: 2 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:02:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2022