coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: apple/macbook21: configure the clockgen and add C3 CPU state
by Ferass EL HAFIDI (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Nico Huber, Paul Menzel, Arthur Heymans, Evgeny Zinoviev, Felix Held. Ferass EL HAFIDI has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63587 ) Change subject: apple/macbook21: configure the clockgen and add C3 CPU state ...................................................................... Patch Set 8: (1 comment) File src/mainboard/apple/macbook21/cstates.c: https://review.coreboot.org/c/coreboot/+/63587/comment/579d0b9b_56ab0197 PS4, Line 34: .latency = 17, > This was before Intel published much information about the matter, AFAICS. […] I guess it would be safe to just set that value to 1. Thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/63587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Gerrit-Change-Number: 63587 Gerrit-PatchSet: 8 Gerrit-Owner: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:59:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: apple/macbook21: configure the clockgen and add C3 CPU state
by Ferass EL HAFIDI (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Paul Menzel, Arthur Heymans, Evgeny Zinoviev, Felix Held. Ferass EL HAFIDI has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63587 ) Change subject: apple/macbook21: configure the clockgen and add C3 CPU state ...................................................................... Patch Set 8: (1 comment) File src/mainboard/apple/macbook21/cstates.c: https://review.coreboot.org/c/coreboot/+/63587/comment/c24d240b_5a3b35c5 PS6, Line 32: #if !CONFIG(BOARD_APPLE_IMAC52) > Preprocessor statement are not indented to my knowledge. Indentation removed. -- To view, visit https://review.coreboot.org/c/coreboot/+/63587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Gerrit-Change-Number: 63587 Gerrit-PatchSet: 8 Gerrit-Owner: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:58:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: apple/macbook21: configure the clockgen and add C3 CPU state
by Ferass EL HAFIDI (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Paul Menzel, Arthur Heymans, Evgeny Zinoviev, Felix Held. Ferass EL HAFIDI has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63587 ) Change subject: apple/macbook21: configure the clockgen and add C3 CPU state ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63587/comment/3cb49908_725718b2 PS6, Line 11: > Please extend the commit message, describing why the overridetree is needed for example, and which m […] That sounds like a good idea. Done! -- To view, visit https://review.coreboot.org/c/coreboot/+/63587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Gerrit-Change-Number: 63587 Gerrit-PatchSet: 7 Gerrit-Owner: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:56:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: apple/macbook21: configure the clockgen and add C3 CPU state
by Ferass EL HAFIDI (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Ferass EL HAFIDI, Paul Menzel, Arthur Heymans, Evgeny Zinoviev, Felix Held. Hello build bot (Jenkins), Nico Huber, Arthur Heymans, Evgeny Zinoviev, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63587 to look at the new patch set (#7). Change subject: apple/macbook21: configure the clockgen and add C3 CPU state ...................................................................... apple/macbook21: configure the clockgen and add C3 CPU state To add the C3 CPU state, the clockgen has to be reconfigured. The values are taken from the MacBook's vendor firmware with i2cdump. The overridetree is used here because this patch is currently untested on iMac5,2 computers and I'm not sure if the values in it are the same as in the iMac5,2. The iMac5,2 uses CY285566 while the MacBook2,1 uses SLG8LP436 so to prevent coreboot from setting up a possible wrong configuration, I prefer using a separate `overridetree.cb`. I also put C3 in `cstates.c` between `#if !CONFIG(BOARD_APPLE_IMAC52)` and `#endif` to prevent the iMac5,2 from using C3 or else ACPI will be basically broken. Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Signed-off-by: Ferass 'Vitali64' EL HAFIDI <vitali64pmemail(a)protonmail.com> --- M src/mainboard/apple/macbook21/Kconfig M src/mainboard/apple/macbook21/cstates.c A src/mainboard/apple/macbook21/variants/macbook21/overridetree.cb 3 files changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/63587/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/63587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Gerrit-Change-Number: 63587 Gerrit-PatchSet: 7 Gerrit-Owner: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/msi/ms7d25: Configure HD Audio
by Michał Żygowski (Code Review) 19 Apr '22

19 Apr '22

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63723 ) Change subject: mb/msi/ms7d25: Configure HD Audio ...................................................................... mb/msi/ms7d25: Configure HD Audio Apply correct configuration of HD Audio. TEST=Launch ubuntu 20.04 and launch a YouTube video, check if microphone detects an input in the system sound settings. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I6acc22aa58f6cc99df1d48d651122e74fe08ec02 --- M src/mainboard/msi/ms7d25/devicetree.cb M src/mainboard/msi/ms7d25/romstage_fsp_params.c 2 files changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/63723/1 diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb index 7cbf7e9..052c566 100644 --- a/src/mainboard/msi/ms7d25/devicetree.cb +++ b/src/mainboard/msi/ms7d25/devicetree.cb @@ -211,7 +211,12 @@ end device ref p2sb on end - device ref hda on end + device ref hda on + register "pch_hda_dsp_enable" = "1" + register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" + register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" + register "pch_hda_idisp_codec_enable" = "1" + end device ref smbus on end end end diff --git a/src/mainboard/msi/ms7d25/romstage_fsp_params.c b/src/mainboard/msi/ms7d25/romstage_fsp_params.c index 6b49b97..c6b4251 100644 --- a/src/mainboard/msi/ms7d25/romstage_fsp_params.c +++ b/src/mainboard/msi/ms7d25/romstage_fsp_params.c @@ -61,5 +61,8 @@ memupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1; memupd->FspmConfig.PchHdaSdiEnable[0] = 1; + memupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1; + memupd->FspmConfig.PchHdaSdiEnable[0] = 1; + memcfg_init(memupd, &ddr4_mem_config, &dimm_module_spd_info, false); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6acc22aa58f6cc99df1d48d651122e74fe08ec02 Gerrit-Change-Number: 63723 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/alderlake: Add ADL-S PCIe support
by Michał Żygowski (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Michał Żygowski, Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63654 to look at the new patch set (#2). Change subject: soc/alderlake: Add ADL-S PCIe support ...................................................................... soc/alderlake: Add ADL-S PCIe support Extend the code to support ADL-S PCIe Root Ports. Based on DOC #619362 and #619501. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Ibb57ad5b11684c0079e384d9a6ba5c10905c1a23 --- M src/soc/intel/alderlake/chip.c M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/alderlake/include/soc/pci_devs.h M src/soc/intel/alderlake/pcie_rp.c 4 files changed, 115 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/63654/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63654 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb57ad5b11684c0079e384d9a6ba5c10905c1a23 Gerrit-Change-Number: 63654 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/msi/ms7d25: add GPIO configuration
by Michał Żygowski (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Michał Żygowski has uploaded a new patch set (#13) to the change originally created by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/63490 ) Change subject: mb/msi/ms7d25: add GPIO configuration ...................................................................... mb/msi/ms7d25: add GPIO configuration Based on the output of: - inteltool from https://review.coreboot.org/c/coreboot/+/63374 - intelp2m from https://review.coreboot.org/c/coreboot/+/63403 TEST=Build coreboot binary for msi/ms7d5. Actual GPIO setting not tested, as the board does not yet boot past FSP-M. Change-Id: If37eaf875f8fcfc64299227744a8c40d304a0214 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- A src/mainboard/msi/ms7d25/gpio.h M src/mainboard/msi/ms7d25/mainboard.c 2 files changed, 579 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63490/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/63490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If37eaf875f8fcfc64299227744a8c40d304a0214 Gerrit-Change-Number: 63490 Gerrit-PatchSet: 13 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetree
by Tim Wawrzynczak (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Lean Sheng Tan. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63303 ) Change subject: soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetree ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63303/comment/16d32720_c08a7a3a PS3, Line 8: : The FSP needs to program VrPowerDeliverDesign configuration per : platform according to the platform capabilities to avoid incorrect : electrial/power parameters. This value is an enum of the available : power delivery segments that are defined in the Platform Design : Guide. > Actually you are right, i did further research, seems like the TDP and the power settings have been […] Thanks for following up Sheng 😊 Feel free to extend the power parameters table for your SoC SKUs! -- To view, visit https://review.coreboot.org/c/coreboot/+/63303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74859e6735e59a15084a9e690b43f68341862833 Gerrit-Change-Number: 63303 Gerrit-PatchSet: 4 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:34:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetree
by Lean Sheng Tan (Code Review) 19 Apr '22

19 Apr '22

Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63303 ) Change subject: soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetree ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63303/comment/ed5b7b53_c85eb959 PS3, Line 8: : The FSP needs to program VrPowerDeliverDesign configuration per : platform according to the platform capabilities to avoid incorrect : electrial/power parameters. This value is an enum of the available : power delivery segments that are defined in the Platform Design : Guide. > Yes correct, but this upd will provide even more refined power settings out of more than 50 options […] Actually you are right, i did further research, seems like the TDP and the power settings have been taken care of (https://review.coreboot.org/c/coreboot/+/56325). Will revert this soon. -- To view, visit https://review.coreboot.org/c/coreboot/+/63303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74859e6735e59a15084a9e690b43f68341862833 Gerrit-Change-Number: 63303 Gerrit-PatchSet: 4 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:32:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/cpu/*: Make ucode update more generic
by Raul Rangel (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Angel Pons, Fred Reitberger, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63589 ) Change subject: soc/amd/common/block/cpu/*: Make ucode update more generic ...................................................................... Patch Set 2: (4 comments) File src/soc/amd/common/block/cpu/update_microcode.c: https://review.coreboot.org/c/coreboot/+/63589/comment/ab1a0b94_04f9b763 PS2, Line 79: for So you are dropping the for loop.... We need that for the zork/picasso/dali platforms. https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… https://review.coreboot.org/c/coreboot/+/63589/comment/e1e92287_76ec8bad PS2, Line 66: static const struct microcode *find_microcode(const struct microcode *ucode, uint16_t equivalent_processor_rev_id) clang-format https://review.coreboot.org/c/coreboot/+/63589/comment/a9eba397_a1276f67 PS2, Line 83: 23 Do you need the size? https://review.coreboot.org/c/coreboot/+/63589/comment/bca64f0b_a7d18a0a PS2, Line 86: snprintf I would check the return code. -- To view, visit https://review.coreboot.org/c/coreboot/+/63589 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a2480cf8274d53ffdab7864135c1bf001241e6 Gerrit-Change-Number: 63589 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 16:30:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2022