coreboot-gerrit April 2022

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Change in coreboot[master]: drivers/usb/pci_xhci: Add Sabrina xhci pci device id
by Felix Held (Code Review) 19 Apr '22

19 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63641 ) Change subject: drivers/usb/pci_xhci: Add Sabrina xhci pci device id ...................................................................... drivers/usb/pci_xhci: Add Sabrina xhci pci device id BUG=None TEST=Build and boot to OS in Skyrim. Ensure that the XHCI controllers are enumerated successfully and ACPI device objects are added in SSDT. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I7ad4555212ed38ea0f9029275345e4945855a8c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63641 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jon Murphy <jpmurphy(a)google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/drivers/usb/pci_xhci/pci_xhci.c 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Raul Rangel: Looks good to me, approved Jon Murphy: Looks good to me, but someone else must approve diff --git a/src/drivers/usb/pci_xhci/pci_xhci.c b/src/drivers/usb/pci_xhci/pci_xhci.c index 1952130..63a98c7 100644 --- a/src/drivers/usb/pci_xhci/pci_xhci.c +++ b/src/drivers/usb/pci_xhci/pci_xhci.c @@ -257,6 +257,9 @@ PCI_DID_AMD_FAM17H_MODEL18H_XHCI1, PCI_DID_AMD_FAM17H_MODEL20H_XHCI0, PCI_DID_AMD_FAM17H_MODEL60H_XHCI, + PCI_DID_AMD_FAM17H_MODELA0H_XHCI0, + PCI_DID_AMD_FAM17H_MODELA0H_XHCI1, + PCI_DID_AMD_FAM17H_MODELA0H_XHCI2, 0 }; 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ad4555212ed38ea0f9029275345e4945855a8c3 Gerrit-Change-Number: 63641 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus
by Amanda Hwang (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Tim Wawrzynczak, Amanda Hwang. Hello Frank Wu, build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63709 to look at the new patch set (#2). Change subject: mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus ...................................................................... mb/google/brya/var/brya0: Swap TPM and touchscreen I2C bus Based on the latest schematic, exchange I2C port for TPM/touchscreen. TPM: I2C3 -> I2C1 Touchscreen: I2C1 -> I2C3 BUG=b:202671753 TEST=emerge-brya coreboot Change-Id: Ifa6235869f34e0038a8ecad33d59654626cf7815 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/brya0/gpio.c M src/mainboard/google/brya/variants/brya0/overridetree.cb 3 files changed, 158 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/63709/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa6235869f34e0038a8ecad33d59654626cf7815 Gerrit-Change-Number: 63709 Gerrit-PatchSet: 2 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP]util/cbfstool: Rewrite trampoline in C
by Arthur Heymans (Code Review) 19 Apr '22

19 Apr '22

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63716 ) Change subject: [WIP]util/cbfstool: Rewrite trampoline in C ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: Having stackless code does have the benefit of making this code easier to chainload from other payloads... -- To view, visit https://review.coreboot.org/c/coreboot/+/63716 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbd7a5ecd225edf87f451a82ff4cbe9fea522a89 Gerrit-Change-Number: 63716 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 19 Apr 2022 15:55:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Reset XHCI controller while preparing for S5
by Nico Huber (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Arthur Heymans, Nick Vaccaro, Eric Lai, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 ) Change subject: mb/google/brya: Reset XHCI controller while preparing for S5 ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63552/comment/33c12c15_d2e89cca PS4, Line 37: SMI handler > > > > Sorry, thinking error on my part. coreboot of course does not run anymore during shutdown (besides the installed handlers). > > > > > > > > But, why can’t this be worked around/fixed in the OS driver? > > > > > > fixing in FW is comparatively easier 😊 and could apply MB specific W/As as well. > > How so? > > - the fixes in FW are effective in timely manner where one can't land those changes easily in kernel. Not sure if you are you saying coreboot is a dump for things you can't land easily in the kernel. In any case, this only seems true because you work for a company that dominates coreboot development and is shy when it comes to OS development. But should that affect where we place things in the ecosystem? I don't think so. > - FW qualification is less costly compared to OS. Don't you have to qualify both eventually? > - we could add device specific W/A as we have mainboard smi handler (originally designed for the same). You can also have mainboard-specific ASL code. Designed for the same? IMO, SMI handlers should be a last resort. Security sensitive applications that demand no or as little SMI handlers as possible should be supported too. But let's not get worked up on this. We should wait for what the TA says. If this won't stay board specific, I would prefer to do it in the OS. -- To view, visit https://review.coreboot.org/c/coreboot/+/63552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf06a64f055a0cee3659b410652082f31e18e149 Gerrit-Change-Number: 63552 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 15:49:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/prodrive/atlas: Enable SPI TPM 2.0
by Lean Sheng Tan (Code Review) 19 Apr '22

19 Apr '22

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63720 ) Change subject: mb/prodrive/atlas: Enable SPI TPM 2.0 ...................................................................... mb/prodrive/atlas: Enable SPI TPM 2.0 Enable SPI dTPM using eSPI bus. Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: I18ca41c143ade024ee2840b619ba777b22a2a86a --- M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/prodrive/atlas/devicetree.cb 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/63720/1 diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index 7f92b66..d9169c2 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -7,6 +7,8 @@ select HAVE_ACPI_TABLES select MAINBOARD_USES_IFD_EC_REGION select SOC_INTEL_ALDERLAKE_PCH_P + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_LPC_TPM if BOARD_PRODRIVE_ATLAS_BASEBOARD diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index 0170fc2..6dfb8a2 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -103,6 +103,11 @@ device ref pcie_rp10 on end device ref uart0 on end device ref uart1 on end + device ref pch_espi on + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end device ref p2sb on end device ref hda on end device ref smbus on end -- To view, visit https://review.coreboot.org/c/coreboot/+/63720 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18ca41c143ade024ee2840b619ba777b22a2a86a Gerrit-Change-Number: 63720 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/prodrive/atlas: Enable UFS and ISH
by Lean Sheng Tan (Code Review) 19 Apr '22

19 Apr '22

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63719 ) Change subject: mb/prodrive/atlas: Enable UFS and ISH ...................................................................... mb/prodrive/atlas: Enable UFS and ISH The PCI Local Bus Specification Revision 3.0 requires that multi-function devices always implement function 0. Because of this, enabling UFS (PCI device 12.7) requires ISH (PCI device 12.0) to be enabled as well. Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: Ia8b9561973640edc5f7d0f579dd640e805c0af17 --- M src/mainboard/prodrive/atlas/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/63719/1 diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index df00c7d..0170fc2 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -90,6 +90,8 @@ device ref pcie4_0 on end device ref pcie4_1 on end device ref crashlog off end + device ref ish on end + device ref ufs on end device ref xhci on end device ref heci1 on end device ref sata on end -- To view, visit https://review.coreboot.org/c/coreboot/+/63719 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8b9561973640edc5f7d0f579dd640e805c0af17 Gerrit-Change-Number: 63719 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/prodrive/atlas: Enable PCH PCIe PR7
by Lean Sheng Tan (Code Review) 19 Apr '22

19 Apr '22

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63718 ) Change subject: mb/prodrive/atlas: Enable PCH PCIe PR7 ...................................................................... mb/prodrive/atlas: Enable PCH PCIe PR7 Signed-off-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Change-Id: I3f438a7b1dff1a44a81edc8adc983d08708fdd57 --- M src/mainboard/prodrive/atlas/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/63718/1 diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index 63c34ad..df00c7d 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -95,6 +95,7 @@ device ref sata on end device ref pcie_rp5 on end device ref pcie_rp6 on end + device ref pcie_rp7 on end device ref pcie_rp8 on end device ref pcie_rp9 on end device ref pcie_rp10 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/63718 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f438a7b1dff1a44a81edc8adc983d08708fdd57 Gerrit-Change-Number: 63718 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: tpm: Refactor TPM Kconfig dimensions
by Jes Klinke (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Jes Klinke, Nico Huber, Sean Rhodes, Michał Żygowski, Johnny Lin, Christian Walter, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak. Hello Felix Singer, Stefan Ott, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Sean Rhodes, Nico Huber, Michał Żygowski, Johnny Lin, Christian Walter, siemens-bot, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Michael Niewöhner, Erik van den Bogaert, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63424 to look at the new patch set (#16). Change subject: tpm: Refactor TPM Kconfig dimensions ...................................................................... tpm: Refactor TPM Kconfig dimensions Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of the above is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e --- M Documentation/getting_started/kconfig.md M src/drivers/crb/Kconfig M src/drivers/crb/Makefile.inc A src/drivers/crb/chip.c M src/drivers/crb/tis.c M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/Makefile.inc M src/drivers/pc80/tpm/Kconfig M src/drivers/pc80/tpm/Makefile.inc A src/drivers/pc80/tpm/chip.c M src/drivers/pc80/tpm/tis.c A src/drivers/pc80/tpm/tis.h M src/drivers/spi/tpm/Kconfig M src/drivers/spi/tpm/Makefile.inc M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/Makefile.inc M src/mainboard/acer/aspire_vn7_572g/Kconfig M src/mainboard/asrock/b85m_pro4/Kconfig M src/mainboard/asrock/h110m/Kconfig M src/mainboard/asus/am1i-a/Kconfig M src/mainboard/asus/h61-series/Kconfig.name M src/mainboard/asus/p8x7x-series/Kconfig.name M src/mainboard/clevo/cml-u/Kconfig M src/mainboard/clevo/kbl-u/Kconfig M src/mainboard/clevo/tgl-u/Kconfig M src/mainboard/dell/snb_ivb_workstations/Kconfig M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/facebook/monolith/Kconfig M src/mainboard/foxconn/g41s-k/Kconfig M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig M src/mainboard/google/asurada/Kconfig M src/mainboard/google/auron/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/brya/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/cherry/Kconfig M src/mainboard/google/corsola/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/daisy/Kconfig M src/mainboard/google/dedede/Kconfig M src/mainboard/google/deltaur/Kconfig M src/mainboard/google/drallion/Kconfig M src/mainboard/google/eve/Kconfig M src/mainboard/google/fizz/Kconfig M src/mainboard/google/foster/Kconfig M src/mainboard/google/gale/Kconfig M src/mainboard/google/glados/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/herobrine/Kconfig M src/mainboard/google/herobrine/bootblock.c M src/mainboard/google/jecht/Kconfig M src/mainboard/google/kahlee/Kconfig M src/mainboard/google/kukui/Kconfig M src/mainboard/google/link/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig M src/mainboard/google/oak/Kconfig M src/mainboard/google/octopus/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/peach_pit/Kconfig M src/mainboard/google/poppy/Kconfig M src/mainboard/google/rambi/Kconfig M src/mainboard/google/reef/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/google/smaug/Kconfig M src/mainboard/google/storm/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/veyron/Kconfig M src/mainboard/google/veyron_mickey/Kconfig M src/mainboard/google/veyron_rialto/Kconfig M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/mainboard.c M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/variant.c M src/mainboard/google/zork/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9480m/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/z220_series/Kconfig M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/galileo/Kconfig M src/mainboard/intel/glkrvp/Kconfig M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kunimitsu/Kconfig M src/mainboard/intel/shadowmountain/Kconfig M src/mainboard/intel/strago/Kconfig M src/mainboard/intel/tglrvp/Kconfig M src/mainboard/intel/wtm2/Kconfig M src/mainboard/kontron/bsl6/Kconfig M src/mainboard/kontron/mal10/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t410/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t440p/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/w541/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x201/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/libretrend/lt1000/Kconfig M src/mainboard/ocp/deltalake/Kconfig M src/mainboard/opencellular/elgon/Kconfig M src/mainboard/pcengines/apu1/Kconfig M src/mainboard/pcengines/apu2/Kconfig M src/mainboard/prodrive/hermes/Kconfig M src/mainboard/protectli/vault_kbl/Kconfig M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_skl/Kconfig M src/mainboard/razer/blade_stealth_kbl/Kconfig M src/mainboard/samsung/lumpy/Kconfig M src/mainboard/samsung/stumpy/Kconfig M src/mainboard/siemens/chili/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig M src/mainboard/siemens/mc_ehl/Kconfig M src/mainboard/starlabs/labtop/Kconfig M src/mainboard/starlabs/lite/Kconfig M src/mainboard/supermicro/x11-lga1151-series/Kconfig M src/mainboard/supermicro/x9sae/Kconfig M src/mainboard/system76/addw1/Kconfig M src/mainboard/system76/bonw14/Kconfig M src/mainboard/system76/cml-u/Kconfig M src/mainboard/system76/darp7/Kconfig M src/mainboard/system76/galp5/Kconfig M src/mainboard/system76/gaze15/Kconfig M src/mainboard/system76/gaze16/Kconfig M src/mainboard/system76/kbl-u/Kconfig M src/mainboard/system76/lemp10/Kconfig M src/mainboard/system76/lemp9/Kconfig M src/mainboard/system76/oryp5/Kconfig M src/mainboard/system76/oryp6/Kconfig M src/mainboard/system76/oryp8/Kconfig M src/mainboard/system76/whl-u/Kconfig M src/mainboard/up/squared/Kconfig M src/security/tpm/Kconfig M src/security/tpm/Makefile.inc M src/security/tpm/tss/vendor/cr50/Kconfig M src/security/vboot/secdata_mock.c M src/security/vboot/secdata_tpm.c M src/security/vboot/vboot_logic.c M src/soc/intel/apollolake/Kconfig M src/soc/intel/common/Makefile.inc M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/Kconfig M src/vendorcode/google/chromeos/Kconfig M src/vendorcode/google/chromeos/Makefile.inc M src/vendorcode/google/chromeos/cse_board_reset.c 164 files changed, 792 insertions(+), 774 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/63424/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/63424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Gerrit-Change-Number: 63424 Gerrit-PatchSet: 16 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/skyrim: Update SPI settings for skyrim
by Chris Wang (Code Review) 19 Apr '22

19 Apr '22

Chris Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63717 ) Change subject: mb/google/skyrim: Update SPI settings for skyrim ...................................................................... mb/google/skyrim: Update SPI settings for skyrim Update SPI setting as below: Normal speed:33mhz Fast speed:66mhz Alt speed:66mz TPM speed:33mhz BUG=b:225213679 TEST=boot skyrim and verify spi settings. Signed-off-by: Chris.Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 --- M src/mainboard/google/skyrim/Kconfig 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/63717/1 diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 37091ab..b6ee746 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -74,4 +74,22 @@ select VBOOT_SEPARATE_VERSTAGE select VBOOT_STARTS_IN_BOOTBLOCK +if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig +config EFS_SPI_READ_MODE + default 2 # Dual IO (1-1-2) + +config EFS_SPI_SPEED + default 0 # 66MHz + +config EFS_SPI_MICRON_FLAG + default 0 + +config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 0 # 66MHz + +endif # !EM100 + endif # BOARD_GOOGLE_BASEBOARD_SKYRIM -- To view, visit https://review.coreboot.org/c/coreboot/+/63717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Gerrit-Change-Number: 63717 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v31...
by Paul Menzel (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Saurabh Mishra, Kangheui Won, Rizwan Qureshi. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63707 ) Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63707/comment/c7f7fee0_73b22f9e PS1, Line 9: The headers added are generated as per FSP v3133.00 : Previous FSP version was v3054.02 : Changes Include: > Formatting is used from previous CL: https://review.coreboot. […] And? Then reviewers missed it. Please do not break the line after sentences if it’s not a new paragraph, or the line length is not met yet. Please add a dot/period to the end of sentences. -- To view, visit https://review.coreboot.org/c/coreboot/+/63707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Gerrit-Change-Number: 63707 Gerrit-PatchSet: 2 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 15:35:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-MessageType: comment

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