coreboot-gerrit April 2022

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Change in coreboot[master]: soc/intel/common/smbus: Add `finalize` operation for smbus
by Angel Pons (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Arthur Heymans, Nick Vaccaro, Eric Lai, Werner Zeh. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63640 ) Change subject: soc/intel/common/smbus: Add `finalize` operation for smbus ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/smbus/smbus.c: https://review.coreboot.org/c/coreboot/+/63640/comment/67bd633b_7422be82 PS4, Line 88: smbus_final > Ack `finalize_smbus` is not consistent with the naming of the other functions, though. The idea is that the `smbus_` prefix works as a namespace. -- To view, visit https://review.coreboot.org/c/coreboot/+/63640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie945680049514e6c5d797790a381a6946e836926 Gerrit-Change-Number: 63640 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:55:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Reset XHCI controller while preparing for S5
by Arthur Heymans (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Nick Vaccaro, Eric Lai, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 ) Change subject: mb/google/brya: Reset XHCI controller while preparing for S5 ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Can the reset be just called on the resume from S5 path instead of in the smihandler before entering S5? -- To view, visit https://review.coreboot.org/c/coreboot/+/63552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf06a64f055a0cee3659b410652082f31e18e149 Gerrit-Change-Number: 63552 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:51:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: apple/macbook21: configure the clockgen and add C3 CPU state
by Nico Huber (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Ferass EL HAFIDI, Paul Menzel, Arthur Heymans, Evgeny Zinoviev, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63587 ) Change subject: apple/macbook21: configure the clockgen and add C3 CPU state ...................................................................... Patch Set 6: (2 comments) Patchset: PS6: Was the latest version tested? It seems `config OVERRIDE_DEVICETREE` is missing. File src/mainboard/apple/macbook21/cstates.c: https://review.coreboot.org/c/coreboot/+/63587/comment/228c4db4_896cbc64 PS4, Line 34: .latency = 17, > Only because you do not experience any problems with your use cases, this does not have to be the co […] This was before Intel published much information about the matter, AFAICS. I'm not sure if there is a correct value, but suggestions how to figure one out are welcome of course. -- To view, visit https://review.coreboot.org/c/coreboot/+/63587 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97f95599fbdf66aa55e936bdcb9cc0cd69b3824 Gerrit-Change-Number: 63587 Gerrit-PatchSet: 6 Gerrit-Owner: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:40:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ferass EL HAFIDI <vitali64pmemail(a)protonmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbfstool/linux_trampoline: Use payload calling argument
by Arthur Heymans (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Patrick Georgi. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63611 ) Change subject: util/cbfstool/linux_trampoline: Use payload calling argument ...................................................................... Patch Set 2: Code-Review-2 (1 comment) Patchset: PS2: Payloads may be chainloading Linux payloads without the calling argument... -- To view, visit https://review.coreboot.org/c/coreboot/+/63611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0e000470299bddde3cae9347a1b18cc5b0cfc77 Gerrit-Change-Number: 63611 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:39:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP
by Arthur Heymans (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Sridhar Siricilla, Reka Norman, Tim Wawrzynczak. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63141 ) Change subject: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/alderlake/bootblock/update_descriptor.c: https://review.coreboot.org/c/coreboot/+/63141/comment/ba6a46f1_7d7097c2 PS5, Line 46: boot_device_rw > @Arthur, It only maps the BIOS region and doesn't map the region. Isn't it? Ah right... boot_device_spi_flash() should probably be used instead. -- To view, visit https://review.coreboot.org/c/coreboot/+/63141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Gerrit-Change-Number: 63141 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:28:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]util/cbfstool: Rewrite trampoline in C
by Arthur Heymans (Code Review) 19 Apr '22

19 Apr '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63716 ) Change subject: [WIP]util/cbfstool: Rewrite trampoline in C ...................................................................... [WIP]util/cbfstool: Rewrite trampoline in C Rewrite the trampoline in C code. Now it does use stack, but it's easier to read. Works on QEMU. Change-Id: Ibbd7a5ecd225edf87f451a82ff4cbe9fea522a89 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/Makefile D util/cbfstool/linux_trampoline.S M util/cbfstool/linux_trampoline.c A util/cbfstool/x86_linux_trampoline.c 4 files changed, 154 insertions(+), 165 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/63716/1 diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index 034aca2..f18f818 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -49,10 +49,10 @@ $(RM) -f $(objutil)/cbfstool/cse_serger $(cse_serger_obj) $(RM) -rf $(VBOOT_HOST_BUILD) -linux_trampoline.c: linux_trampoline.S - rm -f linux_trampoline.c - $(CC) -m32 -o linux_trampoline linux_trampoline.S -ffreestanding -nostdlib -nostdinc -Wl,--defsym=_start=0 - $(OBJCOPY) -Obinary -j .data linux_trampoline trampoline +linux_trampoline.c: x86_linux_trampoline.c + rm -f $@ + $(CC) -I../../src/include -I../../src/commonlib/include -I../../src/commonlib/bsd/include -m32 -o linux_trampoline $< -Os -ffreestanding -nostdlib -nostdinc -fPIC -Wl,--defsym=_start=0 + $(OBJCOPY) -Obinary -j .text linux_trampoline trampoline echo "/* This file is automatically generated. Do not manually change */" > trampoline.c echo "/* SPDX-License-Identifier: GPL-2.0-only */" >> trampoline.c xxd -c 16 -i trampoline >> trampoline.c diff --git a/util/cbfstool/linux_trampoline.S b/util/cbfstool/linux_trampoline.S deleted file mode 100644 index 767c8be..0000000 --- a/util/cbfstool/linux_trampoline.S +++ /dev/null @@ -1,145 +0,0 @@ -/* linux_trampoline */ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* NOTE: THIS CODE MUST REMAIN POSITION INDEPENDENT - * IT SHOULDN'T USE THE STACK - * AND IN GENERAL EXPECT NOTHING BUT RAM TO WORK - */ -.code32 -.data - -#include "linux_trampoline.h" -#define HEADER_SIG 0x4f49424c // LBIO little endian -#define CB_TAG_FORWARD 0x11 -#define CB_TAG_MEMORY 0x1 -#define CB_TAG_FRAMEBUFFER 0x12 -#define CB_TAG_ACPI_RSDP 0x43 - -#define ACPI_RSDP_ADDR 0x70 -#define E820_NR_OFFSET 0x1e8 -#define LINUX_ENTRY_OFFSET 0x214 -#define E820_OFFSET 0x2d0 - -.trampoline_start: -cld -xor %edx, %edx -mov $0, %ecx - -.headerSearch: -mov $0x10000, %ebx -add %ecx, %ebx -mov (%ecx), %eax -cmp $HEADER_SIG, %eax -je .headerSearchDone // found the header -add $16, %ecx -cmp %ecx, %ebx -jne .headerSearch - -.headerSearchDone: -cmp %ecx, %ebx // reached the end == not found anything? -je 2f // give up - -// we assume the checksum is okay, no test -mov 4(%ecx), %ebx -add %ecx, %ebx // ebx = cb_header + header_bytes -mov 20(%ecx), %ecx // ecx = table_entries - -.tableScan: -cmp $CB_TAG_FORWARD, (%ebx) -jne .testMemory - -/* forward tag: assume 32bit pointer */ -mov 8(%ebx), %ecx -jmp .headerSearch - -.testMemory: -cmp $CB_TAG_MEMORY, (%ebx) -jne .testAcpiRsdp - -/* memory tag: copy e820 map and entry count. also determine alt_mem_k */ -mov 4(%ebx), %eax -sub $8, %eax -shr $2, %eax /* eax = number of dwords of e820 data */ -cmp $(32 * 5), %eax /* linux wants at most 32 entries of 5 dwords */ -jng 1f -mov $(32 * 5), %eax /* only copy 32 entries */ -1: -mov %eax, %esi -mov $5, %edi -div %edi -mov %eax, (LINUX_PARAM_LOC + E820_NR_OFFSET) -mov %esi, %eax -xchg %eax, %ecx -lea 8(%ebx), %esi /* e820 data source */ -mov $(LINUX_PARAM_LOC + E820_OFFSET), %edi -rep movsl -xchg %eax, %ecx -/* e820 and LB_TAG_MEMORY type don't fully match: remap unknown type to 2, reserved memory */ -mov (LINUX_PARAM_LOC + E820_NR_OFFSET), %eax -mov $(LINUX_PARAM_LOC + E820_OFFSET), %edi -.test_e820_entry: -cmp $0, %eax -je .endScan -cmp $12, 16(%edi) /* type */ -jng .next_e820_entry -/* Fixup the type to 2, reserved memory */ -mov $2, 16(%edi) -.next_e820_entry: -dec %eax -add $20, %edi -jmp .test_e820_entry - -.testAcpiRsdp: -cmp $CB_TAG_ACPI_RSDP, (%ebx) -jne .testFramebuffer - -mov 8(%ebx), %eax -mov %eax, (LINUX_PARAM_LOC + ACPI_RSDP_ADDR) -mov 12(%ebx), %eax -mov %eax, (LINUX_PARAM_LOC + ACPI_RSDP_ADDR + 4) -jmp .endScan - -.testFramebuffer: -cmp $CB_TAG_FRAMEBUFFER, (%ebx) -jne .endScan -/* TODO: handle framebuffer tag */ - -.endScan: -add 4(%ebx), %ebx -dec %ecx -jnz .tableScan - -/* Setup basic code and data segment selectors for Linux -** -** Flat code segment descriptor: -** selector: 0x10 -** base : 0x00000000 -** limit : 0xFFFFFFFF -** type : code, execute, read -** -** Flat data segment descriptor: -** selector: 0x18 -** base : 0x00000000 -** limit : 0xFFFFFFFF -** type : data, read/write -** -** Use TRAMPOLINE_ENTRY_LOC as a scratchpad. -*/ -mov $TRAMPOLINE_ENTRY_LOC, %eax -movl $0x0000ffff, 16(%eax) // Set up the 2 new descriptors -movl $0x00cf9b00, 20(%eax) -movl $0x0000ffff, 24(%eax) -movl $0x00cf9300, 28(%eax) -movb $0x2b, 0(%eax) // Set the size -movl %eax, 2(%eax) // Set pointer to new GDT -lgdt (%eax) // Load it - -/* finally: jump to kernel */ -mov $LINUX_PARAM_LOC, %esi -jmp *(LINUX_PARAM_LOC + LINUX_ENTRY_OFFSET) - - -2: -hlt -jmp 2b -.trampoline_end: diff --git a/util/cbfstool/linux_trampoline.c b/util/cbfstool/linux_trampoline.c index 46bb800..c5c2955 100644 --- a/util/cbfstool/linux_trampoline.c +++ b/util/cbfstool/linux_trampoline.c @@ -1,20 +1,26 @@ /* This file is automatically generated. Do not manually change */ /* SPDX-License-Identifier: GPL-2.0-only */ unsigned char trampoline[] = { - 0xfc, 0x31, 0xd2, 0xb9, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x00, 0x00, 0x01, 0x00, 0x01, 0xcb, 0x8b, - 0x01, 0x3d, 0x4c, 0x42, 0x49, 0x4f, 0x74, 0x07, 0x83, 0xc1, 0x10, 0x39, 0xcb, 0x75, 0xe9, 0x39, - 0xcb, 0x0f, 0x84, 0xc5, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, - 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x53, 0x8b, 0x43, - 0x04, 0x83, 0xe8, 0x08, 0xc1, 0xe8, 0x02, 0x3d, 0xa0, 0x00, 0x00, 0x00, 0x7e, 0x05, 0xb8, 0xa0, - 0x00, 0x00, 0x00, 0x89, 0xc6, 0xbf, 0x05, 0x00, 0x00, 0x00, 0xf7, 0xf7, 0xa3, 0xe8, 0x01, 0x09, - 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xa1, - 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x2f, 0x83, 0x7f, - 0x10, 0x0c, 0x7e, 0x07, 0xc7, 0x47, 0x10, 0x02, 0x00, 0x00, 0x00, 0x48, 0x83, 0xc7, 0x14, 0xeb, - 0xe8, 0x83, 0x3b, 0x43, 0x75, 0x12, 0x8b, 0x43, 0x08, 0xa3, 0x70, 0x00, 0x09, 0x00, 0x8b, 0x43, - 0x0c, 0xa3, 0x74, 0x00, 0x09, 0x00, 0xeb, 0x05, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, - 0x49, 0x0f, 0x85, 0x78, 0xff, 0xff, 0xff, 0xb8, 0x00, 0x00, 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, - 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, - 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, - 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, 0x00, 0xf4, 0xeb, 0xfd + 0x55, 0x89, 0xe5, 0x57, 0x56, 0x53, 0x83, 0xe4, 0xf8, 0x83, 0xec, 0x28, 0x8b, 0x5d, 0x08, 0xfc, + 0x80, 0x3b, 0x4c, 0x74, 0x03, 0xf4, 0xeb, 0xfd, 0x80, 0x7b, 0x01, 0x42, 0x74, 0x03, 0xf4, 0xeb, + 0xfd, 0x80, 0x7b, 0x02, 0x49, 0x74, 0x03, 0xf4, 0xeb, 0xfd, 0x80, 0x7b, 0x03, 0x4f, 0x74, 0x03, + 0xf4, 0xeb, 0xfd, 0x8b, 0x4b, 0x04, 0xc7, 0x44, 0x24, 0x04, 0x00, 0x00, 0x00, 0x00, 0x01, 0xd9, + 0x8b, 0x44, 0x24, 0x04, 0x39, 0x43, 0x14, 0x0f, 0x86, 0x9a, 0x00, 0x00, 0x00, 0x8b, 0x11, 0x8b, + 0x41, 0x04, 0x83, 0xfa, 0x01, 0x74, 0x18, 0x83, 0xfa, 0x43, 0x75, 0x7f, 0x8b, 0x41, 0x08, 0x8b, + 0x51, 0x0c, 0xa3, 0x70, 0x00, 0x09, 0x00, 0x89, 0x15, 0x74, 0x00, 0x09, 0x00, 0xeb, 0x6c, 0x83, + 0xe8, 0x08, 0x3d, 0x93, 0x02, 0x00, 0x00, 0x76, 0x03, 0xf4, 0xeb, 0xfd, 0xbf, 0x14, 0x00, 0x00, + 0x00, 0x31, 0xd2, 0xf7, 0xf7, 0xba, 0xd0, 0x02, 0x09, 0x00, 0xa3, 0xe8, 0x01, 0x09, 0x00, 0x6b, + 0xc0, 0x14, 0x05, 0xd0, 0x02, 0x09, 0x00, 0x39, 0xd0, 0x74, 0x40, 0x8b, 0xb4, 0x11, 0x38, 0xfd, + 0xf6, 0xff, 0x8b, 0xbc, 0x11, 0x3c, 0xfd, 0xf6, 0xff, 0x89, 0x32, 0x89, 0x7a, 0x04, 0x8b, 0xbc, + 0x11, 0x44, 0xfd, 0xf6, 0xff, 0x8b, 0xb4, 0x11, 0x40, 0xfd, 0xf6, 0xff, 0x89, 0x7a, 0x0c, 0x8b, + 0xbc, 0x11, 0x48, 0xfd, 0xf6, 0xff, 0x89, 0x72, 0x08, 0x83, 0xff, 0x0b, 0x76, 0x05, 0xbf, 0x02, + 0x00, 0x00, 0x00, 0x89, 0x7a, 0x10, 0x83, 0xc2, 0x14, 0xeb, 0xbc, 0xff, 0x44, 0x24, 0x04, 0x03, + 0x49, 0x04, 0xe9, 0x59, 0xff, 0xff, 0xff, 0x8d, 0x44, 0x24, 0x08, 0xc7, 0x44, 0x24, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x89, 0xc2, 0xc1, 0xe8, 0x10, 0xc7, 0x44, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00, + 0xc1, 0xe2, 0x10, 0xc7, 0x44, 0x24, 0x18, 0xff, 0xff, 0x00, 0x00, 0x83, 0xca, 0x20, 0xc7, 0x44, + 0x24, 0x1c, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x44, 0x24, 0x20, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x44, + 0x24, 0x24, 0x00, 0x93, 0xcf, 0x00, 0x89, 0x54, 0x24, 0x08, 0x89, 0x44, 0x24, 0x0c, 0x0f, 0x01, + 0x54, 0x24, 0x08, 0x31, 0xdb, 0xa1, 0x14, 0x02, 0x09, 0x00, 0xbe, 0x00, 0x00, 0x09, 0x00, 0x89, + 0xdf, 0xbd, 0x00, 0x00, 0x00, 0x00, 0xfa, 0xff, 0xe0, 0xf4, 0xeb, 0xfd }; -unsigned int trampoline_len = 239; +unsigned int trampoline_len = 332; diff --git a/util/cbfstool/x86_linux_trampoline.c b/util/cbfstool/x86_linux_trampoline.c new file mode 100644 index 0000000..c4eb563 --- /dev/null +++ b/util/cbfstool/x86_linux_trampoline.c @@ -0,0 +1,128 @@ +/* linux_trampoline */ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <types.h> +#include <stdint.h> +#include <commonlib/bsd/compiler.h> +#include <commonlib/coreboot_tables.h> + +#include "linux_trampoline.h" + +#define ACPI_RSDP_ADDR 0x70 +#define E820_NR_OFFSET 0x1e8 +#define LINUX_ENTRY_OFFSET 0x214 +#define E820_OFFSET 0x2d0 + +static __noreturn __always_inline void hlt(void) +{ + while (1) + asm("hlt"); +} + +static inline struct lb_record *get_next_entry(const struct lb_record *prev) +{ + return (void *)((uintptr_t)prev + prev->size); +} + +#define MEM_RANGE_COUNT(_rec) (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0])) + +struct e820entry { + uint64_t start; + uint64_t size; + uint32_t type; +} __packed; + +static inline void fill_linux_e820(const struct lb_memory *lb_mem) +{ + const size_t count = MEM_RANGE_COUNT(lb_mem); + /* linux wants at most 32 entries of 5 dwords */ + if (count > 32) + hlt(); + + volatile uint32_t *nr_e820 = (void *)(LINUX_PARAM_LOC + E820_NR_OFFSET); + *nr_e820 = count; + + struct e820entry *e820_entries = (void *)(LINUX_PARAM_LOC + E820_OFFSET); + + for (int i = 0; i < count; i++) { + e820_entries[i].start = lb_mem->map[i].start; + e820_entries[i].size = lb_mem->map[i].size; + /* e820 and LB_TAG_MEMORY type don't fully match: remap unknown type to 2, + * reserved memory */ + e820_entries[i].type = lb_mem->map[i].type < 12 ? lb_mem->map[i].type : 2; + } +} + +static inline void fill_linux_rsdp(const struct lb_acpi_rsdp *rsdp) +{ + volatile uint64_t *linux_rsdp = (void *)(LINUX_PARAM_LOC + ACPI_RSDP_ADDR); + *linux_rsdp = rsdp->rsdp_pointer; +} + +/* Setup basic code and data segment selectors for Linux +** +** Flat code segment descriptor: +** selector: 0x10 +** base : 0x00000000 +** limit : 0xFFFFFFFF +** type : code, execute, read +** +** Flat data segment descriptor: +** selector: 0x18 +** base : 0x00000000 +** limit : 0xFFFFFFFF +** type : data, read/write +*/ + +static __noreturn void jump_to_kernel(void) +{ + __aligned(8) uint32_t gdt[8]; + gdt[1] = 0; + gdt[2] = 0; + gdt[3] = 0; + gdt[4] = 0x0000ffff; + gdt[5] = 0x00cf9b00; + gdt[6] = 0x0000ffff; + gdt[7] = 0x00cf9300; + gdt[0] = 0x20 | (((uintptr_t)gdt) << 16); + gdt[1] = (uintptr_t)gdt >> 16; + __asm__ __volatile__("lgdt %0" ::"m"(gdt)); + __asm__ __volatile__( + "movl $0, %%ebp \n" + "cli \n" + "jmp *%[kernel_entry] \n" + : + : [kernel_entry] "a"(*(uintptr_t *)(LINUX_PARAM_LOC + LINUX_ENTRY_OFFSET)), + [boot_params] "S"(LINUX_PARAM_LOC), "b"(0), "D"(0)); + + hlt(); +} + +void __noreturn main(uint32_t coreboot_table) +{ + __asm__ ("cld"); + const struct lb_header *header = (void *)coreboot_table; + if (header->signature[0] != 'L') + hlt(); + if (header->signature[1] != 'B') + hlt(); + if (header->signature[2] != 'I') + hlt(); + if (header->signature[3] != 'O') + hlt(); + + const struct lb_record *entry = (void *)(coreboot_table + header->header_bytes); + for (size_t i = 0; i < header->table_entries; i++, entry = get_next_entry(entry)) { + switch (entry->tag) { + case LB_TAG_MEMORY: + fill_linux_e820((void *)entry); + break; + case LB_TAG_ACPI_RSDP: + fill_linux_rsdp((void *)entry); + break; + } + } + + jump_to_kernel(); + hlt(); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/63716 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbd7a5ecd225edf87f451a82ff4cbe9fea522a89 Gerrit-Change-Number: 63716 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP
by Sridhar Siricilla (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Sridhar Siricilla, Reka Norman, Tim Wawrzynczak, Arthur Heymans. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63141 ) Change subject: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/alderlake/bootblock/update_descriptor.c: https://review.coreboot.org/c/coreboot/+/63141/comment/98e137fb_a6b6d137 PS5, Line 46: boot_device_rw @Arthur, It only maps the BIOS region and doesn't map the region. Isn't it? -- To view, visit https://review.coreboot.org/c/coreboot/+/63141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Gerrit-Change-Number: 63141 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:08:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/smbus: Add `finalize` operation for smbus
by Lean Sheng Tan (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Arthur Heymans, Nick Vaccaro, Eric Lai, Werner Zeh. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63640 ) Change subject: soc/intel/common/smbus: Add `finalize` operation for smbus ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File src/soc/intel/common/block/smbus/smbus.c: https://review.coreboot.org/c/coreboot/+/63640/comment/d143a510_a85e3fa3 PS5, Line 77: tco_lockdown(); > > Just curious, we already did the tco lockdown in pch_finalize(), do we need to do it twice? or thi […] That makes sense, thanks :) -- To view, visit https://review.coreboot.org/c/coreboot/+/63640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie945680049514e6c5d797790a381a6946e836926 Gerrit-Change-Number: 63640 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 14:00:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v31...
by Saurabh Mishra (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Saurabh Mishra, Kangheui Won, Paul Menzel, Rizwan Qureshi. Hello Kangheui Won, Rizwan Qureshi, Saurabh Mishra, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63707 to look at the new patch set (#2). Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 ...................................................................... vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 The headers added are generated as per FSP v3133.00 Previous FSP version was v3054.02 Changes include: - UPD Enable eMMC Controller Offset removed in FspsUpd.h - UPD UnusedUpdSpace name update in FspmUpd.h BUG=b:229062240 BRANCH=None TEST=Build with "emerge-nissa intel-adlnfsp" and boot check Nivviks. Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspsUpd.h 2 files changed, 4 insertions(+), 56 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/63707/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Gerrit-Change-Number: 63707 Gerrit-PatchSet: 2 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v31...
by Saurabh Mishra (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Saurabh Mishra, Kangheui Won, Paul Menzel, Rizwan Qureshi. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63707 ) Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00 ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63707/comment/5f094058_9a6fd74e PS1, Line 11: Include > include Done https://review.coreboot.org/c/coreboot/+/63707/comment/76496b1c_c37db472 PS1, Line 9: The headers added are generated as per FSP v3133.00 : Previous FSP version was v3054.02 : Changes Include: > Please improve the formatting. Formatting is used from previous CL: https://review.coreboot.org/c/coreboot/+/62129 https://review.coreboot.org/c/coreboot/+/63707/comment/fbc5f140_687b6440 PS1, Line 12: - UPD Enable eMMC Controller Offset Added in FspsUpd.h > But you remove *Enable eMMC Controller*? Corrected. https://review.coreboot.org/c/coreboot/+/63707/comment/dcd07224_0916cebb PS1, Line 12: Added > added Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb542e8 Gerrit-Change-Number: 63707 Gerrit-PatchSet: 1 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 13:57:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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