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Change subject: [WIP]mb/prodrive/hermes: Change gfx init depending on eeprom config
......................................................................
Patch Set 2: Verified+1
(1 comment)
File src/mainboard/prodrive/hermes/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143389):
https://review.coreboot.org/c/coreboot/+/62649/comment/c302c360_0715b79a
PS2, Line 290: dev = dev_find_device(PCI_VENDOR_ID_ASPEED, PCI_DEVICE_ID_ASPEED_AST2050_VGA, NULL);
line over 96 characters
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Hello build bot (Jenkins), Patrick Rudolph, Christian Walter, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62648
to look at the new patch set (#2).
Change subject: [WIP]mb/prodrive/hermes: Add libgfxinit support
......................................................................
[WIP]mb/prodrive/hermes: Add libgfxinit support
UNTESTED
Change-Id: Ib71d06e1d83cd26b0fef37acc64f699c452c13dc
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/hermes/Kconfig
M src/mainboard/prodrive/hermes/Makefile.inc
A src/mainboard/prodrive/hermes/gma-mainboard.ads
3 files changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/62648/2
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Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62593 )
Change subject: mb/google/hatch/var/jinlon: Fix EPS detection and disablement
......................................................................
mb/google/hatch/var/jinlon: Fix EPS detection and disablement
Commit ebf14826
[mb/google/hatch/var/jinlon: Switch to using device pointers]
broke jinlon boards without an electronic privacy screen (EPS) by
disabling the parent device (iGPU) instead of the EPS when determined to
be not present via SKU ID.
Commit c5a3a4a6
[mb/google/hatch (baseboard): add ACPI backlight support]
broke EPS detection by adding a duplicate iGPU device to the devicetree,
resulting in the EPS entry being skipped.
Fix both of these issues by assigning the device alias to the EPS child
device, not the parent (iGPU). Rename the alias for clarity, and combine
the duplicate device definitions for the iGPU.
Test: build/boot google/jinlon SKU w/o EPS, observe GPU functional
in both firmware boot screens and Linux OS.
Change-Id: I0615ce361497abe6872085b0dec83292607e53dd
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62593
Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/google/hatch/variants/jinlon/mainboard.c
M src/mainboard/google/hatch/variants/jinlon/overridetree.cb
2 files changed, 5 insertions(+), 7 deletions(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, but someone else must approve
Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/jinlon/mainboard.c b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
index d2e5b43..51ef346 100644
--- a/src/mainboard/google/hatch/variants/jinlon/mainboard.c
+++ b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
@@ -20,20 +20,20 @@
static void check_for_eps(uint32_t sku_id)
{
- struct device *gfx_dev = DEV_PTR(igpu);
+ struct device *eps_dev = DEV_PTR(eps);
if (eps_sku(sku_id)) {
printk(BIOS_INFO, "SKU ID %u has EPS\n", sku_id);
return;
}
- if (!gfx_dev) {
+ if (!eps_dev) {
printk(BIOS_ERR, "Error! No EPS dev, view-angle-management won't work\n");
return;
}
printk(BIOS_INFO, "SKU ID %u doesn't have EPS, disabling...\n", sku_id);
- gfx_dev->enabled = 0;
+ eps_dev->enabled = 0;
}
void variant_devtree_update(void)
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index b3887d4..88c9a54 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -69,10 +69,8 @@
register "ScsEmmcHs400Enabled" = "1"
device domain 0 on
- device pci 02.0 alias igpu on # Integrated Graphics Device
- register "gfx" = "GMA_DEFAULT_PANEL(0)"
- end
device pci 02.0 on
+ register "gfx" = "GMA_DEFAULT_PANEL(0)"
chip drivers/gfx/generic
register "device_count" = "1"
register "device[0].name" = ""LCD""
@@ -80,7 +78,7 @@
register "device[0].addr" = "0x80010400"
register "device[0].privacy.enabled" = "1"
register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
- device generic 0 on end
+ device generic 0 alias eps on end
end
end # Integrated Graphics Device
device pci 14.0 on
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Change subject: drivers/pcie/generic: Add support to generate code under companion device instead
......................................................................
Patch Set 5: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62301/comment/04838da7_19472bb3
PS5, Line 34: firmwaBRANCH=firmware-brya-14505.Bre-brya-14505.B
`BRANCH=firmware-brya-14505.B`
Patchset:
PS5:
> so the problem this patch should solve is when there are multiple drivers that add acpi code to a de […]
Basically, yes. little background:
Right now we're working with Microsoft and upstream Linux to add support for this
`DmaProperty` (https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-…) to to indicate DMA trust boundaries (example: https://docs.microsoft.com/en-us/windows/security/information-protection/ke…), and we want to use it similarly. Thus, we want to drop the `UID` property and then attach it to (at a mininum)
1) Wifi/WLAN devices (and any associated root port)
2) WWAN devices (and any associated root port)
so for brya&redrix devices, that's 3 places (CNVi device, WWAN root port, and WWAN device). Thus, I needed to attach arbitrary properties to PCIe root ports. Since that root port already had a soc/intel/common/block/pcie/rtd3 driver for adding the RTD3 support, I figured a separate chip driver might be cleaner than adding it to N other chip drivers if possible.
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Change subject: [WIP]mb/prodrive/hermes: Change gfx init depending on eeprom config
......................................................................
Patch Set 1:
(3 comments)
File src/mainboard/prodrive/hermes/mainboard.c:
https://review.coreboot.org/c/coreboot/+/62649/comment/cb6f4781_0932fd0b
PS1, Line 262: internale_gfx
There's a typo, and enum type is unused anyway. I'd also move it closer to `mainboard_configure_internal_gfx()`
https://review.coreboot.org/c/coreboot/+/62649/comment/da1727e3_ad4ca10e
PS1, Line 280: mainboard_configure_internal_gfx
Why not call this from `mainboard_early()`?
https://review.coreboot.org/c/coreboot/+/62649/comment/e1a6f1fe_cb2abd57
PS1, Line 283: board_cfg
This can be NULL.
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Change subject: [WIP]mb/prodrive/hermes: Add libgfxinit support
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/prodrive/hermes/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/62648/comment/67b93251_e7f0ab3a
PS1, Line 16: gma-mainboard.ads
Where is this file?
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Change subject: sb/intel/common/firmware: Hook up adding 10GbE LAN firmware
......................................................................
Patch Set 16: Code-Review+2
(1 comment)
File src/southbridge/intel/common/firmware/Kconfig:
https://review.coreboot.org/c/coreboot/+/60877/comment/ac2f95c1_266efe60
PS16, Line 168: depends on MAINBOARD_USES_IFD_10GBE_0_REGION
> this is in order to ensure no misconfiguration by an unknowing/careless developer. […]
Ah, I see. Thanks for the detailed explanation.
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Change subject: sb/intel/common/firmware: Hook up adding 10GbE LAN firmware
......................................................................
Patch Set 16:
(1 comment)
File src/southbridge/intel/common/firmware/Kconfig:
https://review.coreboot.org/c/coreboot/+/60877/comment/64b17b47_769b9136
PS16, Line 168: depends on MAINBOARD_USES_IFD_10GBE_0_REGION
> I'd drop this dependency. […]
this is in order to ensure no misconfiguration by an unknowing/careless developer. 10GbE 1 is only supported in combination with 10GbE 0. you *can't* have only 10GbE 1 LAN. it's possible to have a platform that only uses LAN 1 on the board (perhaps for board routing reasons), but the hardware and strapping options can only enable LAN 1 if LAN 0 is also enabled. it *is* possible to have only LAN 0 enabled in hardware/strapping though.
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Change subject: drivers/pcie/generic: Add support to generate code under companion device instead
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62301/comment/02b1feb7_04820346
PS5, Line 11: to th
with the
Patchset:
PS5:
so the problem this patch should solve is when there are multiple drivers that add acpi code to a device, right? not sure if adding a setting to attach the acpi code to a different device is the best approach here
File src/drivers/pcie/generic/chip.h:
https://review.coreboot.org/c/coreboot/+/62301/comment/3b190ef3_d24f09a7
PS5, Line 10: DEVTREE_CONST struct device *companion_dev;
would be helpful to have a comment here to know what the companion_dev is about without having to look into the code that uses this struct element
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