coreboot-gerrit March 2022

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Change in coreboot[master]: include/spd.h: Fix DDR4_SPD_72B_SO_{R,U}DIMM values
by Elyes Haouas (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62647 ) Change subject: include/spd.h: Fix DDR4_SPD_72B_SO_{R,U}DIMM values ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/62647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id4e9c3814e2e7f379917bf93f7975af3aad31dbb Gerrit-Change-Number: 62647 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:04:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by build bot (Jenkins) (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/alderlake/chip.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143465): https://review.coreboot.org/c/coreboot/+/62272/comment/1bf16d05_9785307e PS7, Line 162: if(CONFIG(SOC_INTEL_CSE_SEND_EOP_EARLY)) { space required before the open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 7 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:39:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by Maulik V Vaghela (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 7: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62272/comment/1f23f331_2fd7f0c5 PS5, Line 7: alder lake > `adl` Ack File src/soc/intel/alderlake/chip.c: https://review.coreboot.org/c/coreboot/+/62272/comment/e76fc989_057914f9 PS6, Line 158: early > I would avoid saying `early` here, sending a cmd post FSP-S is not actually "early" IMO, hence, I wo […] Ack https://review.coreboot.org/c/coreboot/+/62272/comment/600bb28a_33a2a54d PS6, Line 161: > did u miss SOC_INTEL_CSE_SEND_EOP_EARLY check here ? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 7 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:39:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/block/cse: Add option to send EOP early via SoC
by Maulik V Vaghela (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60195 ) Change subject: intel/common/block/cse: Add option to send EOP early via SoC ...................................................................... Patch Set 11: (1 comment) Patchset: PS2: > Sounds Good to me Maulik, Keeping this comment unresolved till then. […] Subrata, Can we please go ahead and merge this patch for now? We have cros bug open to track the fix for future platforms. This will be needed to reduce boot time by ~50 ms. -- To view, visit https://review.coreboot.org/c/coreboot/+/60195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c7fe6f8f3fadb68310d4a09692f51f82c737c35 Gerrit-Change-Number: 60195 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:33:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add support to control coreboot and Intel SoC features
by Maulik V Vaghela (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Nico Huber, Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61380 ) Change subject: soc/intel/common: Add support to control coreboot and Intel SoC features ...................................................................... Patch Set 13: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/61380 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ba40926bd9ad909654f152e48cdd648b28afd62 Gerrit-Change-Number: 61380 Gerrit-PatchSet: 13 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:30:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable dynamic debug capability for brya family
by Maulik V Vaghela (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Sridhar Siricilla, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61381 ) Change subject: mb/google/brya: Enable dynamic debug capability for brya family ...................................................................... Patch Set 13: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/61381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51b0e0bb4392d3fbdb50577d3644491ab90a33c3 Gerrit-Change-Number: 61381 Gerrit-PatchSet: 13 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:30:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable debug driver for Alder Lake platform
by Maulik V Vaghela (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62652 ) Change subject: soc/intel/alderlake: Enable debug driver for Alder Lake platform ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4df3d7f3d6585bd37c632b1a3f0a47c94b63697 Gerrit-Change-Number: 62652 Gerrit-PatchSet: 3 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:30:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add a way to detect the file name with absolute path
by build bot (Jenkins) (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Zheng Bao, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61971 ) Change subject: amdfwtool: Add a way to detect the file name with absolute path ...................................................................... Patch Set 2: Verified+1 (1 comment) File util/amdfwtool/data_parse.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143463): https://review.coreboot.org/c/coreboot/+/61971/comment/18592130_f1e7ec15 PS2, Line 525: snprintf(path_filename, MAX_LINE_SIZE * 2 + 2, "%.*s/%.*s", line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/61971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8e40e445556b972f3b00a0dfcc07b1512308177 Gerrit-Change-Number: 61971 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Mar 2022 07:15:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by Bao Zheng (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62658 to review the following change. Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... amd/*/Makefile.inc: Put common words into common Makefile.inc Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/common/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/sabrina/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc 6 files changed, 11 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/62658/1 diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 302deaa..ee1725a 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -92,7 +92,6 @@ # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). # -FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y) PSP_SOFTFUSE_BITS += 7 @@ -203,10 +202,6 @@ OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table) -# Add all the files listed in the config file -POUND_SIGN=$(call strip_quotes, "\#") -DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /*/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) - AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_APOB_ADDR) \ $(OPT_PSP_BIOSBIN_FILE) \ @@ -300,6 +295,4 @@ apu/amdfw_b-type := raw endif -cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin) - endif # ($(CONFIG_SOC_AMD_CEZANNE),y) diff --git a/src/soc/amd/common/Makefile.inc b/src/soc/amd/common/Makefile.inc index bc3cb9b..20ea7b3 100644 --- a/src/soc/amd/common/Makefile.inc +++ b/src/soc/amd/common/Makefile.inc @@ -4,3 +4,14 @@ subdirs-y += pi subdirs-y += vboot endif + +ifneq ($(CONFIG_AMDFW_CONFIG_FILE), ) +FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') + +# Add all the files listed in the config file +POUND_SIGN=$(call strip_quotes, "\#") +DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /*/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) + +cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin) + +endif diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 8eef153..4d265a5 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -97,8 +97,6 @@ # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). # -FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') - ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y) # Enable secure debug unlock PSP_SOFTFUSE_BITS += 0 @@ -201,10 +199,6 @@ OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) -# Add all the files listed in the config file -POUND_SIGN=$(call strip_quotes, "\#") -DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) - AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_APCB_FILES_BK) \ $(OPT_APOB_ADDR) \ @@ -292,6 +286,4 @@ apu/amdfw_b-type := raw endif -cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin) - endif # ($(CONFIG_SOC_AMD_PICASSO),y) diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/sabrina/Makefile.inc index 74124d2..9f09f54 100644 --- a/src/soc/amd/sabrina/Makefile.inc +++ b/src/soc/amd/sabrina/Makefile.inc @@ -91,8 +91,6 @@ # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). # -FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') - ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y) PSP_SOFTFUSE_BITS += 7 endif @@ -196,10 +194,6 @@ OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) -# Add all the files listed in the config file -POUND_SIGN=$(call strip_quotes, "\#") -DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /*/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) - AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_APOB_ADDR) \ $(OPT_PSP_BIOSBIN_FILE) \ @@ -290,6 +284,4 @@ apu/amdfw_b-type := raw endif -cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin) - endif # ($(CONFIG_SOC_AMD_SABRINA),y) diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index b2ac43f..d3d7ed9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -136,10 +136,6 @@ OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) -# Add all the files listed in the config file -POUND_SIGN=$(call strip_quotes, "\#") -DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) - $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ $(DEP_FILES) \ diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 9309455..93cd42a 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -75,7 +75,6 @@ ifeq ($(CONFIG_HUDSON_PSP), y) ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}') FIRMWARE_TYPE= endif @@ -105,10 +104,6 @@ OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2) OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs) -# Add all the files listed in the config file -POUND_SIGN=$(call strip_quotes, "\#") -DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' )) - $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \ -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/lantis: Add ELAN touchscreen support for Landrid
by Robert Chen (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Tony Huang, Robert Chen, Karthik Ramasubramanian. Hello build bot (Jenkins), Henry Sun, Tony Huang, Tim Wawrzynczak, Shou-Chieh Hsu, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62002 to look at the new patch set (#14). Change subject: mb/google/dedede/var/lantis: Add ELAN touchscreen support for Landrid ...................................................................... mb/google/dedede/var/lantis: Add ELAN touchscreen support for Landrid The touchscreen slave address for landrid is 0x10 same as lantis, so we use SSFC to switch touchscreen controller. BUG=b:222976965 TEST=emerge-dedede coreboot Change-Id: I23d3de5e45aa2876c1590a1e09679d652a3f2906 Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/dedede/variants/lantis/overridetree.cb 1 file changed, 24 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/62002/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/62002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I23d3de5e45aa2876c1590a1e09679d652a3f2906 Gerrit-Change-Number: 62002 Gerrit-PatchSet: 14 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2022