coreboot-gerrit March 2022

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Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage
by Yu-Ping Wu (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 ) Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62359/comment/bb43ca9e_fbf57fc2 PS9, Line 14: 100ms > Something to keep in mind is that it only works as expected if `COLLECT_TIMESTAMPS` is enabled, but it's only `default y if ARCH_X86`. COLLECT_TIMESTAMPS is enabled for ChromeOS (src/vendorcode/google/chromeos/Kconfig). > I think an implementation of `timestamp_get()` is needed for this to work. I agree, although we cannot use the name "timestamp_get" because it already exists for getting the timestamp. Maybe timestamp_find(id)? Alternatively, even better we could rename the current timestamp_get() to timestamp_now(). > If we assert PCIe reset in bootblock, we can use the `End of bootblock` timestamp to calculate the elapsed time. Please measure the elapsed time from the end of PERST# assertion to TS_END_BOOTBLOCK. If it's small (compared to 100ms), then we could use TS_END_BOOTBLOCK as the assertion time. Otherwise, we might need to add a new item to the timestamp_id enum. -- To view, visit https://review.coreboot.org/c/coreboot/+/62359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5b9369e6f8599f93415588ea585c952a41c5e7d Gerrit-Change-Number: 62359 Gerrit-PatchSet: 10 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:44:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by Elyes Haouas (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. Elyes Haouas has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/62658 ) Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... Removed Code-Review+1 by Elyes Haouas <ehaouas(a)noos.fr> -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: deleteVote

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Change in coreboot[master]: docs/contributing/gsoc: Add a collection of useful GSoC links
by Felix Singer (Code Review) 08 Mar '22

08 Mar '22

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62660 ) Change subject: docs/contributing/gsoc: Add a collection of useful GSoC links ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0a1564f41d796ce86179d06b1d0b64021dc0a43 Gerrit-Change-Number: 62660 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:40:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: device/mmio.h: Move readXp/writeXp helpers to device/mmio.h
by Hung-Te Lin (Code Review) 08 Mar '22

08 Mar '22

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62561 ) Change subject: device/mmio.h: Move readXp/writeXp helpers to device/mmio.h ...................................................................... device/mmio.h: Move readXp/writeXp helpers to device/mmio.h These helpers are not architecture dependent and it might be used for different platform. Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: Ic13a94d91affb7cf65a2f22f08ea39ed671bc8e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62561 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/acpi/acpi.c M src/arch/arm/include/armv4/arch/mmio.h M src/arch/arm/include/armv7/arch/mmio.h M src/arch/x86/include/arch/mmio.h M src/include/device/mmio.h M src/security/intel/cbnt/logging.c M src/soc/intel/common/block/smm/smihandler.c 7 files changed, 62 insertions(+), 50 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index f7545b2..e03c7f4 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -13,22 +13,22 @@ * in coreboot. */ -#include <console/console.h> -#include <string.h> #include <acpi/acpi.h> #include <acpi/acpi_ivrs.h> #include <acpi/acpigen.h> #include <arch/hpet.h> -#include <arch/mmio.h> -#include <device/pci.h> +#include <cbfs.h> #include <cbmem.h> #include <commonlib/helpers.h> +#include <commonlib/sort.h> +#include <console/console.h> #include <cpu/cpu.h> -#include <cbfs.h> +#include <device/mmio.h> +#include <device/pci.h> +#include <pc80/mc146818rtc.h> +#include <string.h> #include <types.h> #include <version.h> -#include <commonlib/sort.h> -#include <pc80/mc146818rtc.h> static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp); diff --git a/src/arch/arm/include/armv4/arch/mmio.h b/src/arch/arm/include/armv4/arch/mmio.h index d7d9a99..0ea41d2 100644 --- a/src/arch/arm/include/armv4/arch/mmio.h +++ b/src/arch/arm/include/armv4/arch/mmio.h @@ -24,6 +24,9 @@ return *(volatile uint32_t *)addr; } +/* Not supported */ +uint64_t read64(const void *addr); + static inline void write8(void *addr, uint8_t val) { *(volatile uint8_t *)addr = val; @@ -39,4 +42,7 @@ *(volatile uint32_t *)addr = val; } +/* Not supported */ +void write64(void *addr, uint64_t val); + #endif /* __ARCH_MMIO_H__ */ diff --git a/src/arch/arm/include/armv7/arch/mmio.h b/src/arch/arm/include/armv7/arch/mmio.h index 45868b5..affa097 100644 --- a/src/arch/arm/include/armv7/arch/mmio.h +++ b/src/arch/arm/include/armv7/arch/mmio.h @@ -29,6 +29,9 @@ return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t)); } +/* Not supported */ +uint64_t read64(const void *addr); + static inline void write8(void *addr, uint8_t val) { dmb(); @@ -50,4 +53,7 @@ dmb(); } +/* Not supported */ +void write64(void *addr, uint64_t val); + #endif /* __ARCH_MMIO_H__ */ diff --git a/src/arch/x86/include/arch/mmio.h b/src/arch/x86/include/arch/mmio.h index 7188eac..c2aa0fb 100644 --- a/src/arch/x86/include/arch/mmio.h +++ b/src/arch/x86/include/arch/mmio.h @@ -45,44 +45,4 @@ *((volatile uint64_t *)(addr)) = value; } -static __always_inline uint8_t read8p(const uintptr_t addr) -{ - return read8((void *)addr); -} - -static __always_inline uint16_t read16p(const uintptr_t addr) -{ - return read16((void *)addr); -} - -static __always_inline uint32_t read32p(const uintptr_t addr) -{ - return read32((void *)addr); -} - -static __always_inline uint64_t read64p(const uintptr_t addr) -{ - return read64((void *)addr); -} - -static __always_inline void write8p(const uintptr_t addr, const uint8_t value) -{ - write8((void *)addr, value); -} - -static __always_inline void write16p(const uintptr_t addr, const uint16_t value) -{ - write16((void *)addr, value); -} - -static __always_inline void write32p(const uintptr_t addr, const uint32_t value) -{ - write32((void *)addr, value); -} - -static __always_inline void write64p(const uintptr_t addr, const uint64_t value) -{ - write64((void *)addr, value); -} - #endif /* __ARCH_MMIO_H__ */ diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h index 3c9a833..7c8e2bd 100644 --- a/src/include/device/mmio.h +++ b/src/include/device/mmio.h @@ -207,4 +207,44 @@ #define READ32_BITFIELD(addr, name) \ EXTRACT_BITFIELD(read32(addr), name) +static __always_inline uint8_t read8p(const uintptr_t addr) +{ + return read8((void *)addr); +} + +static __always_inline uint16_t read16p(const uintptr_t addr) +{ + return read16((void *)addr); +} + +static __always_inline uint32_t read32p(const uintptr_t addr) +{ + return read32((void *)addr); +} + +static __always_inline uint64_t read64p(const uintptr_t addr) +{ + return read64((void *)addr); +} + +static __always_inline void write8p(const uintptr_t addr, const uint8_t value) +{ + write8((void *)addr, value); +} + +static __always_inline void write16p(const uintptr_t addr, const uint16_t value) +{ + write16((void *)addr, value); +} + +static __always_inline void write32p(const uintptr_t addr, const uint32_t value) +{ + write32((void *)addr, value); +} + +static __always_inline void write64p(const uintptr_t addr, const uint64_t value) +{ + write64((void *)addr, value); +} + #endif /* __DEVICE_MMIO_H__ */ diff --git a/src/security/intel/cbnt/logging.c b/src/security/intel/cbnt/logging.c index 514e5ac..90d138d 100644 --- a/src/security/intel/cbnt/logging.c +++ b/src/security/intel/cbnt/logging.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/mmio.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <cpu/intel/msr.h> +#include <device/mmio.h> #include <stdint.h> #include <security/intel/txt/txt.h> diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 0cde289..0a277f0 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -2,8 +2,6 @@ #include <arch/hlt.h> #include <arch/io.h> -#include <arch/mmio.h> -#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/msr.h> @@ -12,7 +10,9 @@ #include <cpu/intel/em64t101_save_state.h> #include <cpu/intel/msr.h> #include <delay.h> +#include <device/mmio.h> #include <device/pci_def.h> +#include <device/pci_ops.h> #include <elog.h> #include <intelblocks/fast_spi.h> #include <intelblocks/pmclib.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/62561 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic13a94d91affb7cf65a2f22f08ea39ed671bc8e8 Gerrit-Change-Number: 62561 Gerrit-PatchSet: 7 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brask/variants/moli: init overridetree for moli
by Raihow Shi (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62321 ) Change subject: mb/google/brask/variants/moli: init overridetree for moli ...................................................................... Patch Set 22: (1 comment) File src/mainboard/google/brya/variants/moli/overridetree.cb: https://review.coreboot.org/c/coreboot/+/62321/comment/55612211_d23027b5 PS9, Line 2: field AUDIO 0 2 : option AUDIO_UNKNOWN 0 : option NAU88L25B_I2S 1 : end > Since you have removed this, please add register "CnviBtAudioOffload" = "true" Ok, I add it, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/62321 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8829d4b39d48ae574eeccbfc62e79b671211ae2d Gerrit-Change-Number: 62321 Gerrit-PatchSet: 22 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:21:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhuohao Lee <zhuohao(a)google.com> Comment-In-Reply-To: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by Bao Zheng (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62658 ) Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: The DEP_FILES in the dependency list is empty, even though it can be printed out in the following command. $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ $(PSP_VERSTAGE_FILE) \ $(PSP_VERSTAGE_SIG_FILE) \ $$(PSP_APCB_FILES) \ $(DEP_FILES) \ <--- empty $(AMDFWTOOL) \ $(obj)/fmap_config.h \ $(objcbfs)/bootblock.elf # this target also creates the .map file $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set)) rm -f $@ echo DEP_FILEs $(DEP_FILES) <--- not empty It seems that the Makefile.inc in soc/amd/common is prcessed after the soc/amd/cezanne/Makefile.inc -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:16:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/block/cse: Add option to send EOP early via SoC
by Subrata Banik (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60195 ) Change subject: intel/common/block/cse: Add option to send EOP early via SoC ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c7fe6f8f3fadb68310d4a09692f51f82c737c35 Gerrit-Change-Number: 60195 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:12:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/block/cse: Add option to send EOP early via SoC
by Subrata Banik (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60195 ) Change subject: intel/common/block/cse: Add option to send EOP early via SoC ...................................................................... Patch Set 11: (1 comment) Patchset: PS2: > Subrata, […] Lets track this in bug and for future platform. -- To view, visit https://review.coreboot.org/c/coreboot/+/60195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c7fe6f8f3fadb68310d4a09692f51f82c737c35 Gerrit-Change-Number: 60195 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:12:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by Subrata Banik (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 7: (2 comments) File src/soc/intel/alderlake/Kconfig: https://review.coreboot.org/c/coreboot/+/62272/comment/08e40af4_c906972d PS7, Line 105: select SOC_INTEL_CSE_SEND_EOP_EARLY move this above SOC_INTEL_CSE_SET_EOP File src/soc/intel/alderlake/chip.c: https://review.coreboot.org/c/coreboot/+/62272/comment/1d891ae5_5665ebd2 PS7, Line 162: if(CONFIG(SOC_INTEL_CSE_SEND_EOP_EARLY)) { > space required before the open parenthesis '(' Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 7 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:11:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by Elyes Haouas (Code Review) 08 Mar '22

08 Mar '22

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62658 ) Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 08 Mar 2022 08:07:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2022