coreboot-gerrit March 2022

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Yu-Ping Wu (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 21: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/86ddce82_9b43b30d PS21, Line 243: mtk_pcie_get_hw_info > This function is defined in CBL:56792, should we submit together or move this function define to thi […] Every patch should be self-contained, so we should declare it in this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 21 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:27:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Jianjun Wang (Code Review) 09 Mar '22

09 Mar '22

Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 21: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/d3547089_302eaff6 PS21, Line 243: mtk_pcie_get_hw_info > Hung-Te can you see the revert button on Gerrit UI? This function is defined in CBL:56792, should we submit together or move this function define to this patch? -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 21 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:20:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: commonlib/bsd: Remove cb_err_t
by Julius Werner (Code Review) 09 Mar '22

09 Mar '22

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62600 ) Change subject: commonlib/bsd: Remove cb_err_t ...................................................................... commonlib/bsd: Remove cb_err_t cb_err_t was meant to be used in place of `enum cb_err` in all situations, but the choice to use a typedef here seems to be controversial. We should not be arbitrarily using two different identifiers for the same thing across the codebase, so since there are no use cases for serializing enum cb_err at the moment (which would be the primary reason to typedef a fixed-width integer instead), remove cb_err_t again for now. Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M payloads/libpayload/include/fmap.h M payloads/libpayload/libc/fmap.c M payloads/libpayload/libcbfs/cbfs.c M payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c M payloads/libpayload/tests/libcbfs/cbfs-verification-test.c M src/commonlib/bsd/cbfs_mcache.c M src/commonlib/bsd/cbfs_private.c M src/commonlib/bsd/include/commonlib/bsd/cb_err.h M src/commonlib/bsd/include/commonlib/bsd/cbfs_private.h M src/drivers/mipi/panel.c M src/drivers/parade/ps8640/ps8640.c M src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c M src/include/cbfs.h M src/include/mipi/panel.h M src/lib/cbfs.c M src/security/vboot/vboot_loader.c M src/soc/mediatek/common/dsi.c M src/soc/qualcomm/sc7180/display/dsi.c M src/soc/qualcomm/sc7180/include/soc/display/mipi_dsi.h M tests/lib/cbfs-lookup-test.c M tests/lib/cbfs-verification-test.c M util/cbfstool/cbfstool.c 22 files changed, 119 insertions(+), 121 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Yu-Ping Wu: Looks good to me, but someone else must approve diff --git a/payloads/libpayload/include/fmap.h b/payloads/libpayload/include/fmap.h index 53ebe23..02705c2 100644 --- a/payloads/libpayload/include/fmap.h +++ b/payloads/libpayload/include/fmap.h @@ -7,6 +7,6 @@ #include <stddef.h> /* Looks for area with |name| in FlashMap. Requires lib_sysinfo.fmap_cache. */ -cb_err_t fmap_locate_area(const char *name, size_t *offset, size_t *size); +enum cb_err fmap_locate_area(const char *name, size_t *offset, size_t *size); #endif /* _FMAP_H */ diff --git a/payloads/libpayload/libc/fmap.c b/payloads/libpayload/libc/fmap.c index 2d185a7..2ee9e3e 100644 --- a/payloads/libpayload/libc/fmap.c +++ b/payloads/libpayload/libc/fmap.c @@ -38,8 +38,8 @@ /* Private fmap cache. */ static struct fmap *_fmap_cache; -static cb_err_t fmap_find_area(struct fmap *fmap, const char *name, size_t *offset, - size_t *size) +static enum cb_err fmap_find_area(struct fmap *fmap, const char *name, size_t *offset, + size_t *size) { for (size_t i = 0; i < le32toh(fmap->nareas); ++i) { if (strncmp((const char *)fmap->areas[i].name, name, FMAP_STRLEN) != 0) @@ -71,7 +71,7 @@ return false; } -cb_err_t fmap_locate_area(const char *name, size_t *offset, size_t *size) +enum cb_err fmap_locate_area(const char *name, size_t *offset, size_t *size) { if (!_fmap_cache && !fmap_setup_cache()) return CB_ERR; diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c index 6a996b7..ff19179 100644 --- a/payloads/libpayload/libcbfs/cbfs.c +++ b/payloads/libpayload/libcbfs/cbfs.c @@ -48,7 +48,7 @@ return CB_ERR; size_t data_offset; - cb_err_t err = CB_CBFS_CACHE_FULL; + enum cb_err err = CB_CBFS_CACHE_FULL; if (cbd->mcache_size) err = cbfs_mcache_lookup(cbd->mcache, cbd->mcache_size, name, mdata, &data_offset); diff --git a/payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c b/payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c index 0f84076..0650e31 100644 --- a/payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c +++ b/payloads/libpayload/tests/libcbfs/cbfs-lookup-test.c @@ -40,7 +40,7 @@ static size_t test_fmap_offset = 0; static size_t test_fmap_size = 0; -static cb_err_t test_fmap_result = CB_SUCCESS; +static enum cb_err test_fmap_result = CB_SUCCESS; static void set_fmap_locate_area_results(size_t offset, size_t size, size_t result) { @@ -49,15 +49,15 @@ test_fmap_result = result; } -cb_err_t fmap_locate_area(const char *name, size_t *offset, size_t *size) +enum cb_err fmap_locate_area(const char *name, size_t *offset, size_t *size) { *offset = test_fmap_offset; *size = test_fmap_size; return test_fmap_result; } -cb_err_t cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out) +enum cb_err cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out) { assert_non_null(mcache); assert_true(mcache_size > 0 && mcache_size % CBFS_MCACHE_ALIGNMENT == 0); @@ -66,7 +66,7 @@ check_expected(name); - cb_err_t ret = mock_type(cb_err_t); + enum cb_err ret = mock_type(enum cb_err); if (ret != CB_SUCCESS) return ret; @@ -75,7 +75,7 @@ return CB_SUCCESS; } -static void expect_cbfs_mcache_lookup(const char *name, cb_err_t err, +static void expect_cbfs_mcache_lookup(const char *name, enum cb_err err, const union cbfs_mdata *mdata, size_t data_offset_out) { expect_string(cbfs_mcache_lookup, name, name); @@ -87,13 +87,13 @@ } } -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash) +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash) { assert_non_null(dev); check_expected(name); - cb_err_t ret = mock_type(cb_err_t); + enum cb_err ret = mock_type(enum cb_err); if (ret != CB_SUCCESS) return ret; @@ -102,7 +102,7 @@ return CB_SUCCESS; } -static void expect_cbfs_lookup(const char *name, cb_err_t err, const union cbfs_mdata *mdata, +static void expect_cbfs_lookup(const char *name, enum cb_err err, const union cbfs_mdata *mdata, size_t data_offset_out) { expect_string(cbfs_lookup, name, name); diff --git a/payloads/libpayload/tests/libcbfs/cbfs-verification-test.c b/payloads/libpayload/tests/libcbfs/cbfs-verification-test.c index 2ab3d53..1dcccf9 100644 --- a/payloads/libpayload/tests/libcbfs/cbfs-verification-test.c +++ b/payloads/libpayload/tests/libcbfs/cbfs-verification-test.c @@ -53,19 +53,19 @@ return 0; } -cb_err_t cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out) +enum cb_err cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out) { return CB_CBFS_CACHE_FULL; } -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash) +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash) { assert_non_null(dev); check_expected(name); - cb_err_t ret = mock_type(cb_err_t); + enum cb_err ret = mock_type(enum cb_err); if (ret != CB_SUCCESS) return ret; @@ -74,7 +74,7 @@ return CB_SUCCESS; } -static void expect_cbfs_lookup(const char *name, cb_err_t err, const union cbfs_mdata *mdata, +static void expect_cbfs_lookup(const char *name, enum cb_err err, const union cbfs_mdata *mdata, size_t data_offset_out) { expect_string(cbfs_lookup, name, name); @@ -91,7 +91,7 @@ return mock_ptr_type(void *); } -cb_err_t fmap_locate_area(const char *name, size_t *offset, size_t *size) +enum cb_err fmap_locate_area(const char *name, size_t *offset, size_t *size) { *offset = 0; *size = 0; diff --git a/src/commonlib/bsd/cbfs_mcache.c b/src/commonlib/bsd/cbfs_mcache.c index 965f9fa..29ba110 100644 --- a/src/commonlib/bsd/cbfs_mcache.c +++ b/src/commonlib/bsd/cbfs_mcache.c @@ -40,8 +40,8 @@ int count; }; -static cb_err_t build_walker(cbfs_dev_t dev, size_t offset, const union cbfs_mdata *mdata, - size_t already_read, void *arg) +static enum cb_err build_walker(cbfs_dev_t dev, size_t offset, const union cbfs_mdata *mdata, + size_t already_read, void *arg) { struct cbfs_mcache_build_args *args = arg; union mcache_entry *entry = args->mcache; @@ -62,8 +62,8 @@ return CB_CBFS_NOT_FOUND; } -cb_err_t cbfs_mcache_build(cbfs_dev_t dev, void *mcache, size_t size, - struct vb2_hash *metadata_hash) +enum cb_err cbfs_mcache_build(cbfs_dev_t dev, void *mcache, size_t size, + struct vb2_hash *metadata_hash) { struct cbfs_mcache_build_args args = { .mcache = mcache, @@ -73,7 +73,7 @@ }; assert(size > sizeof(uint32_t) && IS_ALIGNED((uintptr_t)mcache, CBFS_MCACHE_ALIGNMENT)); - cb_err_t ret = cbfs_walk(dev, build_walker, &args, metadata_hash, 0); + enum cb_err ret = cbfs_walk(dev, build_walker, &args, metadata_hash, 0); union mcache_entry *entry = args.mcache; if (ret == CB_CBFS_NOT_FOUND) { ret = CB_SUCCESS; @@ -88,8 +88,8 @@ return ret; } -cb_err_t cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out) +enum cb_err cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out) { const size_t namesize = strlen(name) + 1; /* Count trailing \0 so we can memcmp() it. */ const void *end = mcache + mcache_size; diff --git a/src/commonlib/bsd/cbfs_private.c b/src/commonlib/bsd/cbfs_private.c index a8c2a3a..e77c299 100644 --- a/src/commonlib/bsd/cbfs_private.c +++ b/src/commonlib/bsd/cbfs_private.c @@ -3,8 +3,8 @@ #include <commonlib/bsd/cbfs_private.h> #include <assert.h> -static cb_err_t read_next_header(cbfs_dev_t dev, size_t *offset, struct cbfs_file *buffer, - const size_t devsize) +static enum cb_err read_next_header(cbfs_dev_t dev, size_t *offset, struct cbfs_file *buffer, + const size_t devsize) { DEBUG("Looking for next file @%#zx...\n", *offset); *offset = ALIGN_UP(*offset, CBFS_ALIGNMENT); @@ -22,10 +22,10 @@ return CB_CBFS_NOT_FOUND; } -cb_err_t cbfs_walk(cbfs_dev_t dev, cb_err_t (*walker)(cbfs_dev_t dev, size_t offset, - const union cbfs_mdata *mdata, - size_t already_read, void *arg), - void *arg, struct vb2_hash *metadata_hash, enum cbfs_walk_flags flags) +enum cb_err cbfs_walk(cbfs_dev_t dev, enum cb_err (*walker)(cbfs_dev_t dev, size_t offset, + const union cbfs_mdata *mdata, + size_t already_read, void *arg), + void *arg, struct vb2_hash *metadata_hash, enum cbfs_walk_flags flags) { const bool do_hash = CBFS_ENABLE_HASHING && metadata_hash; const size_t devsize = cbfs_dev_size(dev); @@ -39,8 +39,8 @@ } size_t offset = 0; - cb_err_t ret_header; - cb_err_t ret_walker = CB_CBFS_NOT_FOUND; + enum cb_err ret_header; + enum cb_err ret_walker = CB_CBFS_NOT_FOUND; union cbfs_mdata mdata; while ((ret_header = read_next_header(dev, &offset, &mdata.h, devsize)) == CB_SUCCESS) { const uint32_t attr_offset = be32toh(mdata.h.attributes_offset); @@ -113,8 +113,8 @@ return ret_walker; } -cb_err_t cbfs_copy_fill_metadata(union cbfs_mdata *dst, const union cbfs_mdata *src, - size_t already_read, cbfs_dev_t dev, size_t offset) +enum cb_err cbfs_copy_fill_metadata(union cbfs_mdata *dst, const union cbfs_mdata *src, + size_t already_read, cbfs_dev_t dev, size_t offset) { /* First, copy the stuff that cbfs_walk() already read for us. */ memcpy(dst, src, already_read); @@ -135,8 +135,8 @@ size_t *data_offset_out; }; -static cb_err_t lookup_walker(cbfs_dev_t dev, size_t offset, const union cbfs_mdata *mdata, - size_t already_read, void *arg) +static enum cb_err lookup_walker(cbfs_dev_t dev, size_t offset, const union cbfs_mdata *mdata, + size_t already_read, void *arg) { struct cbfs_lookup_args *args = arg; /* Check if the name we're looking for could fit, then we can safely memcmp() it. */ @@ -152,8 +152,8 @@ return CB_SUCCESS; } -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash) +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash) { struct cbfs_lookup_args args = { .mdata_out = mdata_out, diff --git a/src/commonlib/bsd/include/commonlib/bsd/cb_err.h b/src/commonlib/bsd/include/commonlib/bsd/cb_err.h index b61b956..eec44f2f 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/cb_err.h +++ b/src/commonlib/bsd/include/commonlib/bsd/cb_err.h @@ -42,7 +42,4 @@ CB_CBFS_CACHE_FULL = -403, /**< Metadata cache overflowed */ }; -/* Don't typedef the enum directly, so the size is unambiguous for serialization. */ -typedef int32_t cb_err_t; - #endif /* _COMMONLIB_BSD_CB_ERR_H_ */ diff --git a/src/commonlib/bsd/include/commonlib/bsd/cbfs_private.h b/src/commonlib/bsd/include/commonlib/bsd/cbfs_private.h index fc2d0d0..410bfd6 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/cbfs_private.h +++ b/src/commonlib/bsd/include/commonlib/bsd/cbfs_private.h @@ -78,24 +78,24 @@ * CB_SUCCESS/<other> - First non-CB_CBFS_NOT_FOUND code returned by walker() * CB_CBFS_NOT_FOUND - walker() returned CB_CBFS_NOT_FOUND for every file in the CBFS */ -cb_err_t cbfs_walk(cbfs_dev_t dev, cb_err_t (*walker)(cbfs_dev_t dev, size_t offset, - const union cbfs_mdata *mdata, - size_t already_read, void *arg), - void *arg, struct vb2_hash *metadata_hash, enum cbfs_walk_flags); +enum cb_err cbfs_walk(cbfs_dev_t dev, enum cb_err (*walker)(cbfs_dev_t dev, size_t offset, + const union cbfs_mdata *mdata, + size_t already_read, void *arg), + void *arg, struct vb2_hash *metadata_hash, enum cbfs_walk_flags); /* * Helper function that can be used by a |walker| callback to cbfs_walk() to copy the metadata * of a file into a permanent buffer. Will copy the |already_read| metadata from |src| into * |dst| and load remaining metadata from |dev| as required. */ -cb_err_t cbfs_copy_fill_metadata(union cbfs_mdata *dst, const union cbfs_mdata *src, - size_t already_read, cbfs_dev_t dev, size_t offset); +enum cb_err cbfs_copy_fill_metadata(union cbfs_mdata *dst, const union cbfs_mdata *src, + size_t already_read, cbfs_dev_t dev, size_t offset); /* Find a file named |name| in the CBFS on |dev|. Copy its metadata (including attributes) * into |mdata_out| and pass out the offset to the file data on the CBFS device. * Verify the metadata with |metadata_hash| if provided. */ -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash); +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash); /* Both base address and size of CBFS mcaches must be aligned to this value! */ #define CBFS_MCACHE_ALIGNMENT sizeof(uint32_t) /* Largest data type used in CBFS */ @@ -105,15 +105,15 @@ * CB_CBFS_CACHE_FULL, the mcache is still valid and can be used, but lookups may return * CB_CBFS_CACHE_FULL for files that didn't fit to indicate that the caller needs to fall back * to cbfs_lookup(). */ -cb_err_t cbfs_mcache_build(cbfs_dev_t dev, void *mcache, size_t mcache_size, - struct vb2_hash *metadata_hash); +enum cb_err cbfs_mcache_build(cbfs_dev_t dev, void *mcache, size_t mcache_size, + struct vb2_hash *metadata_hash); /* * Find a file named |name| in a CBFS metadata cache and copy its metadata into |mdata_out|. * Pass out offset to the file data (on the original CBFS device used for cbfs_mcache_build()). */ -cb_err_t cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out); +enum cb_err cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out); /* Returns the amount of bytes actually used by the CBFS metadata cache in |mcache|. */ size_t cbfs_mcache_real_size(const void *mcache, size_t mcache_size); diff --git a/src/drivers/mipi/panel.c b/src/drivers/mipi/panel.c index f1d87c3..9646eca 100644 --- a/src/drivers/mipi/panel.c +++ b/src/drivers/mipi/panel.c @@ -4,7 +4,7 @@ #include <delay.h> #include <mipi/panel.h> -cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func) +enum cb_err mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func) { const struct panel_init_command *init = buf; enum mipi_dsi_transaction type; @@ -68,7 +68,7 @@ return CB_ERR; } - cb_err_t ret = cmd_func(type, init->data, len); + enum cb_err ret = cmd_func(type, init->data, len); if (ret != CB_SUCCESS) return ret; buf += len; diff --git a/src/drivers/parade/ps8640/ps8640.c b/src/drivers/parade/ps8640/ps8640.c index 587eae1..ebb2f48 100644 --- a/src/drivers/parade/ps8640/ps8640.c +++ b/src/drivers/parade/ps8640/ps8640.c @@ -81,12 +81,12 @@ return 0; } -static cb_err_t ps8640_bridge_aux_request(uint8_t bus, - uint8_t chip, - unsigned int target_reg, - unsigned int total_size, - enum aux_request request, - uint8_t *data) +static enum cb_err ps8640_bridge_aux_request(uint8_t bus, + uint8_t chip, + unsigned int target_reg, + unsigned int total_size, + enum aux_request request, + uint8_t *data) { int i; uint32_t length; diff --git a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c index 2130e33..c9f4ba5 100644 --- a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c +++ b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c @@ -155,12 +155,12 @@ 0, 1620, 2160, 2430, 2700, 3240, 4320, 5400 }; -static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus, - uint8_t chip, - unsigned int target_reg, - unsigned int total_size, - enum aux_request request, - uint8_t *data) +static enum cb_err sn65dsi86_bridge_aux_request(uint8_t bus, + uint8_t chip, + unsigned int target_reg, + unsigned int total_size, + enum aux_request request, + uint8_t *data) { int i; uint32_t length; @@ -217,9 +217,9 @@ return CB_SUCCESS; } -cb_err_t sn65dsi86_bridge_read_edid(uint8_t bus, uint8_t chip, struct edid *out) +enum cb_err sn65dsi86_bridge_read_edid(uint8_t bus, uint8_t chip, struct edid *out) { - cb_err_t err; + enum cb_err err; u8 edid[EDID_LENGTH * 2]; int edid_size = EDID_LENGTH; diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 5731d6e..f0ae7a8 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -132,7 +132,7 @@ void cbfs_unmap(void *mapping); /* Load stage into memory filling in prog. Return 0 on success. < 0 on error. */ -int cbfs_prog_stage_load(struct prog *prog); +enum cb_err cbfs_prog_stage_load(struct prog *prog); /* Returns the size of a CBFS file, or 0 on error. Avoid using this function to allocate space, and instead use cbfs_alloc() so the file only needs to be looked up once. */ @@ -185,15 +185,15 @@ * hash was still verified. Should be called once per *boot* (not once per stage) before the * first CBFS access. */ -cb_err_t cbfs_init_boot_device(const struct cbfs_boot_device *cbd, - struct vb2_hash *metadata_hash); +enum cb_err cbfs_init_boot_device(const struct cbfs_boot_device *cbd, + struct vb2_hash *metadata_hash); /********************************************************************************************** * INTERNAL HELPERS FOR INLINES, DO NOT USE. * **********************************************************************************************/ -cb_err_t _cbfs_boot_lookup(const char *name, bool force_ro, - union cbfs_mdata *mdata, struct region_device *rdev); +enum cb_err _cbfs_boot_lookup(const char *name, bool force_ro, + union cbfs_mdata *mdata, struct region_device *rdev); void *_cbfs_alloc(const char *name, cbfs_allocator_t allocator, void *arg, size_t *size_out, bool force_ro, enum cbfs_type *type); diff --git a/src/include/mipi/panel.h b/src/include/mipi/panel.h index 527af7e..ca06897 100644 --- a/src/include/mipi/panel.h +++ b/src/include/mipi/panel.h @@ -31,10 +31,10 @@ u8 init[]; /* A packed array of panel_init_command */ }; -typedef cb_err_t (*mipi_cmd_func_t)(enum mipi_dsi_transaction type, const u8 *data, u8 len); +typedef enum cb_err (*mipi_cmd_func_t)(enum mipi_dsi_transaction type, const u8 *data, u8 len); /* Parse a command array and call cmd_func() for each entry. Delays get handled internally. */ -cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func); +enum cb_err mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func); #define PANEL_DCS(...) \ PANEL_CMD_DCS, \ diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 0f07a32..c8ca14c 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -34,15 +34,15 @@ } ROMSTAGE_CBMEM_INIT_HOOK(switch_to_postram_cache); -cb_err_t _cbfs_boot_lookup(const char *name, bool force_ro, - union cbfs_mdata *mdata, struct region_device *rdev) +enum cb_err _cbfs_boot_lookup(const char *name, bool force_ro, + union cbfs_mdata *mdata, struct region_device *rdev) { const struct cbfs_boot_device *cbd = cbfs_get_boot_device(force_ro); if (!cbd) return CB_ERR; size_t data_offset; - cb_err_t err = CB_CBFS_CACHE_FULL; + enum cb_err err = CB_CBFS_CACHE_FULL; if (!CONFIG(NO_CBFS_MCACHE) && !ENV_SMM && cbd->mcache_size) err = cbfs_mcache_lookup(cbd->mcache, cbd->mcache_size, name, mdata, &data_offset); @@ -520,11 +520,11 @@ return cbmem_add((uintptr_t)arg, size); } -cb_err_t cbfs_prog_stage_load(struct prog *pstage) +enum cb_err cbfs_prog_stage_load(struct prog *pstage) { union cbfs_mdata mdata; struct region_device rdev; - cb_err_t err; + enum cb_err err; prog_locate_hook(pstage); @@ -612,8 +612,8 @@ } } -cb_err_t cbfs_init_boot_device(const struct cbfs_boot_device *cbd, - struct vb2_hash *mdata_hash) +enum cb_err cbfs_init_boot_device(const struct cbfs_boot_device *cbd, + struct vb2_hash *mdata_hash) { /* If we have an mcache, mcache_build() will also check mdata hash. */ if (!CONFIG(NO_CBFS_MCACHE) && !ENV_SMM && cbd->mcache_size > 0) @@ -625,7 +625,7 @@ /* Verification only: use cbfs_walk() without a walker() function to just run through the CBFS once, will return NOT_FOUND by default. */ - cb_err_t err = cbfs_walk(&cbd->rdev, NULL, NULL, mdata_hash, 0); + enum cb_err err = cbfs_walk(&cbd->rdev, NULL, NULL, mdata_hash, 0); if (err == CB_CBFS_NOT_FOUND) err = CB_SUCCESS; return err; @@ -660,7 +660,7 @@ die("Cannot locate primary CBFS"); if (ENV_INITIAL_STAGE) { - cb_err_t err = cbfs_init_boot_device(&ro, metadata_hash_get()); + enum cb_err err = cbfs_init_boot_device(&ro, metadata_hash_get()); if (err == CB_CBFS_HASH_MISMATCH) die("RO CBFS metadata hash verification failure"); else if (CONFIG(TOCTOU_SAFETY) && err == CB_CBFS_CACHE_FULL) diff --git a/src/security/vboot/vboot_loader.c b/src/security/vboot/vboot_loader.c index 1c4343b..0acb349 100644 --- a/src/security/vboot/vboot_loader.c +++ b/src/security/vboot/vboot_loader.c @@ -34,7 +34,7 @@ if (!cbd) /* Can't initialize RW CBFS in recovery mode. */ return; - cb_err_t err = cbfs_init_boot_device(cbd, NULL); /* TODO: RW hash */ + enum cb_err err = cbfs_init_boot_device(cbd, NULL); /* TODO: RW hash */ if (err && err != CB_CBFS_CACHE_FULL) /* TODO: -> recovery? */ die("RW CBFS initialization failure: %d", err); } diff --git a/src/soc/mediatek/common/dsi.c b/src/soc/mediatek/common/dsi.c index f16d8f2..396d979 100644 --- a/src/soc/mediatek/common/dsi.c +++ b/src/soc/mediatek/common/dsi.c @@ -303,7 +303,7 @@ } } -static cb_err_t mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data, u8 len) +static enum cb_err mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data, u8 len) { const u8 *tx_buf = data; u32 config; diff --git a/src/soc/qualcomm/sc7180/display/dsi.c b/src/soc/qualcomm/sc7180/display/dsi.c index 48dc2b3..9e6977c 100644 --- a/src/soc/qualcomm/sc7180/display/dsi.c +++ b/src/soc/qualcomm/sc7180/display/dsi.c @@ -204,11 +204,12 @@ return status; } -static cb_err_t mdss_dsi_send_init_cmd(enum mipi_dsi_transaction type, const u8 *body, u8 len) +static enum cb_err mdss_dsi_send_init_cmd(enum mipi_dsi_transaction type, const u8 *body, + u8 len) { uint8_t *pload = _dma_coherent; uint32_t size; - cb_err_t ret = CB_SUCCESS; + enum cb_err ret = CB_SUCCESS; int data = 0; uint32_t *bp = NULL; @@ -276,7 +277,7 @@ write32(&dsi0->err_int_mask0, 0x13FF3BFF); } -cb_err_t mdss_dsi_panel_initialize(const u8 *init_cmds) +enum cb_err mdss_dsi_panel_initialize(const u8 *init_cmds) { uint32_t ctrl_mode = 0; @@ -286,7 +287,7 @@ /* Enable command mode before sending the commands */ write32(&dsi0->ctrl, ctrl_mode | 0x04); - cb_err_t ret = mipi_panel_parse_init_commands(init_cmds, mdss_dsi_send_init_cmd); + enum cb_err ret = mipi_panel_parse_init_commands(init_cmds, mdss_dsi_send_init_cmd); write32(&dsi0->ctrl, ctrl_mode); mdss_dsi_clear_intr(); diff --git a/src/soc/qualcomm/sc7180/include/soc/display/mipi_dsi.h b/src/soc/qualcomm/sc7180/include/soc/display/mipi_dsi.h index a7c9b6e..12e5149 100644 --- a/src/soc/qualcomm/sc7180/include/soc/display/mipi_dsi.h +++ b/src/soc/qualcomm/sc7180/include/soc/display/mipi_dsi.h @@ -22,6 +22,6 @@ enum cb_err mdss_dsi_config(struct edid *edid, uint32_t num_of_lanes, uint32_t bpp); void mdss_dsi_clock_config(void); void mdss_dsi_video_mode_config(struct edid *edid, uint32_t bpp); -cb_err_t mdss_dsi_panel_initialize(const u8 *init_cmds); +enum cb_err mdss_dsi_panel_initialize(const u8 *init_cmds); #endif diff --git a/tests/lib/cbfs-lookup-test.c b/tests/lib/cbfs-lookup-test.c index 63a8298..7562868 100644 --- a/tests/lib/cbfs-lookup-test.c +++ b/tests/lib/cbfs-lookup-test.c @@ -70,29 +70,29 @@ return dstn; } -extern cb_err_t __real_cbfs_lookup(cbfs_dev_t dev, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out, - struct vb2_hash *metadata_hash); +extern enum cb_err __real_cbfs_lookup(cbfs_dev_t dev, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out, + struct vb2_hash *metadata_hash); -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash) +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash) { - const cb_err_t err = + const enum cb_err err = __real_cbfs_lookup(dev, name, mdata_out, data_offset_out, metadata_hash); - assert_int_equal(err, mock_type(cb_err_t)); + assert_int_equal(err, mock_type(enum cb_err)); return err; } -extern cb_err_t __real_cbfs_mcache_lookup(const void *mcache, size_t mcache_size, +extern enum cb_err __real_cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, union cbfs_mdata *mdata_out, size_t *data_offset_out); -cb_err_t cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, - union cbfs_mdata *mdata_out, size_t *data_offset_out) +enum cb_err cbfs_mcache_lookup(const void *mcache, size_t mcache_size, const char *name, + union cbfs_mdata *mdata_out, size_t *data_offset_out) { - const cb_err_t err = __real_cbfs_mcache_lookup(mcache, mcache_size, name, mdata_out, + const enum cb_err err = __real_cbfs_mcache_lookup(mcache, mcache_size, name, mdata_out, data_offset_out); - assert_int_equal(err, mock_type(cb_err_t)); + assert_int_equal(err, mock_type(enum cb_err)); return err; } @@ -128,7 +128,7 @@ struct cbfs_test_state_ex { u32 file_type; u32 file_length; - cb_err_t lookup_result; + enum cb_err lookup_result; }; struct cbfs_test_state { @@ -198,7 +198,7 @@ /* Utils */ -static void expect_lookup_result(cb_err_t res) +static void expect_lookup_result(enum cb_err res) { if (CONFIG(NO_CBFS_MCACHE)) will_return(cbfs_lookup, (res)); diff --git a/tests/lib/cbfs-verification-test.c b/tests/lib/cbfs-verification-test.c index 1f46c7d..263fbec 100644 --- a/tests/lib/cbfs-verification-test.c +++ b/tests/lib/cbfs-verification-test.c @@ -80,15 +80,15 @@ } /* Original function alias created by test framework. Used for call wrapping in mock below. */ -cb_err_t __real_cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash); +enum cb_err __real_cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash); -cb_err_t cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, - size_t *data_offset_out, struct vb2_hash *metadata_hash) +enum cb_err cbfs_lookup(cbfs_dev_t dev, const char *name, union cbfs_mdata *mdata_out, + size_t *data_offset_out, struct vb2_hash *metadata_hash) { - const cb_err_t err = + const enum cb_err err = __real_cbfs_lookup(dev, name, mdata_out, data_offset_out, metadata_hash); - assert_int_equal(mock_type(cb_err_t), err); + assert_int_equal(mock_type(enum cb_err), err); return err; } diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index b765340..cebfef6 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -247,8 +247,8 @@ if (mhc->cbfs_hash.algo == VB2_HASH_INVALID) return 0; - cb_err_t err = cbfs_walk(cbfs, NULL, NULL, &mhc->cbfs_hash, - CBFS_WALK_WRITEBACK_HASH); + enum cb_err err = cbfs_walk(cbfs, NULL, NULL, &mhc->cbfs_hash, + CBFS_WALK_WRITEBACK_HASH); if (err != CB_CBFS_NOT_FOUND) { ERROR("Unexpected cbfs_walk() error %d\n", err); return -1; @@ -1508,8 +1508,8 @@ return 0; struct vb2_hash real_hash = { .algo = mhc->cbfs_hash.algo }; - cb_err_t err = cbfs_walk(&image, NULL, NULL, &real_hash, - CBFS_WALK_WRITEBACK_HASH); + enum cb_err err = cbfs_walk(&image, NULL, NULL, &real_hash, + CBFS_WALK_WRITEBACK_HASH); if (err != CB_CBFS_NOT_FOUND) { ERROR("Unexpected cbfs_walk() error %d\n", err); return 1; -- To view, visit https://review.coreboot.org/c/coreboot/+/62600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b Gerrit-Change-Number: 62600 Gerrit-PatchSet: 4 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: prog_loader: Change legacy_romstage_select_and_load() to return cb_err
by Julius Werner (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Yu-Ping Wu. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62656 ) Change subject: prog_loader: Change legacy_romstage_select_and_load() to return cb_err ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/bootblock_normal.c: https://review.coreboot.org/c/coreboot/+/62656/comment/ae3e5380_dbf8b190 PS1, Line 15: int > enum cb_err Right, sorry. -- To view, visit https://review.coreboot.org/c/coreboot/+/62656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5510d05953fe8c0e2cb511f01f862b66ced154ae Gerrit-Change-Number: 62656 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:18:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: prog_loader: Change legacy_romstage_select_and_load() to return cb_err
by Julius Werner (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Julius Werner. Hello build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62656 to look at the new patch set (#2). Change subject: prog_loader: Change legacy_romstage_select_and_load() to return cb_err ...................................................................... prog_loader: Change legacy_romstage_select_and_load() to return cb_err This is passing through a cb_err from cbfs_prog_stage_load(), so it should be declared to return that as well. Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: I5510d05953fe8c0e2cb511f01f862b66ced154ae --- M src/arch/x86/bootblock_normal.c M src/include/program_loading.h M src/lib/prog_loaders.c 3 files changed, 6 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/62656/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5510d05953fe8c0e2cb511f01f862b66ced154ae Gerrit-Change-Number: 62656 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Yu-Ping Wu (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 21: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/827426e8_b244c358 PS21, Line 243: mtk_pcie_get_hw_info > Not defined. I'll revert this first. Hung-Te can you see the revert button on Gerrit UI? -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 21 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:17:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by Yu-Ping Wu (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 21: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/56791/comment/dd5a11b9_f5edca86 PS21, Line 243: mtk_pcie_get_hw_info Not defined. I'll revert this first. -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 21 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:16:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: spd/lp5: Add new part MT62F2G32D8DR-031
by Reka Norman (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Reka Norman, Eric Lai, Tim Wawrzynczak, Amanda Hwang, Ivy Jian, Karthik Ramasubramanian. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62542 ) Change subject: spd/lp5: Add new part MT62F2G32D8DR-031 ...................................................................... Patch Set 3: (1 comment) File spd/lp5/memory_parts.json: https://review.coreboot.org/c/coreboot/+/62542/comment/566555a9_d6e2ca1e PS1, Line 54: "name": "MT62F2G32D8DR-031 WT:B", > IIRC, AMD and Intel platform can separate the SPD mechanism and create more set. […] Yeah, Karthik has already added a separate set for AMD. E.g. see CB:61542. So the question is just whether the set 1 code needs to be updated to use option 2. -- To view, visit https://review.coreboot.org/c/coreboot/+/62542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad2bb53de2b54648d5dd66808973f26b1c8a5df7 Gerrit-Change-Number: 62542 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:06:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Fix null pointer dereference error when PCIe link down
by Jianjun Wang (Code Review) 09 Mar '22

09 Mar '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62673 ) Change subject: soc/mediatek: Fix null pointer dereference error when PCIe link down ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ba1a47b58fc8fe6dd5cd22682cbc8de22ed2387 Gerrit-Change-Number: 62673 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 09 Mar 2022 02:00:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Fix null pointer dereference error when PCIe link down
by Jianjun Wang (Code Review) 09 Mar '22

09 Mar '22

Jianjun Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62673 ) Change subject: soc/mediatek: Fix null pointer dereference error when PCIe link down ...................................................................... soc/mediatek: Fix null pointer dereference error when PCIe link down When PCIe link down, dev->chip_info will not be assigned, check its value to prevent null pointer dereference error when PCIe link down. TEST=Build pass and no boot error when SSD removed. Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Fixes: commit 270b0b60ac (soc/mediatek: Add PCIe support) Change-Id: I9ba1a47b58fc8fe6dd5cd22682cbc8de22ed2387 --- M src/soc/mediatek/common/pcie.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/62673/1 diff --git a/src/soc/mediatek/common/pcie.c b/src/soc/mediatek/common/pcie.c index c05db8c..dc51c86 100644 --- a/src/soc/mediatek/common/pcie.c +++ b/src/soc/mediatek/common/pcie.c @@ -212,6 +212,9 @@ { struct mtk_pcie_controller *ctrl = dev->chip_info; + if (!ctrl) + return; + mtk_pcie_domain_new_res(dev, IOINDEX_SUBTRACTIVE(0, 0), ctrl->mmio_res_io); @@ -224,6 +227,9 @@ struct mtk_pcie_controller *ctrl = dev->chip_info; uintptr_t table; + if (!ctrl) + return; + /* Initialize I/O space constraints. */ table = ctrl->base + PCIE_TRANS_TABLE_BASE_REG; if (mtk_pcie_set_trans_window(dev, table, ctrl->mmio_res_io) < 0) -- To view, visit https://review.coreboot.org/c/coreboot/+/62673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ba1a47b58fc8fe6dd5cd22682cbc8de22ed2387 Gerrit-Change-Number: 62673 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit March 2022